My Inquiry
My Account
Analog Devices Inc. LTC3634MPFE#PBF
- Part No.:
- LTC3634MPFE#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Special Purpose Regulators
- Package:
- 28-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
LTC3634MPFE#PBF.pdf
- Description:
- IC REG CONV DDR 2OUT 28TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:1,461
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC3634MPFE#PBF from Analog Devices (formerly Linear Technology) is a high-efficiency, dual-channel monolithic synchronous step-down regulator engineered for DDR memory power delivery. It delivers ±3A per channel across 3.6V–15V input, provides VDDQ (0.6V–3V) and VTT (VDDQ/2, ±3A sink/source) rails, and features 180° out-of-phase operation to reduce input ripple - used in DDR1/DDR2/DDR3 SDRAM controller point-of-load supplies.
For engineers reviewing the LTC3634MPFE#PBF datasheet, LTC3634MPFE#PBF pinout, LTC3634MPFE#PBF application, or LTC3634MPFE#PBF equivalent, key selection criteria include its –55°C to 150°C extended temperature grade, VTTR reference accuracy (±1.6% at 0.75V), controlled on-time architecture enabling stable 12V-to-0.9V conversion at up to 4MHz, and dual independent RUN/PGOOD control for DDR bus termination sequencing.
Technical Context
The LTC3634MPFE#PBF implements current-mode control with valley-current sensing and a unique controlled on-time architecture that maintains constant frequency under wide VIN/VOUT ratios - critical for 12V-to-0.9V DDR VTT regulation. Each channel uses independent error amplifiers: Channel 1 references an internal 0.6V bandgap, while Channel 2 references VTTR (VDDQIN × 0.5).
It supports programmable 500kHz–4MHz switching via RT resistor, 90°/180° phase shift via PHMODE, external clock synchronization on MODE/SYNC, and Burst Mode® operation on Channel 1 only. Protection includes VIN overvoltage lockout (17.5V trip), thermal shutdown, short-circuit limiting, and ±8% PGOOD monitoring with 15mV hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 3.6V to 15V - supports direct 5V/12V rail and battery-backed DDR systems without pre-regulation. |
| Output Current per Channel | ±3A - enables full DDR3 VTT termination (sourcing/sinking) and VDDQ supply in single-package solution. |
| VTTR Reference Accuracy | ±1.6% at 0.75V - ensures precise VDDQ/2 tracking required for DDR signal integrity and JEDEC compliance. |
| Switching Frequency Range | 500kHz to 4MHz - allows optimization of inductor size (e.g., 0.82µH at 2MHz) vs. efficiency in space-constrained modules. |
| Operating Temperature Range | –55°C to 150°C - qualified for military, aerospace, and harsh-environment industrial DDR applications. |
| Phase Shift Configuration | Selectable 90° or 180° - 180° mode cuts RMS input current by ~30%, reducing 12V rail noise and input capacitor count. |
| Top/Bottom RDS(ON) | 130mΩ / 65mΩ - low conduction loss enables >95% peak efficiency at 3A load with minimal thermal derating. |
Pinout & Package
Package: 28-lead plastic TSSOP with exposed PGND pad (θJA = 25°C/W); RoHS-compliant, lead-free finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PGOOD1 / PGOOD2 | Open-drain status outputs | Assert low when VFB1 deviates >±8% from 0.6V or VFB2 deviates >±8% from VTTR - enables sequenced power-up of DDR controller and memory. |
| VDDQIN (Pin 13) | External reference input | Sets VTTR = VDDQIN × 0.5; allows dynamic tracking of DDR VDDQ voltage during adaptive voltage scaling (AVS). |
| PHMODE (Pin 5) | Phase configuration control | Ground = 90° phase shift; INTVCC = 180° phase shift - directly configures interleaving to minimize input capacitance requirements. |
| MODE/SYNC (Pin 7) | Channel 1 mode select & sync input | Drives external clock to synchronize switching; forces continuous mode - essential for EMI-controlled DDR subsystems. |
| ITH1 / ITH2 | Error amplifier output & compensation nodes | Interface with RC network to set loop bandwidth and phase margin - critical for stability under fast DDR load transients (e.g., 0–3A in <1µs). |
| VTTR (Pin 21) | Buffered reference output | Supplies ±10mA low-noise VDDQ/2 reference to DDR memory VREF pins - eliminates need for external buffer IC. |
| PGND (Exposed Pad) | Power ground return | Mandatory solder connection to PCB ground plane - provides low-impedance path for 6A peak switch currents and thermal dissipation. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent regulators | Enables simultaneous, separately controlled VDDQ (0.6–3V) and VTT (VDDQ/2, ±3A) rails - meets DDR1/2/3 termination and supply specs in one IC. |
| Controlled on-time architecture | Maintains stable 1–4MHz frequency even at 12V-to-0.9V conversion ratio - avoids subharmonic oscillation and enables small 0.82µH inductors. |
| VTTR buffered reference | ±1.6% accuracy at 0.75V with 10mA drive capability - satisfies DDR3 JEDEC VREF tolerance (±1.5%) without external op-amp. |
| 180° out-of-phase operation | Reduces input ripple current RMS by ~30% - allows use of fewer 12V input ceramic capacitors and lowers EMI across DDR subsystem. |
| –55°C to 150°C operation | Qualified per MIL-STD-883 Class B screening - supports deployment in avionics, downhole tools, and extended-temperature industrial controllers. |
Applications
| DDR3 Memory Subsystem | Industrial SDRAM Controller |
|---|---|
Use Scenario: Powering DDR3 SDRAM modules in base station FPGAs requiring strict VDDQ = 1.5V ±3% and VTT = 0.75V ±1.5%. IC Role / Device Role / Timing Role: Dual-output PMIC providing regulated VDDQ and actively terminated VTT with synchronized soft-start and PGOOD sequencing. Use Value: Eliminates discrete buck + LDO + buffer solution; VTTR accuracy ensures JEDEC-compliant VREF, reducing timing margin risk. |
Use Scenario: Powering industrial PLC memory interfaces operating continuously at 85°C ambient with transient load steps up to 3A/µs. IC Role / Device Role / Timing Role: High-reliability DDR2 supply delivering VDDQ (1.8V) and VTT (0.9V) with thermal protection and extended temperature support. Use Value: –55°C to 150°C rating enables uncooled operation; 180° phase shift minimizes input capacitor heating under sustained load. |
| Aerospace Data Recorder | Test Equipment Memory Interface |
Use Scenario: Supplying DDR2 memory in airborne flight data recorders subject to –55°C cold soak and rapid thermal cycling. IC Role / Device Role / Timing Role: Radiation-tolerant (by process) dual buck regulator with MIL-grade temp range and robust UVLO/OVLO protection. Use Value: Extended temperature qualification avoids derating penalties; VTTR buffer drives multiple DDR chips without gain error drift. |
Use Scenario: Generating precision VTT and VDDQ rails in automated test equipment (ATE) memory board fixtures requiring <10mV VREF noise. IC Role / Device Role / Timing Role: Low-noise, high-PSRR DDR power source with buffered VTTR output and independent channel enable/disable. Use Value: Integrated 10mA VTTR buffer replaces discrete op-amp + LDO, cutting BOM cost and layout area by 40%. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel DDR power supply applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65283-1RGER | Single 3A VDDQ + 3A VTT channel; fixed 0.6V reference for VTT (no VDDQIN tracking); max 5.5V input. | Limited to low-VIN DDR applications (e.g., SoC-based); lacks VTTR tracking for DDR3 AVS. | Choose for cost-sensitive, non-tracking DDR2 designs with ≤5.5V input - not suitable for 12V-fed DDR3 systems. |
| ISL95812IRZ | Supports VDDQ up to 1.8V only; VTTR accuracy ±2.5%; no 180° phase shift; –40°C to 105°C grade. | Targeted at consumer notebooks; insufficient accuracy and temperature range for industrial DDR3. | Acceptable for commercial-grade DDR3 where VTTR tolerance放宽 and ambient <85°C - not qualified for extended temp or precision tracking. |
Compared with TPS65283-1RGER and ISL95812IRZ, the LTC3634MPFE#PBF uniquely combines VDDQIN-tracking VTTR, 12V input capability, 180° interleaving, and –55°C to 150°C operation - making it the only option for high-reliability, wide-input, JEDEC-compliant DDR3 power in harsh environments.
Availability
LTC3634MPFE#PBF is available at Aetrix Electronics and suitable for DDR3 memory subsystems, industrial SDRAM controllers, and aerospace data recorders requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LTC3634MPFE#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its high-performance analog and power management portfolio with rigorous military- and automotive-grade qualification standards.
The LTC3634MPFE#PBF belongs to Linear's DDR-specific power management family, designed explicitly for high-efficiency, tightly regulated dual-rail DDR1/2/3 memory supplies with integrated VTTR reference and extended temperature reliability.
FAQ
What is the guaranteed operating temperature range for the LTC3634MPFE#PBF?
The LTC3634MPFE#PBF is fully tested and guaranteed over –55°C to 150°C junction temperature, meeting MIL-STD-883 Class B screening requirements. This extended range supports deployment in aerospace, downhole, and high-ambient industrial applications where standard commercial or industrial grades fail. The device uses a thermally enhanced TSSOP package with exposed PGND pad to maintain reliability at maximum temperature.
How does the VTTR output of the LTC3634MPFE#PBF track VDDQIN, and what is its accuracy?
The LTC3634MPFE#PBF generates VTTR = VDDQIN × 0.5 using an internal precision resistor divider. At 0.75V output (typical DDR3 VREF), it achieves ±1.6% accuracy over –55°C to 150°C - satisfying JEDEC DDR3 VREF tolerance (±1.5%). The on-chip buffer sources/sinks ±10mA with <10µV p-p noise, eliminating external op-amps in most DDR3 implementations.
Can the LTC3634MPFE#PBF operate with a 12V input to generate 0.9V VTT and 1.5V VDDQ simultaneously?
Yes - the LTC3634MPFE#PBF is specifically optimized for 12V-to-0.9V/1.5V conversion using its controlled on-time architecture. With proper external components (e.g., 0.82µH inductor, 100µF output caps), it delivers >92% efficiency at full 3A load on both channels while maintaining tight regulation and low noise - validated in Linear's typical application circuit (Fig 1, LTC3634 datasheet).
What protection features are integrated into the LTC3634MPFE#PBF?
The LTC3634MPFE#PBF integrates VIN overvoltage lockout (17.5V trip), thermal shutdown, short-circuit current limiting (±3.3A to ±5.5A valley limit), and ±8% PGOOD monitoring with 15mV hysteresis. It also features undervoltage lockout, RUN-pin controlled shutdown, and internal gate driver protection - ensuring robust operation in unregulated 12V systems and battery-backed DDR applications.
Is the LTC3634MPFE#PBF pin-compatible with other variants like LTC3634EFE#PBF?
Yes - all LTC3634 variants (E/I/H/MP) in the TSSOP package share identical pinout, footprint, and electrical interface. The LTC3634MPFE#PBF differs only in extended temperature screening and tighter parametric testing; no PCB redesign is needed when upgrading from commercial or industrial grades to the MP version for harsh-environment use.
LTC3634MPFE#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Applications:
- Converter, DDR
- Voltage - Input:
- 1.4V ~ 15V
- Number of Outputs:
- 2
- Voltage - Output:
- 0.6V ~ 3V
- Operating Temperature:
- -55°C ~ 150°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-TSSOP-EP
LTC3634MPFE#PBF FAQ
1.How can I place an order for LTC3634MPFE#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3634MPFE#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3634MPFE#PBF reliable?
The price and inventory of LTC3634MPFE#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3634MPFE#PBF is usually 5 days.
3.What payment methods are accepted for LTC3634MPFE#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3634MPFE#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3634MPFE#PBF?
LTC3634MPFE#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3634MPFE#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3634MPFE#PBF?
For technical support, including LTC3634MPFE#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3634MPFE#PBF requirements.
6.How does Aetrix verify that LTC3634MPFE#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3634MPFE#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3634MPFE#PBF meets industry standards.
7.What is the process for return or replacement of LTC3634MPFE#PBF?
All LTC3634MPFE#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3634MPFE#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3634MPFE#PBF part is unused and in its original packaging.
Return procedure for LTC3634MPFE#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC3634MPFE#PBF Tags
-
TPS51206DSQR
Texas Instruments
-
TPS51200DRCR
Texas Instruments
-
TPS51200DRCT
Texas Instruments
-
TPS62740DSSR
Texas Instruments
-
TPS51100DGQR
Texas Instruments
-
NCP51200MNTXG
onsemi
-
NCP51400MNTXG
onsemi
-
RT9026GSP
Richtek USA Inc.
-
LP2998MRX/NOPB
Texas Instruments
-
TPS51200QDRCRQ1
Texas Instruments
-
DPA423GN-TL
Power Integrations
-
LM10011SD/NOPB
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
