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Analog Devices Inc. LTC3634MPUFD#TRPBF
- Part No.:
- LTC3634MPUFD#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Special Purpose Regulators
- Package:
- 28-WFQFN Exposed Pad
- Datasheet:
-
LTC3634MPUFD#TRPBF.pdf
- Description:
- IC REG CONV DDR 2OUT 28QFN
- Quantity:
- Payment:
- Shipping:
Inventory:4,625
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Product details
Overview
LTC3634MPUFD#TRPBF from Analog Devices (formerly Linear Technology) is a high-efficiency, dual-channel monolithic synchronous step-down regulator engineered for DDR memory power delivery - specifically generating VDDQ (1.8V/3A) and bidirectional VTT (0.9V/±3A) rails for DDR1/DDR2/DDR3 SDRAM controllers. It operates from 3.6V to 15V input, supports 180° out-of-phase operation, delivers up to 95% efficiency, and features ±1.6% accurate VTTR reference at 0.75V.
For engineers reviewing the LTC3634MPUFD#TRPBF datasheet, LTC3634MPUFD#TRPBF pinout, LTC3634MPUFD#TRPBF application, or LTC3634MPUFD#TRPBF equivalent, this page provides verified technical context, validated pin functions, confirmed DDR-specific timing and regulation behavior, and real-world design implications for point-of-load DDR power systems.
Technical Context
The LTC3634MPUFD#TRPBF implements current-mode control with a unique controlled on-time architecture optimized for low-VOUT, high-input-voltage DDR conversion (e.g., 12V → 0.9V), enabling stable 4MHz switching without external compensation dependency. Its dual channels operate independently: Channel 1 regulates VDDQ using an internal 0.6V reference and supports Burst Mode® for light-load efficiency; Channel 2 regulates VTT referenced to VTTR = VDDQIN × 0.5, with ±3A sink/source capability and no Burst Mode.
Phase shift is hardware-selectable via PHMODE (0V = 90°, INTVCC = 180°), reducing input RMS current and easing input capacitor sizing. The VTTR buffer delivers ±10mA at ±1.6% accuracy over –55°C to 150°C, directly feeding Channel 2's error amplifier and DDR VREF pins. Input overvoltage lockout (17.5V trip) and thermal shutdown protect against system-level transients.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 3.6V to 15V - supports direct 5V/12V PoL and battery-backed DDR systems without pre-regulation. |
| VDDQ Output Range | 0.6V to 3V - covers DDR1 (2.5V), DDR2 (1.8V), DDR3 (1.5V) with ±1.6% reference accuracy. |
| VTT Output Capability | ±3A sourcing/sinking - meets JEDEC DDR termination current requirements for dynamic bus loading. |
| Switching Frequency | 500kHz to 4MHz - programmable via RT resistor; enables compact 0.82µH/1.5µH inductors and low-ESR ceramic output caps. |
| Efficiency | Up to 95% at full load - achieved via 130mΩ top / 65mΩ bottom MOSFETs and synchronous rectification. |
| Operating Temperature | –55°C to +150°C - qualified for military/aerospace and extended industrial DDR applications. |
| Package | 28-pin 4mm × 5mm QFN with exposed PGND pad - θJA = 43°C/W; requires soldered thermal pad for reliability. |
Pinout & Package
Package: 28-lead (4mm × 5mm) plastic QFN with exposed power ground pad (Pin 29). Must be soldered to PCB for thermal and electrical integrity. θJA = 43°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PGOOD1 (Pin 1) | Channel 1 Power Good Status | Open-drain output pulled low if VFB1 deviates >±8% from 0.6V reference; includes 40µs glitch filter. |
| PHMODE (Pin 2) | Phase Select Control | 0V = 90° phase shift; INTVCC = 180° phase shift - reduces input ripple and capacitor stress. |
| RUN1 (Pin 3) | Channel 1 Enable | Enable threshold: 1.22V (rising); shutdown threshold: 1.01V (falling) - supports sequenced power-up. |
| MODE/SYNC (Pin 4) | Channel 1 Mode Control / Clock Sync | Ground = forced continuous mode; INTVCC = Burst Mode®; external clock = PLL-synchronized switching. |
| RT (Pin 5) | Oscillator Frequency Set | Resistor to SGND sets fSW from 500kHz to 4MHz; 162kΩ = 1.4MHz, 80.6kΩ = 2.6MHz per datasheet. |
| RUN2 (Pin 6) | Channel 2 Enable | Independent enable for VTT rail; same threshold as RUN1 - allows separate VDDQ/VTT sequencing. |
| SGND (Pin 7) | Signal Ground Reference | Low-noise analog ground for feedback dividers, RT, and compensation networks - must be isolated from PGND. |
| PGOOD2 (Pin 8) | Channel 2 Power Good Status | Pulled low if VFB2 deviates >±8% from VTTR; remains low below 300mV VTTR - ensures DDR VREF validity. |
| VFB2 (Pin 9) | Channel 2 Feedback Input | Connects directly to VTT output; error amplifier compares to VTTR (VDDQIN × 0.5) - enables precise termination voltage tracking. |
| VDDQIN (Pin 10) | VTT Reference Source | External input (1.5V–2.6V) that sets VTTR = VDDQIN × 0.5 - decouples VTT regulation from VDDQ stability. |
| ITH2 (Pin 11) | Channel 2 Error Amplifier Output | Compensation node for VTT loop; connects to RC network - stabilizes bidirectional current transient response. |
| VON2 (Pin 12) | Channel 2 On-Time Setpoint | Tied to VTT to make on-time proportional to output voltage - maintains constant frequency below 3V. |
| SW2 (Pins 13,14) | Channel 2 Switch Node | Connects to external inductor; voltage swings from ~–0.3V to VIN2+0.3V - requires low-inductance layout. |
| VIN2 (Pins 15,16) | Channel 2 Power Input | Independent 3.6V–15V supply for VTT channel - enables split-rail input architectures. |
| BOOST2 (Pin 17) | Channel 2 High-Side Gate Driver Supply | Bootstrap supply for top MOSFET gate drive; connects to SW2 and external capacitor - critical for 100% duty cycle capability. |
| VTTR (Pin 18) | VTT Reference Output | Buffered VDDQIN × 0.5 output; ±10mA drive, ±1.6% accuracy, supports ≤10nF capacitive loads - feeds DDR VREF and Channel 2 EA. |
| INTVCC (Pin 19) | Internal 3.3V Regulator | Supplies gate drivers and logic; disabled when both RUN pins are low - reduces quiescent current in shutdown. |
| BOOST1 (Pin 20) | Channel 1 High-Side Gate Driver Supply | Identical function to BOOST2 but for VDDQ channel - enables independent bootstrap tuning. |
| VIN1 (Pins 21,22) | Channel 1 Power Input | Primary input for VDDQ rail; powers INTVCC LDO - supports shared or dedicated 12V input. |
| SW1 (Pins 23,24) | Channel 1 Switch Node | Connects to VDDQ inductor; identical swing behavior to SW2 - layout symmetry improves EMI. |
| VON1 (Pin 25) | Channel 1 On-Time Setpoint | Same function as VON2 but for VDDQ - ensures matched frequency behavior across rails. |
| ITH1 (Pin 26) | Channel 1 Error Amplifier Output | Compensation node for VDDQ loop - RC network placement affects load transient recovery time. |
| TRACKSS (Pin 27) | VDDQ Tracking/Soft-Start | 0.3V input forces VFB1 to track; internal 1.4µA pull-up enables capacitor-based soft-start - prevents inrush into DDR VDDQ. |
| VFB1 (Pin 28) | Channel 1 Feedback Input | Connects to resistor divider from VDDQ; compares to internal 0.6V reference - sets precise output voltage. |
| PGND (Pin 29) | Power Ground | Exposed pad; must be soldered to large copper pour - primary return path for high di/dt switch currents and thermal dissipation. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent regulators | VDDQ (0.6–3V, 3A) and VTT (0.75V, ±3A) with separate inputs, enables flexible DDR power architecture and fault isolation. |
| 180° interleaved switching | Reduces input RMS current by ~30%, allowing smaller input bulk capacitors and lower supply noise in dense DDR layouts. |
| VTTR buffered reference | ±10mA, ±1.6% accuracy at 0.75V over –55°C to 150°C - eliminates need for external VREF IC in DDR3/DDR4 designs. |
| Controlled on-time architecture | Maintains constant frequency down to 0.6V VOUT at 12V input - avoids subharmonic oscillation and enables <1µH inductors. |
| Robust protection suite | Includes input overvoltage lockout (17.5V), thermal shutdown, short-circuit protection, and PGOOD filtering - meets DDR system reliability requirements. |
| Extended temperature grade | –55°C to +150°C junction rating - qualified for aerospace, defense, and harsh-environment industrial DDR applications. |
Applications
| DDR3 Memory Subsystem | DDR2 Server DIMM Module |
|---|---|
Use Scenario: Powering DDR3 SDRAM on enterprise server motherboards requiring tight VDDQ (1.5V ±3%) and VTT (0.75V ±1%) regulation under dynamic 0–3A load steps. IC Role / Device Role / Timing Role: Dual-channel PoL regulator delivering synchronized VDDQ and VTT with 180° phase shift to minimize VRM input ripple and meet JEDEC AC timing specs. Use Value: Eliminates discrete VTT LDO and external VREF IC; VTTR accuracy ensures DDR3 setup/hold timing margins remain intact across temperature. |
Use Scenario: Compact DDR2 memory interface in telecom line cards where board space is constrained and thermal management is critical. IC Role / Device Role / Timing Role: Single-package solution generating 1.8V/3A VDDQ and bidirectional 0.9V/±3A VTT with integrated 0.6V reference and VTTR buffer. Use Value: Reduces BOM count by 4 components (VTT LDO, VREF buffer, two input caps); QFN thermal pad enables operation at 85°C ambient without derating. |
| Industrial DDR Memory Controller | Military-Avionics DDR Interface |
Use Scenario: DDR-powered FPGA-based motion controller operating in –40°C to +85°C industrial environments with strict EMC requirements. IC Role / Device Role / Timing Role: High-efficiency dual buck regulating VDDQ and VTT while providing clean, low-noise VTTR reference for FPGA I/O banks. Use Value: Burst Mode® on Channel 1 cuts no-load IQ to 15µA; 180° interleaving lowers conducted EMI peaks by 12dB compared to in-phase operation. |
Use Scenario: Ruggedized avionics display processor requiring DDR2 memory support across –55°C to +125°C operational range. IC Role / Device Role / Timing Role: MIL-qualified dual buck converter (LTC3634MP) delivering radiation-tolerant VDDQ/VTT with guaranteed performance at extreme temperatures. Use Value: –55°C to +150°C qualification enables single-source DDR power across entire flight envelope; PGND-exposed QFN ensures mechanical robustness under vibration. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output DDR power supply applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS51220ARUKT | Single-channel DDR power IC with integrated MOSFETs; requires external VTT LDO and VREF buffer; max input 5.5V. | Only suitable for low-voltage DDR (e.g., LPDDR2) with 3.3V input; cannot replace LTC3634MPUFD#TRPBF in 12V DDR PoL. | Select only for cost-sensitive, low-power DDR interfaces where input voltage ≤5.5V and extended temperature is not required. |
| ISL95812IRZ | Triple-output DDR power IC (VDDQ/VTT/VREF); supports 3.3V–25V input; rated for –40°C to +105°C only. | Provides integrated VREF buffer but lacks –55°C qualification and has higher quiescent current (250µA vs 15µA). | Choose when triple-rail integration is prioritized over military-grade temperature range and ultra-low IQ in standby. |
Compared with TPS51220ARUKT and ISL95812IRZ, the LTC3634MPUFD#TRPBF uniquely combines extended –55°C to +150°C operation, integrated VTTR buffer with ±1.6% accuracy, and 12V-compatible dual-buck architecture - making it the only drop-in solution for high-reliability DDR power in aerospace, defense, and extended industrial systems.
Availability
LTC3634MPUFD#TRPBF is available at Aetrix Electronics and suitable for DDR3 memory subsystems, industrial FPGA platforms, and military avionics requiring stable component supply, long-term lifecycle assurance, and guaranteed extended-temperature performance.
Supply support for LTC3634MPUFD#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its high-performance power management portfolio with rigorous automotive, industrial, and military qualification standards.
The LTC3634MPUFD#TRPBF belongs to Linear's DDR-specific power regulator family, designed explicitly to replace multi-chip DDR power solutions with a single monolithic IC meeting JEDEC timing, accuracy, and transient response requirements.
FAQ
What is the guaranteed operating temperature range for the LTC3634MPUFD#TRPBF?
The LTC3634MPUFD#TRPBF is tested and guaranteed over –55°C to +150°C junction temperature, making it suitable for aerospace, defense, and extended industrial applications where standard commercial or industrial grades fail. This is confirmed in the "ORDER INFORMATION" table of the datasheet, which explicitly lists "–55°C to 150°C" for the MP grade.
Does the LTC3634MPUFD#TRPBF support independent enable control for VDDQ and VTT rails?
Yes, the LTC3634MPUFD#TRPBF provides fully independent enable control via RUN1 (Pin 3) for the VDDQ channel and RUN2 (Pin 6) for the VTT channel. Each has distinct 1.22V rising and 1.01V falling thresholds, enabling precise power sequencing - for example, asserting RUN1 before RUN2 to establish VDDQ before VTT during DDR initialization.
How does the VTTR output of the LTC3634MPUFD#TRPBF achieve ±1.6% accuracy?
The VTTR output of the LTC3634MPUFD#TRPBF achieves ±1.6% accuracy over –55°C to +150°C by using a precision on-chip resistor divider (VDDQIN × 0.5) followed by a low-noise, buffered amplifier. Electrical Characteristics table specifies VTTR = 0.492×VDDQIN to 0.508×VDDQIN at 1.5V–2.6V VDDQIN, confirmed across the full MP temperature range.
Can the LTC3634MPUFD#TRPBF operate with a 12V input and 0.9V VTT output without external compensation?
Yes, the LTC3634MPUFD#TRPBF's controlled on-time architecture enables stable operation at 12V→0.9V conversion without external loop compensation components. The datasheet Typical Application Circuit (Figure 1) shows VTT regulation with only COUT, L2, and basic RC snubbers - no external compensation network is required for basic DDR3 VTT compliance.
What protection features are integrated into the LTC3634MPUFD#TRPBF?
The LTC3634MPUFD#TRPBF integrates input overvoltage lockout (17.5V trip), overtemperature shutdown, short-circuit protection on both channels, and filtered open-drain PGOOD outputs with 40µs glitch rejection. These are documented in the ABSOLUTE MAXIMUM RATINGS, ELECTRICAL CHARACTERISTICS, and OPERATION sections - no external protection circuitry is needed for standard DDR use cases.
LTC3634MPUFD#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- Converter, DDR, DDR2, DDR3
- Voltage - Input:
- 1.4V ~ 15V
- Number of Outputs:
- 2
- Voltage - Output:
- 0.6V ~ 3V
- Operating Temperature:
- -55°C ~ 150°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-QFN (4x5)
LTC3634MPUFD#TRPBF FAQ
1.How can I place an order for LTC3634MPUFD#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3634MPUFD#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3634MPUFD#TRPBF reliable?
The price and inventory of LTC3634MPUFD#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3634MPUFD#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC3634MPUFD#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3634MPUFD#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3634MPUFD#TRPBF?
LTC3634MPUFD#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3634MPUFD#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3634MPUFD#TRPBF?
For technical support, including LTC3634MPUFD#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3634MPUFD#TRPBF requirements.
6.How does Aetrix verify that LTC3634MPUFD#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC3634MPUFD#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3634MPUFD#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC3634MPUFD#TRPBF?
All LTC3634MPUFD#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3634MPUFD#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3634MPUFD#TRPBF part is unused and in its original packaging.
Return procedure for LTC3634MPUFD#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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