Analog Devices Inc. LTC3709EG
- Part No.:
- LTC3709EG
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 36-SSOP (0.209", 5.30mm Width)
- Datasheet:
-
LTC3709EG.pdf
- Description:
- IC ADC SMPL
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC3709EG from Analog Devices (formerly Linear Technology) is a dual-phase, synchronous step-down DC/DC controller implementing constant on-time valley current mode control without requiring an external sense resistor. It delivers 1.5V/30A output with 0.6V ±1% reference, <100ns minimum on-time, and supports tracking/sequencing across multiple regulators. Used in high-current notebook CPU/GPU power supplies.
For engineers reviewing the LTC3709EG datasheet, LTC3709EG pinout, LTC3709EG application, or LTC3709EG equivalent, key selection considerations include its 2-phase interleaved architecture, VRNG-programmable current sense range (50–200mV nominal), PLL-based synchronization capability, and 36-lead SSOP package thermal resistance of 95°C/W.
Technical Context
The LTC3709EG uses a constant on-time, valley current mode control architecture that enables stable operation at very low duty cycles (2% to 90% at 200kHz) without RSENSE. Its two channels operate 180° out of phase, synchronized internally via PLL1 and externally via PLL2 connected to FCB and EXTLPF pins.
Current sensing is configurable via SENSE+ and SENSE− pins for either MOSFET RDS(ON) or discrete resistor methods, with threshold programmable through VRNG (0.5V–2V), yielding nominal sense voltages from 50mV to 200mV. The differential amplifier (VOS+, VOS−, DIFFOUT) provides true remote sensing with 0.995–1.005 gain and ≤7mV input offset.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Topology | Dual-phase synchronous buck controller with interleaved 180° channel timing |
| Reference Voltage | 0.6V ±1% - sets precise output regulation point independent of temperature and line variation |
| Min On-Time | <100ns - enables high VIN-to-VOUT conversion ratios (e.g., 12V→1.5V) without pulse-skipping instability |
| Current Sense Range | Programmable 50–200mV nominal via VRNG pin - allows accurate current limiting with MOSFET RDS(ON) or discrete resistor |
| Tracking Accuracy | ±10mV tracking error at VTRACK = 0.1–0.5V - ensures tight voltage coordination between multiple LTC3709EGs or other regulators |
| Thermal Resistance | θJA = 95°C/W (SSOP package) - defines junction-to-ambient rise under PCB layout conditions per JEDEC JESD51-7 |
| Operating Temp | –40°C to 85°C - validated performance across industrial temperature range with design assurance |
Pinout & Package
Package: 36-lead plastic SSOP (G package), exposed pad not present, body size 11.0mm × 5.0mm, pitch 0.635mm.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RUN/SS (Pin 6) | Run enable & soft-start ramp input | 0.8–2.0V start threshold; internal 1.2µA charge current sets output slew rate (~0.5s/µF); <1.4V forces shutdown |
| ITH (Pin 7) | Error amplifier output / current limit control | Voltage (0–2.4V) directly sets current comparator threshold; 0.8V = zero current detection level |
| VFB (Pin 8) | Feedback input to error amplifier | Connects to resistor divider from VOUT; 0.6V regulation target; ±1% accuracy over temp and line |
| TRACK (Pin 9) | Output tracking/sequencing interface | Accepts external voltage (0.1–0.5V) to coordinate startup and regulation with other regulators |
| SGND (Pins 10, 11) | Signal ground reference | Return for all small-signal components (CSS, compensation network); must tie to PGND at single point |
| VOS−, VOS+, DIFFOUT (Pins 12, 14, 13) | Differential remote sensing inputs/output | VOS−/VOS+ accept Kelvin connections to VOUT−/VOUT+; DIFFOUT drives internal EA for improved load regulation |
| ION (Pin 30) | On-time programming input | Resistor from VIN sets tON ≈ 0.7 × 30pF / IION; enables frequency stability across input voltage variation |
| FCB (Pin 31) | Forced continuous / external clock input | Ground = forced CCM; VCC = DCM; AC signal = PLL lock to external clock with 1.0–2.0V threshold |
| VRNG (Pin 32) | Sense voltage range selection | 0.5–2.0V input sets nominal current sense threshold (VRNG/7.5); defaults to 70mV (GND) or 140mV (VCC) |
| PGOOD (Pin 2) | Open-drain power-good status | Pulled low when VFB deviates >±10% for ≥100µs; requires external pull-up; indicates valid regulation |
Key Features
| Feature | Design Value |
|---|---|
| No RSENSE operation | Uses synchronous MOSFET RDS(ON) for current sensing - eliminates sense resistor cost, board space, and conduction loss |
| True differential remote sensing | VOS+/VOS− inputs with 0.995–1.005 gain and ≤7mV offset - rejects PCB IR drop and ground loop errors in high-current systems |
| Interleaved dual-phase control | Internal 180° phase shift (PLL1) reduces input/output ripple current by ~70% vs single-phase - lowers capacitor RMS stress and EMI |
| Programmable current limit | VRNG pin adjusts nominal sense threshold from 50mV to 200mV - enables precise overcurrent protection matching MOSFET RDS(ON) drift |
| External clock synchronization | FCB + EXTLPF pins support PLL2 lock to external clock - enables system-level timing alignment and noise reduction in multi-rail designs |
Applications
| Notebook CPU Core Power | ASIC/FPGA Core Supply |
|---|---|
Use Scenario: High-current, dynamically scaling core voltage for Intel/AMD mobile processors requiring fast transient response and tight voltage tolerance. IC Role / Device Role / Timing Role: Dual-phase synchronous buck controller delivering 1.5V/30A with interleaved switching and differential remote sensing. Use Value: Achieves >90% efficiency at 10A load with 12V input; 100µs PGOOD delay prevents false fault triggering during load transients. |
Use Scenario: Multi-rail power delivery for high-performance FPGA or ASIC where sequencing and voltage tracking between core, I/O, and auxiliary rails is mandatory. IC Role / Device Role / Timing Role: Tracking-capable controller coordinating startup and regulation with companion LTC3709EGs or other DC/DC regulators via TRACK pin. Use Value: ±10mV tracking error at 0.3V TRACK input ensures <±0.5% output deviation between rails during power-up and steady state. |
| Graphics Processor VRM | Industrial Embedded DSP Supply |
Use Scenario: Compact, high-efficiency power stage for discrete GPU or integrated graphics in thin-and-light notebooks with strict thermal limits. IC Role / Device Role / Timing Role: Constant on-time valley current mode controller enabling stable 2%–90% duty cycle operation without slope compensation. Use Value: <100ns minimum on-time supports 12V→0.85V conversion at 220kHz; θJA = 95°C/W allows use with standard 2-layer PCB layout. |
Use Scenario: Reliable, long-lifecycle power supply for industrial embedded DSPs operating in extended temperature environments (–40°C to 85°C). IC Role / Device Role / Timing Role: Robust dual-phase controller with overvoltage/undervoltage protection, short-circuit shutdown timer, and latch-off recovery. Use Value: Output overvoltage protection triggers within 100µs at >±10% deviation; RUN/SS capacitor discharge enables programmable fault timeout (e.g., 10ms–1s). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-phase synchronous buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3709EUH | Same die, 32-lead QFN package with θJA = 34°C/W; exposed pad soldered to SGND; smaller footprint (5mm × 5mm) | Better thermal performance required for high-power density designs; requires rework of thermal pad layout and solder stencil | Select LTC3709EUH when board space is constrained and thermal management prioritizes low θJA over SSOP compatibility |
| LTC3855 | Single-phase controller with integrated MOSFET drivers; no TRACK or differential sensing; supports up to 60V input | Lower current (<15A), non-tracking applications where simplicity and cost outweigh multi-phase benefits | Choose LTC3855 only for single-rail, lower-current systems lacking sequencing requirements and remote sensing needs |
Compared with LTC3709EUH, the LTC3709EG offers SSOP compatibility and legacy layout support but higher thermal resistance; compared with LTC3855, it provides true dual-phase interleaving, tracking, and differential sensing essential for high-current, multi-rail systems.
Availability
LTC3709EG is available at Aetrix Electronics and suitable for notebook CPU core power, ASIC/FPGA multi-rail sequencing, and industrial DSP supply applications requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for LTC3709EG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full product support, documentation, and manufacturing continuity for the LTC portfolio.
The LTC3709EG belongs to Linear's high-performance PolyPhase® DC/DC controller family, designed specifically for high-current, low-voltage digital IC power delivery with emphasis on efficiency, accuracy, and system-level coordination.
FAQ
What is the maximum input voltage supported by the LTC3709EG?
The LTC3709EG supports an input supply voltage (VIN) up to 28V on the VCC and DRVCC pins, and switch node (SW1/SW2) ratings extend to 31V. This allows the LTC3709EG to regulate outputs from 12V or 24V intermediate bus rails down to 0.6V, making it suitable for high-step-down applications like CPU core supplies in notebooks and servers.
Does the LTC3709EG require an external current sense resistor?
No, the LTC3709EG does not require an external current sense resistor. It supports No RSENSE operation by using the RDS(ON) of the synchronous bottom MOSFETs for current sensing. Alternatively, a discrete sense resistor can be used by connecting SENSE+ and SENSE− across it - both methods are supported and selectable via PCB layout in the LTC3709EG design.
How is output voltage tracking implemented on the LTC3709EG?
Output voltage tracking on the LTC3709EG is implemented via the TRACK pin (Pin 9), which accepts an external analog voltage (0.1V–0.5V). When connected to a resistive divider from another regulator's output, the LTC3709EG adjusts its feedback reference to match the tracked rail's behavior - achieving coincident or ratiometric startup and regulation. The LTC3709EG's tracking error is specified at ±10mV across the operating range.
What thermal derating applies to the LTC3709EG in SSOP package?
The LTC3709EG in 36-lead SSOP package has a junction-to-ambient thermal resistance (θJA) of 95°C/W, as confirmed in the Absolute Maximum Ratings table. Junction temperature is calculated as TJ = TA + (PD × 95°C/W). Designers must ensure peak power dissipation stays within limits to maintain TJ ≤ 125°C across –40°C to 85°C ambient conditions.
Can the LTC3709EG synchronize to an external clock, and how is it configured?
Yes, the LTC3709EG can synchronize to an external clock via the FCB pin (Pin 31) and EXTLPF pin (Pin 15). An AC-coupled clock signal (1.0–2.0V threshold) applied to FCB engages PLL2, which locks channel 1's on-time to the external clock's rising edge. The EXTLPF filter (RIPLL ≤ 1kΩ, CIPLL = 10–100nF) stabilizes the loop, enabling deterministic timing alignment in multi-converter systems.
LTC3709EG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- PolyPhase®
- Package/Case:
- 36-SSOP (0.209", 5.30mm Width)
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Output Type:
- Transistor Driver
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Number of Outputs:
- 1
- Output Phases:
- 2
- Voltage - Supply (Vcc/Vdd):
- 3.9V ~ 37V
- Frequency - Switching:
- -
- Duty Cycle (Max):
- 90%
- Synchronous Rectifier:
- Yes
- Clock Sync:
- No
- Serial Interfaces:
- -
- Control Features:
- Enable, Power Good, Soft Start, Tracking
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 36-SSOP
LTC3709EG FAQ
1.How can I place an order for LTC3709EG through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3709EG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3709EG reliable?
The price and inventory of LTC3709EG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3709EG is usually 5 days.
3.What payment methods are accepted for LTC3709EG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3709EG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3709EG?
LTC3709EG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3709EG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3709EG?
For technical support, including LTC3709EG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3709EG requirements.
6.How does Aetrix verify that LTC3709EG is sourced from the original manufacturer or authorized distributors?
All LTC3709EG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3709EG meets industry standards.
7.What is the process for return or replacement of LTC3709EG?
All LTC3709EG units undergo pre-shipment inspection (PSI). If there is an issue with LTC3709EG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3709EG part is unused and in its original packaging.
Return procedure for LTC3709EG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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