Analog Devices Inc. LTC3709EUH#PBF
- Part No.:
- LTC3709EUH#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 32-WFQFN Exposed Pad
- Datasheet:
-
LTC3709EUH#PBF.pdf
- Description:
- IC REG CTRLR BUCK 32QFN
- Quantity:
- Payment:

- Shipping:

Inventory:303
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC3709EUH#PBF from Analog Devices (formerly Linear Technology) is a dual-phase, synchronous step-down DC/DC controller implementing constant on-time valley current mode control without requiring an external sense resistor. It delivers 1.5V/30A output with 0.6V ±1% reference, <100ns minimum on-time, and supports tracking/sequencing across multiple regulators. Used in high-current notebook CPU/GPU power supplies.
For engineers reviewing the LTC3709EUH#PBF datasheet, LTC3709EUH#PBF pinout, LTC3709EUH#PBF application, or LTC3709EUH#PBF equivalent, key selection criteria include its no-RSENSE operation, 2-phase interleaved architecture, programmable current limit via VRNG, true remote differential sensing, and PLL-based synchronization capability.
Technical Context
The LTC3709EUH#PBF employs a constant on-time, valley current mode control architecture enabling stable low-duty-cycle operation down to 2% at 200kHz without a sense resistor. Its two channels operate 180° out of phase, synchronized internally via PLL1 for dual-phase interleaving or externally via PLL2 through the FCB pin.
It integrates a true differential amplifier (VOS+/VOS–/DIFFOUT) for Kelvin output voltage sensing, a programmable overvoltage protection comparator (±10% threshold), and a user-adjustable soft-start using the RUN/SS pin capacitor. Current limit is set by VRNG voltage (0.5V–2V), defining nominal sense voltage from 50mV to 200mV.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Topology | Dual-phase synchronous buck controller - enables interleaved operation for reduced input/output ripple and higher effective switching frequency. |
| Reference Voltage | 0.6V ±1% - sets precise output regulation point; tolerance directly impacts output accuracy under load and line variation. |
| Min On-Time | <100ns - supports high VIN-to-VOUT ratios (e.g., 12V→1.5V) while maintaining stable regulation at high frequencies. |
| Current Sense | No RSENSE option - uses MOSFET RDS(ON) for current sensing; eliminates sense resistor losses and board space, but requires careful MOSFET selection. |
| Tracking/Sequencing | Coherent or ratiometric via TRACK pin - allows coordinated startup/shutdown with other LTC3709 or compatible regulators in multi-rail systems. |
| Protection Features | Output overvoltage (±10%), PGOOD with 100µs delay, optional short-circuit shutdown timer - ensures system-level fault containment without external circuitry. |
| Operating Frequency | Programmable via ION pin resistor - enables optimization between efficiency (lower fSW) and component size (higher fSW). |
| Package | 32-lead 5mm × 5mm QFN (UH) - exposed pad soldered to SGND for thermal performance; θJA = 34°C/W. |
Pinout & Package
Package: 32-lead (5mm × 5mm) plastic QFN with exposed thermal pad connected to SGND. Pin 33 is the exposed pad and must be soldered to PCB ground for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RUN/SS (Pin 1) | Run enable & soft-start timing input | Capacitor here sets output ramp rate (~0.5s/µF) and short-circuit timeout; falling below 1.4V shuts down both phases. |
| ITH (Pin 2) | Error amplifier output / current limit control | Voltage (0–2.4V) sets current comparator threshold; 0.8V = zero current, enabling DCM detection. |
| VFB (Pin 3) | Feedback input to error amplifier | Connects to resistor divider from VOUT; 0.6V reference defines regulation point; used for compensation network attachment. |
| TRACK (Pin 4) | Tracking/sequencing reference input | Accepts voltage from another regulator's output divider to coordinate startup or maintain fixed ratio between rails. |
| SGND (Pins 5,6) | Signal ground reference | Return for small-signal components (CSS, compensation); must connect to PGND at single point to avoid ground loops. |
| VOS– / VOS+ (Pins 7,9) | Differential amplifier inputs | Kelvin sense connections to VOUT– and VOUT+ respectively; reject PCB IR drop and improve regulation accuracy at high load. |
| DIFFOUT (Pin 8) | Differential amplifier output | Drives internal error amplifier; enables true remote sensing independent of power ground path. |
| EXTLPF / INTLPF (Pins 10,11) | PLL loop filter connections | EXTLPF synchronizes to external clock; INTLPF locks second channel 180° out-of-phase with first; RC values set PLL stability. |
| VCC (Pin 17) | Main supply input (4.5–28V) | Power source for logic and bias circuits; requires RC decoupling (1Ω + 0.1µF) to SGND for noise immunity. |
| DRVCC (Pin 21) | Driver supply input | Supplies bottom gate drivers and charges bootstrap capacitors; typically 5V derived from VOUT or auxiliary rail. |
| BG1/BG2 (Pins 22,20) | Bottom gate drive outputs | Drive N-channel MOSFET sources; swing from PGND to DRVCC; require low-inductance layout near MOSFETs. |
| PGND1/PGND2 (Pins 23,19) | Power ground returns | Must tie directly to bottom MOSFET sources and CDRVCC/CIN negative terminals to minimize switching noise coupling. |
| SENSE1–/SENSE2– (Pins 24,18) | Current sense comparator (–) inputs | Kelvin connection to MOSFET source or sense resistor low side; critical for accurate valley current detection. |
| SENSE1+/SENSE2+ (Pins 25,16) | Current sense comparator (+) inputs | Connected to SW node (RDS(ON) sensing) or sense resistor high side; determines current measurement path. |
| SW1/SW2 (Pins 26,15) | Switch node connections | High dv/dt nodes connecting to inductor and bootstrap diode cathodes; require tight layout and guard rings. |
| TG1/TG2 (Pins 27,14) | Top gate drive outputs | Floating drivers swinging from SW to SW+DRVCC; drive top N-MOSFET gates; demand low-impedance bootstrap paths. |
| BOOST1/BOOST2 (Pins 28,13) | Bootstrap capacitor positive terminals | Swing up to VIN + DRVCC; must use low-ESR ceramic capacitors (0.1–1µF) placed adjacent to pins. |
| PGOOD (Pin 29) | Open-drain power-good indicator | Pulled low when VFB deviates >±10% for ≥100µs; requires external pull-up; signals system readiness to downstream logic. |
| ION (Pin 30) | On-time current programming input | Resistor from VIN sets one-shot timer current; determines nominal switching frequency and VIN compensation. |
| FCB (Pin 31) | Forced continuous / external clock input | GND = forced CCM; VCC = DCM; AC signal = external synchronization; enables precise timing coordination across converters. |
| VRNG (Pin 32) | Sense voltage range programming | Voltage (0.5–2V) sets nominal current sense threshold (≈VRNG/7.5); defaults to 70mV (GND) or 140mV (VCC). |
Key Features
| Feature | Design Value |
|---|---|
| No RSENSE operation | Eliminates sense resistor losses and board area; relies on MOSFET RDS(ON) for current sensing - improves efficiency but demands tight RDS(ON) tolerance and thermal derating. |
| True remote differential sensing | VOS+/VOS–/DIFFOUT architecture rejects PCB trace resistance and interconnect voltage drops - maintains ±1% regulation accuracy at 30A output current. |
| 2-phase interleaved control | Channels operate 180° out-of-phase via internal PLL - cuts input/output ripple current by ~50%, reduces EMI, and spreads thermal load across two phases. |
| Programmable current limit | VRNG pin accepts 0.5–2V to set nominal sense voltage (50–200mV); enables precise current limiting without changing external components. |
| External clock synchronization | FCB pin accepts external clock; PLL2 aligns channel 1 turn-on edge to rising edge - essential for noise-sensitive or multi-converter timing-critical systems. |
| Adjustable soft-start & sequencing | RUN/SS capacitor controls output ramp rate and enables coordinated startup with other rails via TRACK pin - prevents inrush current and bus collapse in multi-regulator systems. |
Applications
| Notebook CPU Power Supply | ASIC/FPGA Core Voltage Regulator |
|---|---|
Use Scenario: High-current, dynamically scaling core supply for Intel/AMD mobile processors requiring fast transient response and tight voltage tolerance. IC Role / Device Role / Timing Role: Dual-phase synchronous buck controller delivering 1.5V/30A with valley current mode control and no-RSENSE operation. Use Value: Achieves >90% efficiency at full load while maintaining <±1% output regulation via differential sensing and 0.6V reference. | Use Scenario: Point-of-load regulator for high-performance ASICs or FPGAs with aggressive current slew rates and strict power sequencing requirements. IC Role / Device Role / Timing Role: Tracking-capable dual-phase controller coordinating startup with I/O and memory rails using the TRACK pin. Use Value: Enables ratiometric or coincident sequencing with companion regulators, reducing system-level power-up complexity and ensuring safe logic state transitions. |
| Graphics Processor (GPU) Power Module | Industrial Embedded DSP Power |
Use Scenario: Compact, high-efficiency power stage for discrete or integrated GPUs in thin-and-light notebooks and mobile workstations. IC Role / Device Role / Timing Role: Interleaved 2-phase controller minimizing input capacitance requirements and thermal hotspots via phase-shifted switching. Use Value: Reduces RMS input current by ~30% versus single-phase design, allowing smaller input capacitors and lower conduction losses in compact form factors. | Use Scenario: Reliable, long-lifecycle power solution for industrial DSPs operating in extended temperature environments with stringent EMC requirements. IC Role / Device Role / Timing Role: Synchronous buck controller with external clock sync (FCB) and overvoltage protection for noise-immune operation in electrically harsh settings. Use Value: External clock synchronization suppresses switching frequency harmonics, easing compliance with CISPR 22/32 Class B emissions limits. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-phase synchronous buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3855IUHF#PBF | Single-phase controller with integrated MOSFET drivers; lacks dual-phase interleaving and TRACK pin; supports wider VIN (4–38V). | Requires two ICs to match LTC3709EUH#PBF's 2-phase capability; suitable only for lower-current or non-interleaved designs. | Select when board space permits dual ICs and differential sensing is not required; avoid when phase interleaving or rail coordination is needed. |
| MP8765GL-Z | Monolithic dual-phase buck converter (integrated MOSFETs); fixed 0.6V reference; no TRACK or differential sensing; max 25A per phase. | Eliminates external MOSFETs and layout complexity but sacrifices design flexibility, current sense method choice, and precision tracking capability. | Choose for cost-sensitive, space-constrained applications where 50A total output suffices and external MOSFET optimization is unnecessary. |
Compared with LTC3709EUH#PBF, LTC3855IUHF#PBF requires duplication for dual-phase operation and lacks rail coordination, while MP8765GL-Z trades configurability and sensing accuracy for integration and ease of use - making LTC3709EUH#PBF optimal for high-precision, high-current, multi-rail notebook and embedded power systems.
Availability
LTC3709EUH#PBF is available at Aetrix Electronics and suitable for notebook CPU power supplies, ASIC/FPGA core voltage regulation, and graphics processor power modules requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for LTC3709EUH#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (including former Linear Technology products) is a global leader in high-performance analog, mixed-signal, and power management semiconductors, serving precision instrumentation, communications, and power conversion markets.
The LTC3709EUH#PBF belongs to Linear's PolyPhase® valley current mode controller product line, designed specifically for high-efficiency, high-current, multi-phase DC/DC conversion in space-constrained computing and embedded systems.
FAQ
What is the minimum on-time specification for the LTC3709EUH#PBF and why does it matter?
The LTC3709EUH#PBF has a minimum on-time of less than 100ns. This specification enables stable regulation at very low duty cycles - for example, stepping down 12V to 1.5V (12.5% duty cycle) while maintaining high-frequency operation (~220kHz). It ensures reliable startup and light-load performance without pulse-skipping artifacts, critical for CPU/GPU core supplies with wide input-output differentials.
Can the LTC3709EUH#PBF operate without an external current sense resistor?
Yes, the LTC3709EUH#PBF supports no-RSENSE operation by using the RDS(ON) of the synchronous bottom MOSFETs as the current sensing element. The SENSE+ pins connect to the switch nodes (SW1/SW2), and SENSE– pins connect to the MOSFET sources. This eliminates sense resistor losses and board area but requires careful MOSFET selection with tightly specified and thermally stable RDS(ON).
How does the TRACK pin function in the LTC3709EUH#PBF and what are its practical use cases?
The TRACK pin on the LTC3709EUH#PBF accepts a voltage from a resistive divider on another regulator's output, enabling either coincident (same ramp rate) or ratiometric (fixed voltage ratio) tracking during startup and shutdown. Practical use cases include coordinating core and I/O rail sequencing in FPGAs or ensuring matched voltage ramps across CPU and GPU power domains in notebooks to prevent latch-up or reverse biasing.
What is the role of the VRNG pin on the LTC3709EUH#PBF and how does it affect current limiting?
The VRNG pin on the LTC3709EUH#PBF sets the nominal current sense threshold voltage - approximately VRNG/7.5 - ranging from 50mV (VRNG = 0.5V) to 200mV (VRNG = 2V). It directly programs the current limit level without changing external components. Tying VRNG to GND or VCC yields default thresholds of 70mV or 140mV, respectively, simplifying design for common current ranges.
Does the LTC3709EUH#PBF support external clock synchronization, and how is it implemented?
Yes, the LTC3709EUH#PBF supports external clock synchronization via the FCB pin. Applying an AC clock signal to FCB engages PLL2, which adjusts channel 1's on-time to match the external frequency and aligns its top-FET turn-on edge to the clock's rising edge. This feature is essential for EMI reduction in noise-sensitive systems and for deterministic timing across multiple synchronized power stages.
LTC3709EUH#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- PolyPhase®
- Package/Case:
- 32-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Number of Outputs:
- 1
- Output Phases:
- 2
- Voltage - Supply (Vcc/Vdd):
- 3.9V ~ 37V
- Frequency - Switching:
- -
- Duty Cycle (Max):
- 90%
- Synchronous Rectifier:
- Yes
- Clock Sync:
- No
- Serial Interfaces:
- -
- Control Features:
- Enable, Power Good, Soft Start, Tracking
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-QFN (5x5)
LTC3709EUH#PBF FAQ
1.How can I place an order for LTC3709EUH#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3709EUH#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3709EUH#PBF reliable?
The price and inventory of LTC3709EUH#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3709EUH#PBF is usually 5 days.
3.What payment methods are accepted for LTC3709EUH#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3709EUH#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3709EUH#PBF?
LTC3709EUH#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3709EUH#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3709EUH#PBF?
For technical support, including LTC3709EUH#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3709EUH#PBF requirements.
6.How does Aetrix verify that LTC3709EUH#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3709EUH#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3709EUH#PBF meets industry standards.
7.What is the process for return or replacement of LTC3709EUH#PBF?
All LTC3709EUH#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3709EUH#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3709EUH#PBF part is unused and in its original packaging.
Return procedure for LTC3709EUH#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC3709EUH#PBF Tags

-
UCC28C45DR
Texas Instruments

-
UCC28C40DR
Texas Instruments

-
UCC28C43DR
Texas Instruments

-
ZXSC410E6TA
Diodes Incorporated
-
LM3524DMX/NOPB
Texas Instruments
-
LM3489MMX/NOPB
Texas Instruments

-
MIC2102YML-TR
Microchip Technology

-
LM5148RGYR
Texas Instruments
-
TL598CDR
Texas Instruments

-
LM5155DSSR
Texas Instruments

-
LM25085MYX/NOPB
Texas Instruments

-
UCC2813DTR-0
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
