Analog Devices Inc. LTC3711EGN#PBF

Overview

LTC3711EGN#PBF from Analog Devices (formerly Linear Technology) is a synchronous step-down switching regulator controller designed for CPU power delivery in mobile computing platforms. It delivers 0.925V–2.000V output via 5-bit VID code, supports 4V–36V input, achieves <100ns minimum on-time, and operates without external sense resistor using valley current mode control. It targets high-efficiency, fast-transient mobile Pentium® processor supplies.

For engineers reviewing the LTC3711EGN#PBF datasheet, LTC3711EGN#PBF pinout, LTC3711EGN#PBF application, or LTC3711EGN#PBF equivalent, key selection criteria include its no-RSENSE architecture, programmable current limit, active voltage positioning support, ceramic-capacitor stability, and 24-lead narrow SSOP package compatibility with Intel mobile VID specifications.

Technical Context

The LTC3711EGN#PBF implements true valley current mode control with a one-shot timer determining top MOSFET on-time, enabling stable operation at very low duty cycles without current-sense resistors. Its feedback loop uses a 5-bit VID DAC to set VFB reference, while ITH voltage directly controls current comparator threshold across 0V–2.4V range.

It features dual N-channel MOSFET synchronous drive with independent TG and BG outputs, internal 5V INTVCC regulator (switchable to EXTVCC ≥4.7V), and integrated protections including foldback current limiting, ±7.5% PGOOD monitoring, output overvoltage shutdown, and optional short-circuit timer. Discontinuous mode is selectable via FCB pin.

Key Specifications

Pinout & Package

The LTC3711EGN#PBF is housed in a 24-lead narrow plastic SSOP (GN) package with exposed pad for thermal enhancement. Pin spacing is 0.65mm, body dimensions are 7.6mm × 4.9mm × 1.75mm (max), and recommended PCB footprint follows Analog Devices' MS-013AB specification.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous step-down controller applications.

Compared with LTC3711EGN#PBF, LTC3714EGN#PBF extends input range and adds bootstrap integration but increases BOM count; ISL6227CRZ-T reduces footprint and quiescent current but sacrifices programmability and thermal robustness in extended temperature operation.

Availability

LTC3711EGN#PBF is available at Aetrix Electronics and suitable for mobile CPU power, notebook system rails, and industrial embedded computing applications requiring stable component supply, long-term lifecycle support, and guaranteed industrial temperature grade performance.

Supply support for LTC3711EGN#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (including legacy Linear Technology products) is a global leader in high-performance analog, mixed-signal, and power management semiconductors, serving precision instrumentation, communications, and power conversion markets.

The LTC3711EGN#PBF belongs to the Linear Technology LTC37xx family of synchronous buck controllers, engineered specifically for high-efficiency, fast-transient CPU and SoC core power in mobile and embedded computing systems.

FAQ

What is the minimum input voltage required for LTC3711EGN#PBF to maintain regulation at 1.5V output?

The minimum input voltage depends on duty cycle limits and minimum off-time. With t_OFF(MIN) ≈ 400ns and t_ON(MIN) < 100ns, LTC3711EGN#PBF can sustain regulation down to ~3.9V input at 1.5V output before entering dropout. Undervoltage lockout releases at 3.5V (rising), ensuring clean startup above this threshold. Designers should verify margin using Figure 5 (Max Duty Cycle vs Frequency) from the LTC3711EGN#PBF datasheet.

Can LTC3711EGN#PBF operate without a sense resistor, and how is current limit set?

Yes, LTC3711EGN#PBF is explicitly designed for no-RSENSE operation using the bottom MOSFET's R_DS(ON) as the current sense element. Current limit is set by the VRNG pin voltage (0.5V–2V), which scales the nominal sense threshold from 70mV to 140mV; maximum sense voltage equals ~1.33×VRNG. The ITH voltage then directly modulates the valley current threshold from 0V to 2.4V, allowing precise programmable current limiting without external components.

Does LTC3711EGN#PBF support ceramic output capacitors, and what is the minimum recommended value?

Yes, LTC3711EGN#PBF is fully stable with ceramic output capacitors due to its valley current mode architecture and Type II compensation support at the ITH node. For a 15A/1.5V design, Analog Devices recommends ≥270µF total C_OUT (e.g., four 68µF X5R 2V ceramics) to meet transient response and ripple targets. ESR is not required for stability, enabling use of low-impedance MLCC arrays.

How does the RUN/SS pin function during startup and fault recovery for LTC3711EGN#PBF?

The RUN/SS pin serves dual roles: applying <0.8V forces LTC3711EGN#PBF into micropower shutdown (<30µA), while releasing it initiates soft-start via internal 1.2µA current charging an external capacitor. When voltage reaches 1.5V, switching begins with ITH clamped to ~0.6V below RUN/SS voltage, gradually releasing current limit. During overcurrent latchoff, RUN/SS must be cycled low-to-high to reset the fault - no automatic retry is implemented in LTC3711EGN#PBF.

What is the purpose of the FCB pin on LTC3711EGN#PBF, and how does it affect light-load efficiency?

The FCB (Forced Continuous) pin on LTC3711EGN#PBF selects between discontinuous conduction mode (DCM) and forced continuous conduction mode (CCM) at light loads. Tying FCB to INTVCC enables DCM, reducing switching losses and improving efficiency below ~1A. Tying FCB to ground forces CCM, suppressing audible noise and enabling accurate secondary-winding regulation in multi-rail converters - at the cost of ~2–3% efficiency penalty at light loads.