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Analog Devices Inc. LTC3717EUH-1#PBF

Part No.:
LTC3717EUH-1#PBF
Manufacturer:
Analog Devices Inc.
Category:
Special Purpose Regulators
Package:
32-WFQFN Exposed Pad
Datasheet:
AetrixLTC3717EUH-1#PBF.pdf
Description:
IC REG CTRLR DDR 1OUT 32QFN
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:1,848

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Product details

Overview

LTC3717EUH-1#PBF from Analog Devices (formerly Linear Technology) is a synchronous step-down controller optimized for DDR/QDR memory termination, delivering true valley current-mode control without requiring an external sense resistor. It supports 4V–36V input, generates VOUT = ½ × VREF with ±0.65% accuracy, provides symmetrical ±20A sink/source current limiting, and achieves up to 97% efficiency in high-density server memory power rails.

For engineers reviewing the LTC3717EUH-1#PBF datasheet, LTC3717EUH-1#PBF pinout, LTC3717EUH-1#PBF application, or LTC3717EUH-1#PBF equivalent, this controller is selected for precision DDR termination supplies where ultrafast transient response, ceramic-capacitor stability, and programmable switching frequency up to 1.5MHz are critical design requirements.

Technical Context

The LTC3717EUH-1#PBF implements a valley current-mode architecture with a one-shot timer controlling top-FET on-time, enabling stable operation at very low duty cycles (2%–90% at 200kHz) and tON(MIN) ≤ 100ns. Its dual-path current sensing-using either MOSFET RDS(ON) or an optional external resistor-supports symmetrical source/sink current limits up to 20A with VRNG-programmable sense voltage range (50mV–200mV nominal).

Frequency regulation is achieved via ION and VON pins: ION sets nominal frequency via external resistor (up to 1.5MHz), while VON enables constant-frequency operation across VIN/VOUT variations by making on-time proportional to output voltage. The controller integrates overvoltage protection, power-good monitoring, soft-start sequencing, and EXTVCC switchover for gate-drive efficiency optimization.

Key Specifications

Parameter Value and Actual Design Meaning
VIN Range 4V to 36V - supports wide-input industrial and server power rails without pre-regulation.
VOUT Accuracy ±0.65% - ensures tight DDR/QDR termination voltage compliance (e.g., 1.25V ±8.1mV).
Max Output Current ±20A symmetrical sink/source - meets peak current demands of DDR3/DDR4 memory bus transients.
Switching Frequency Up to 1.5MHz - enables compact magnetics and fast load-step response in space-constrained modules.
tON(MIN) ≤100ns - supports high VIN-to-VOUT step-down ratios (e.g., 24V→1.25V) at high frequency without pulse-skipping.
Efficiency Up to 97% - minimizes thermal load in dense memory subsystems with minimal heatsinking.
Package 32-lead 5mm × 5mm QFN with exposed SGND pad - provides low-inductance thermal path and signal integrity for high-speed switching.

Pinout & Package

Package: 32-lead (5mm × 5mm) plastic QFN (UH package); exposed pad (Pin 33) is SGND and must be soldered to PCB for thermal and noise performance.

Pin/Terminal Circuit Role Design Meaning
VON (1) On-time voltage input Sets one-shot timer trip point; tied to VOUT for constant-frequency operation across output voltage changes.
PGOOD (2) Open-drain power-good monitor Pulled low when VFB deviates >±10% from regulation point - enables system-level fault signaling and supply sequencing.
VRNG (3) Sense voltage range select 10× nominal sense voltage (50–200mV); configures current limit threshold for MOSFET RDS(ON)-based or resistor-based sensing.
ITH (4) Error amplifier compensation / current threshold 0–2.4V control voltage sets valley current limit; also serves as loop compensation node for stability tuning.
SGND (5)/EP (33) Signal ground reference Reference for all small-signal circuitry; electrically connected to exposed pad - requires low-impedance PCB connection to PGND at single point.
ION (6) On-time current input Resistor from VIN sets switching frequency; current into pin determines tON and thus operating frequency.
VFB (7) Feedback input Internally divides VOUT to 2/3 × VFB; compared to 1/3 × VREF to regulate output - no external divider needed for standard DDR termination.
VREF (10) Reference input External reference sets VOUT = ½ × VREF, PGOOD thresholds, and short-circuit shutdown level - supports tracking/margining applications.
EXTVCC (15) External gate-drive supply input Switchover point at 4.7V; bypasses internal LDO to draw INTVCC from efficient external 5V rail - improves overall system efficiency.
VIN (16) Main input supply 4V–36V primary power input; powers internal circuits and top/bottom gate drivers via INTVCC/DRVCC paths.
INTVCC (17) Internal regulator output 5V ±3% regulated supply for control logic and gate drivers; decoupled with ≥4.7µF low-ESR capacitor.
DRVCC (18) Bottom gate driver supply Powered from INTVCC; drives BG pin with rail-to-rail swing - requires local RC filter (1Ω/0.1µF) and ≥4.7µF decoupling.
BG (19) Bottom gate drive output Drives source of synchronous N-MOSFET between PGND and DRVCC - supports high-current sinking during memory bus discharge.
PGND (20) Power ground return Low-inductance return path for bottom MOSFET source, CIN, and CVCC - must be tightly coupled to MOSFET source pad.
SENSE– (21) Negative current sense input Connected to PGND or MOSFET source; forms Kelvin pair with SENSE+ to reject common-mode noise in RDS(ON) sensing.
SENSE+ (23) Positive current sense input Connected to SW node (for RDS(ON)) or sense resistor high-side - enables no-RSENSE operation with <100ns minimum on-time.
SW (24) Switch node Connects to bootstrap capacitor (–) terminal and MOSFET drains; swings from ~–0.3V to VIN - defines timing and gate-drive reference.
TG (27) Top gate drive output Drives gate of high-side N-MOSFET with INTVCC-referenced swing superimposed on SW node - enables high-side switching without isolated supply.
BOOST (28) Bootstrap capacitor (+) terminal Charged from INTVCC via Schottky diode during low-side conduction; supplies floating gate drive for TG pin.
RUN/SS (31) Run enable / soft-start input 0.8V threshold shutdown; external capacitor sets soft-start ramp time (~3s/µF) and overcurrent latchoff delay.

Key Features

Feature Design Value
No RSENSE operation Uses bottom MOSFET RDS(ON) for current sensing - eliminates sense resistor cost, board area, and conduction losses.
Valley current-mode control Enables stable operation at ultra-low duty cycles (2%) and sub-100ns minimum on-time - essential for high-VIN DDR supplies.
Symmetrical ±20A current limiting Programmable sink/source limits match DDR bus bidirectional current demands - prevents overshoot/undershoot during data transitions.
Ceramic-output-capacitor stability Compensated for zero-ESR ceramic capacitors - eliminates need for bulk electrolytics and reduces output impedance across frequency.
True constant-frequency operation VON and ION pins jointly maintain stable fSW across VIN, VOUT, and load changes - simplifies EMI filtering and thermal design.
Integrated overvoltage protection Shuts down top FET and latches bottom FET on if VOUT exceeds +10% - protects DDR memory from destructive overvoltage events.

Applications

DDR Memory Termination QDR Memory Power

Use Scenario: Termination of DDR3/DDR4 memory buses in servers and workstations requiring precise 1.25V, 1.35V, or 1.5V VTT rails.

IC Role / Device Role / Timing Role: Synchronous buck controller generating VTT = ½ × VREF with ultrafast transient response to memory data strobes.

Use Value: ±0.65% accuracy and ±20A symmetrical current handling ensure DDR bus signal integrity under dynamic read/write loads.

Use Scenario: Power delivery for Quad Data Rate (QDR) SRAM used in networking ASICs and FPGA-based accelerators.

IC Role / Device Role / Timing Role: High-bandwidth termination controller supporting QDR's dual-edge clocking with sub-100ns on-time capability.

Use Value: Valley current mode and ceramic-capacitor compatibility deliver <50mV output ripple during 10A load steps - critical for QDR timing margins.

Tracking/Margining Supply Notebook/Desktop Memory Rail

Use Scenario: Programmable VTT supply that tracks or margins against main VDDQ rail in test and validation environments.

IC Role / Device Role / Timing Role: Controller using external VREF to set VOUT = ½ × VREF, with RUN/SS and ITH enabling dynamic voltage margining.

Use Value: VREF pin accepts adjustable reference (e.g., DAC output), enabling ±5% VTT margining for memory stress testing.

Use Scenario: Compact, high-efficiency VTT generation in thin-profile notebooks and desktop motherboards with limited board area.

IC Role / Device Role / Timing Role: 5mm × 5mm QFN controller driving discrete MOSFETs to meet JEDEC DDR power specs in thermally constrained chassis.

Use Value: 97% peak efficiency and EXTVCC switchover reduce thermal load, enabling fanless or low-noise cooling solutions.

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous buck controller applications.

Alternative Part Technical Difference Application Difference Selection Advice
LTC3716EUH#PBF Single-ended (non-symmetrical) current limit; no VON pin for VOUT-proportional on-time; supports only sourcing current up to 20A. Designed for standard point-of-load (POL) supplies, not DDR/QDR termination with bidirectional current demands. Select LTC3716EUH#PBF only for unidirectional POL applications where sink current is not required.
TPS546D24ARVFT Integrated MOSFETs (60A); PMBus interface; fixed 0.6V reference; no VRNG or symmetrical sink/source programming. Targeted at high-current CPU/GPU VRMs, not DDR termination; lacks VREF-tracking and bidirectional current control. Choose TPS546D24ARVFT for integrated, digitally controlled VRMs - not for DDR VTT where external MOSFET flexibility and VREF tracking are mandatory.

Compared with LTC3716EUH#PBF and TPS546D24ARVFT, the LTC3717EUH-1#PBF uniquely delivers symmetrical ±20A current limiting, VREF-based tracking, and valley current-mode control optimized specifically for DDR/QDR termination - making it irreplaceable in memory subsystem designs requiring bidirectional bus current handling and tight voltage accuracy.

Availability

LTC3717EUH-1#PBF is available at Aetrix Electronics and suitable for DDR memory termination, QDR SRAM power, tracking/margining supplies, and notebook/desktop memory rail applications requiring stable component supply, long-term lifecycle support, and guaranteed parametric performance across –40°C to 85°C.

Supply support for LTC3717EUH-1#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (including legacy Linear Technology products) is a global leader in high-performance analog, mixed-signal, and power management ICs, serving industrial, automotive, communications, and computing markets with precision, reliability, and innovation.

The LTC3717EUH-1#PBF belongs to Linear's high-efficiency synchronous controller product line, designed specifically for demanding memory interface power applications including DDR, QDR, SSTL, and HSTL termination where accuracy, speed, and bidirectional current control are essential.

FAQ

What is the primary function of the LTC3717EUH-1#PBF in DDR memory systems?

The LTC3717EUH-1#PBF functions as a synchronous step-down controller dedicated to generating precise termination voltage (VTT) for DDR memory buses. It regulates VOUT to exactly half of an externally applied VREF voltage (e.g., 2.5V → 1.25V), supports ±20A symmetrical sink/source current, and maintains ±0.65% output accuracy - directly meeting JEDEC specifications for DDR3/DDR4 VTT rails. The LTC3717EUH-1#PBF achieves this using valley current-mode control without requiring an external sense resistor.

Does the LTC3717EUH-1#PBF require an external current sense resistor?

No, the LTC3717EUH-1#PBF does not require an external current sense resistor. It supports No RSENSE operation by using the on-resistance (RDS(ON)) of the external bottom N-channel MOSFET as the current sensing element. The SENSE+ and SENSE– pins connect directly to the MOSFET drain and source, respectively. An external resistor is optional and only used when tighter current limit tolerance or independent current sensing is needed - the LTC3717EUH-1#PBF remains fully functional and optimized without it.

How does the LTC3717EUH-1#PBF achieve constant switching frequency across varying input and output voltages?

The LTC3717EUH-1#PBF achieves constant switching frequency through coordinated use of the ION and VON pins. The ION pin sets nominal frequency via an external resistor from VIN, while the VON pin makes the one-shot timer's on-time proportional to VOUT. When VON is tied to VOUT, on-time adjusts dynamically to compensate for changes in duty cycle caused by VIN or VOUT variation - maintaining stable frequency. This dual-pin method is explicitly validated in the datasheet for applications requiring consistent EMI profiles and thermal behavior across operating conditions. The LTC3717EUH-1#PBF supports frequencies up to 1.5MHz using this technique.

What is the role of the VRNG pin on the LTC3717EUH-1#PBF, and how is it configured?

The VRNG pin on the LTC3717EUH-1#PBF selects the nominal current sense voltage range - 10× the value applied to VRNG sets the full-scale sense threshold (e.g., 1V at VRNG yields ~100mV nominal sense voltage). It is configured using a resistive divider from INTVCC (5V) to SGND, allowing adjustment from 0.5V to 2V - corresponding to 50mV–200mV sense ranges. Tying VRNG to SGND or INTVCC defaults to 70mV or 140mV, respectively. This configuration directly scales the symmetrical current limit (±20A max) and must be matched to the chosen MOSFET's RDS(ON) or sense resistor value. The LTC3717EUH-1#PBF datasheet provides exact formulas for RSENSE selection based on VRNG setting.

Can the LTC3717EUH-1#PBF be used for non-DDR applications such as general-purpose POL supplies?

Yes, the LTC3717EUH-1#PBF can be used for general-purpose point-of-load (POL) supplies, but its feature set is highly specialized for DDR/QDR termination. Its VOUT = ½ × VREF architecture, symmetrical ±20A current limiting, and VRNG-configurable sense range are most valuable in memory termination. For standard unidirectional POLs, simpler controllers like the LTC3716EUH#PBF may be more cost-effective. However, the LTC3717EUH-1#PBF's ceramic-capacitor stability, 97% efficiency, and 4V–36V input range make it viable for high-performance industrial POLs where bidirectional current capability or precise tracking is beneficial - though design effort increases due to its DDR-optimized signal chain.

LTC3717EUH-1#PBF Specifications

Product attributes
Attribute value
Manufacturer:
Analog Devices Inc.
Series:
-
Package/Case:
32-WFQFN Exposed Pad
Packaging:
Tube
Product Status:
Active
Applications:
Controller, DDR, QDR
Voltage - Input:
4V ~ 36V
Number of Outputs:
1
Voltage - Output:
2V ~ 18V
Operating Temperature:
-40°C ~ 85°C
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
32-QFN (5x5)

LTC3717EUH-1#PBF FAQ

1.How can I place an order for LTC3717EUH-1#PBF through Aetrix?

Please submit a Request for Quotation (RFQ) for LTC3717EUH-1#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for LTC3717EUH-1#PBF reliable?

The price and inventory of LTC3717EUH-1#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3717EUH-1#PBF is usually 5 days.

3.What payment methods are accepted for LTC3717EUH-1#PBF?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3717EUH-1#PBF transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for LTC3717EUH-1#PBF?

LTC3717EUH-1#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your LTC3717EUH-1#PBF order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for LTC3717EUH-1#PBF?

For technical support, including LTC3717EUH-1#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3717EUH-1#PBF requirements.

6.How does Aetrix verify that LTC3717EUH-1#PBF is sourced from the original manufacturer or authorized distributors?

All LTC3717EUH-1#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3717EUH-1#PBF meets industry standards.

7.What is the process for return or replacement of LTC3717EUH-1#PBF?

All LTC3717EUH-1#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3717EUH-1#PBF, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The LTC3717EUH-1#PBF part is unused and in its original packaging.

Return procedure for LTC3717EUH-1#PBF:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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