Analog Devices Inc. LTC3717EUH-1#TRPBF
- Part No.:
- LTC3717EUH-1#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Special Purpose Regulators
- Package:
- 32-WFQFN Exposed Pad
- Datasheet:
-
LTC3717EUH-1#TRPBF.pdf
- Description:
- IC REG CTRLR DDR 1OUT 32QFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,134
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC3717EUH-1#TRPBF from Analog Devices (formerly Linear Technology) is a synchronous step-down DC/DC controller optimized for DDR/QDR memory termination, delivering VOUT = ½ × VREF with ±0.65% output voltage accuracy, adjustable sink/source current limiting up to ±20A, and valley current mode control without mandatory RSENSE. It operates across 4V–36V VIN, supports up to 1.5MHz switching, and enables ultrafast transient response in notebook computers and desktop server memory subsystems.
For engineers reviewing the LTC3717EUH-1#TRPBF datasheet, LTC3717EUH-1#TRPBF pinout, LTC3717EUH-1#TRPBF application, or LTC3717EUH-1#TRPBF equivalent, key selection considerations include its no-RSENSE valley current sensing architecture, symmetrical ±20A programmable current limit, 5mm × 5mm QFN-32 package with exposed SGND pad, and support for DDR/SSTL/HSTL bus termination with tracking/margining capability.
Technical Context
The LTC3717EUH-1#TRPBF implements valley current mode control using internal MOSFET RDS(ON) as the current sense element-eliminating external sense resistors while maintaining ±0.65% VOUT accuracy via precision internal resistor dividers (2/3 × VFB, 1/3 × VREF). Its one-shot timer sets tON based on ION current and VON voltage, enabling constant-frequency operation across input/output voltage changes.
Fault protection includes output overvoltage detection (±10% PGOOD window), optional short-circuit shutdown timer, and undervoltage lockout (VIN UVLO = 3.4V–4.0V). Power delivery uses dual gate drivers (TG/BG) with 2Ω/3Ω pull-up and 2Ω/1Ω pull-down RDS(ON), INTVCC regulated at 4.7V–5.3V, and EXTVCC switchover at 4.5V–4.7V for high-efficiency auxiliary supply integration.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Range | 4V to 36V - supports wide-input industrial and server power rails without pre-regulation. |
| VOUT Accuracy | ±0.65% - ensures tight DDR/QDR termination voltage compliance (e.g., 1.25V ±8.1mV). |
| Current Limit | Adjustable ±20A sink/source - enables symmetric termination for bidirectional DDR data lines. |
| Switching Frequency | Up to 1.5MHz - allows compact magnetics and ceramic output capacitors. |
| tON(MIN) | ≤100ns - supports high VIN/VOUT ratios (e.g., 24V→1.25V) with stable low-duty-cycle operation. |
| Package | 32-pin 5mm × 5mm QFN with exposed SGND pad - provides low thermal resistance (θJA = 34°C/W) and robust grounding for high-current switching. |
| PGOOD Threshold | ±10% of regulation point - delivers precise power-good signaling for system sequencing and fault isolation. |
Pinout & Package
Package: 32-lead 5mm × 5mm plastic QFN (UH); exposed pad (Pin 33) is SGND and must be soldered to PCB for thermal and signal integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VON (1) | On-time voltage input | Sets fixed tON via comparator trip point (0.7V default, clamped to 0.7V–2.4V); ties to VOUT for constant-frequency operation during VOUT changes. |
| PGOOD (2) | Open-drain power-good output | Pulled low when VFB exits ±10% regulation window - used for system enable/disable sequencing and fault reporting. |
| VRNG (3) | Sense voltage range input | Sets nominal current sense threshold (70mV–200mV) by resistive divider from INTVCC; determines ±20A full-scale limit. |
| ITH (4) | Error amplifier compensation & current threshold | 0V–2.4V control voltage sets valley current comparator threshold; also serves as EA compensation node. |
| SGND (5)/EP (33) | Signal ground / exposed pad | Reference for all small-signal circuitry; electrically connected to EP - must be soldered to PCB ground plane. |
| ION (6) | On-time current input | Resistor from VIN sets one-shot timer current - directly controls switching frequency (f ∝ 1/RON). |
| VFB (7) | Error amplifier feedback input | Internally divided 2/3 × VOUT - compared to 1/3 × VREF to regulate VOUT = ½ × VREF; max 1.5V rating. |
| VREF (10) | Reference voltage input | External reference (≤3V) defining VOUT, PGOOD thresholds, and short-circuit timing; internally divided 1/3 × VREF. |
| EXTVCC (15) | External VCC input | Switchover at 4.5V–4.7V - bypasses internal LDO to draw gate drive power from efficient external 5V rail. |
| VIN (16) | Main input supply | 4V–36V primary power input; requires RC filter (1Ω + 0.1µF) to PGND for noise suppression. |
| INTVCC (17) | Internal regulator output | 5V ±0.3V regulated supply for logic and gate drivers; decoupled with ≥4.7µF low-ESR capacitor. |
| DRVCC (18) | Bottom gate driver supply | Powered from INTVCC via RC filter; supplies BG driver with low-impedance path to PGND. |
| BG (19) | Bottom gate drive output | Drives bottom N-MOSFET gate between PGND and DRVCC; 2Ω pull-down / 3Ω pull-up RDS(ON). |
| PGND (20) | Power ground | Return path for high-current MOSFET sources, CIN(–), CVCC(–); must connect close to bottom MOSFET source. |
| SENSE– (21) | Negative current sense input | Connected to bottom MOSFET source or PGND - forms Kelvin sense pair with SENSE+ for RDS(ON)-based current sensing. |
| SENSE+ (23) | Positive current sense input | Connected to bottom MOSFET drain or SW node - completes current sense path; enables no-RSENSE operation. |
| SW (24) | Switch node | Connects to bootstrap capacitor (–) terminal; swings from ~–0.3V to VIN - critical for TG driver timing. |
| TG (27) | Top gate drive output | Drives top N-MOSFET gate with swing = INTVCC superimposed on SW node; 2Ω pull-up / 2Ω pull-down RDS(ON). |
| BOOST (28) | Boosted floating driver supply | Connects to bootstrap capacitor (+) terminal; swings from ~INTVCC–0.3V to VIN+INTVCC - enables high-side drive. |
| RUN/SS (31) | Run control & soft-start input | 0.8V start threshold; internal 1.2µA current charges external CSS for controlled startup and overcurrent latchoff delay. |
Key Features
| Feature | Design Value |
|---|---|
| No-RSENSE valley current sensing | Uses bottom MOSFET RDS(ON) as current sense element - eliminates sense resistor losses and board space, improving efficiency up to 97%. |
| Symmetrical ±20A current limit | Programmable sink/source limit via VRNG and ITH - matches DDR bidirectional data line requirements for SSTL/HSTL termination. |
| Constant-frequency operation | VON and ION pins enable frequency stability across VIN/VOUT variations - simplifies EMI filtering and avoids audible noise in servers. |
| Ultrafast transient response | Valley current mode + fast error amplifier (gm = 0.93–1.33mS) - maintains regulation during 500mA→10A load steps with minimal VOUT deviation. |
| Ceramic-capacitor compatible | Stable with low-ESR ceramic COUT - eliminates need for bulk electrolytics, reducing footprint and improving reliability in high-density layouts. |
| Output overvoltage protection | Dedicated comparator triggers immediate M1 turn-off/M2 hold-on - prevents DDR IC damage during fault conditions without external circuitry. |
Applications
| DDR Memory Termination | QDR RAM Bus Supply |
|---|---|
|
Use Scenario: Providing precise 1.25V termination for DDR2/DDR3 memory interfaces in notebook computers and blade servers. IC Role / Device Role / Timing Role: Synchronous buck controller generating VTT = ½ × VREF with ±0.65% accuracy and symmetrical ±20A sourcing/sinking capability. Use Value: Eliminates external sense resistors while meeting JEDEC SSTL_18 specification for VTT tolerance and transient response. |
Use Scenario: Powering Quad Data Rate (QDR) SRAM termination in telecom baseband processing cards requiring fast load-step recovery. IC Role / Device Role / Timing Role: Valley current mode controller delivering ultrafast transient response (<20µs settling) for bidirectional QDR data bus currents. Use Value: Maintains VTT within ±10mV during 10A load steps - prevents data corruption in high-speed QDR read/write cycles. |
| Tracking Power Supply | Memory Margining System |
|
Use Scenario: Generating matched VDDQ and VTT rails in DDR memory subsystems where VTT must track half of VDDQ voltage. IC Role / Device Role / Timing Role: Uses shared VREF input to force VTT = ½ × VDDQ - enables automatic tracking without external op-amps or DACs. Use Value: Reduces BOM count and layout complexity while ensuring <0.1% tracking error across temperature and load. |
Use Scenario: Enabling voltage margining tests for DDR memory validation labs by dynamically adjusting VTT during system stress testing. IC Role / Device Role / Timing Role: Programmable VREF input allows digital-to-analog control of VTT setpoint - supports ±5% margining via external DAC. Use Value: Provides precise, software-controlled VTT adjustment without hardware modifications - accelerates memory reliability qualification. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar DDR memory termination controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ISL6522CRZ-T | Fixed 1.25V VTT output; no VREF programmability; requires external sense resistor; 28-pin SOIC package. | Limited to single-VTT applications; lacks tracking/margining flexibility; higher board area due to SOIC and RSENSE. | Select when cost-sensitive, fixed-voltage DDR1 termination is required and layout space permits SOIC + sense resistor. |
| TPS51200DRCR | Integrated MOSFET drivers only - requires external power MOSFETs; supports 0.75V–1.8V VTT; 10-pin WSON package. | Designed for DDR3 LVDIMM modules; lower current capability (±12A); no built-in overvoltage protection. | Choose for space-constrained DDR3 applications where integrated drivers reduce component count but ±20A headroom is not needed. |
Compared with ISL6522CRZ-T and TPS51200DRCR, the LTC3717EUH-1#TRPBF uniquely combines no-RSENSE operation, ±20A symmetrical current limit, VREF-based tracking/margining, and QFN-32 thermal performance - making it optimal for high-density DDR2/DDR3 server memory designs demanding efficiency, precision, and design flexibility.
Availability
LTC3717EUH-1#TRPBF is available at Aetrix Electronics and suitable for DDR memory termination, QDR RAM power supplies, tracking/margining systems, and high-efficiency server power rails requiring stable component supply and long-term lifecycle support.
Supply support for LTC3717EUH-1#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and power management semiconductors, serving industrial, automotive, communications, and computing markets.
The LTC3717EUH-1#TRPBF belongs to Linear's high-efficiency DC/DC controller product line, designed specifically for precision memory termination and high-current, low-voltage point-of-load applications in servers and computing infrastructure.
FAQ
What is the maximum supported switching frequency for the LTC3717EUH-1#TRPBF?
The LTC3717EUH-1#TRPBF supports an adjustable switching frequency up to 1.5MHz, set by the resistor connected from VIN to the ION pin. This high-frequency capability enables use of small inductors and ceramic output capacitors while maintaining stable regulation across 4V–36V input range and load currents up to ±20A.
Does the LTC3717EUH-1#TRPBF require an external current sense resistor?
No, the LTC3717EUH-1#TRPBF does not require an external current sense resistor. It uses valley current mode control with the bottom MOSFET's RDS(ON) as the current sense element - connecting SENSE+ to the MOSFET drain and SENSE– to its source. An external resistor is optional for improved current limit accuracy.
How does the LTC3717EUH-1#TRPBF achieve VOUT = ½ × VREF?
The LTC3717EUH-1#TRPBF achieves VOUT = ½ × VREF through internal precision resistor dividers: the VFB pin receives 2/3 × VOUT, while the VREF pin feeds 1/3 × VREF into the error amplifier. When these are equal, VOUT = ½ × VREF - enabling accurate DDR termination without external feedback networks.
What is the purpose of the VRNG pin on the LTC3717EUH-1#TRPBF?
The VRNG pin on the LTC3717EUH-1#TRPBF sets the nominal current sense voltage range (50mV–200mV), directly determining the ±20A full-scale current limit. A resistive divider from INTVCC to VRNG configures this range; tying VRNG to SGND or INTVCC selects default 70mV or 140mV thresholds for simplified design.
Can the LTC3717EUH-1#TRPBF be used for non-DDR applications like general-purpose buck conversion?
Yes, the LTC3717EUH-1#TRPBF can be used for general-purpose synchronous buck conversion, but its architecture is optimized for DDR/QDR termination: VOUT = ½ × VREF, symmetrical current limiting, and no-RSENSE operation. For standard buck applications, consider dedicated controllers like LTC3780 or LT8640S with broader VOUT programming flexibility.
LTC3717EUH-1#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 32-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- Controller, DDR, QDR
- Voltage - Input:
- 4V ~ 36V
- Number of Outputs:
- 1
- Voltage - Output:
- 2V ~ 18V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-QFN (5x5)
LTC3717EUH-1#TRPBF FAQ
1.How can I place an order for LTC3717EUH-1#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3717EUH-1#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3717EUH-1#TRPBF reliable?
The price and inventory of LTC3717EUH-1#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3717EUH-1#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC3717EUH-1#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3717EUH-1#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3717EUH-1#TRPBF?
LTC3717EUH-1#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3717EUH-1#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3717EUH-1#TRPBF?
For technical support, including LTC3717EUH-1#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3717EUH-1#TRPBF requirements.
6.How does Aetrix verify that LTC3717EUH-1#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC3717EUH-1#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3717EUH-1#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC3717EUH-1#TRPBF?
All LTC3717EUH-1#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3717EUH-1#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3717EUH-1#TRPBF part is unused and in its original packaging.
Return procedure for LTC3717EUH-1#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC3717EUH-1#TRPBF Tags

-
TPS51206DSQR
Texas Instruments

-
TPS51200DRCR
Texas Instruments

-
TPS51200DRCT
Texas Instruments

-
TPS62740DSSR
Texas Instruments

-
TPS51100DGQR
Texas Instruments
-
NCP51200MNTXG
onsemi
-
NCP51400MNTXG
onsemi

-
RT9026GSP
Richtek USA Inc.

-
LP2998MRX/NOPB
Texas Instruments

-
TPS51200QDRCRQ1
Texas Instruments

-
DPA423GN-TL
Power Integrations

-
LM10011SD/NOPB
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
