My Inquiry
My Account
Analog Devices Inc. LTC3726EGN#TRPBF
- Part No.:
- LTC3726EGN#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Power Supply Controllers, Monitors
- Package:
- 16-SSOP (0.154", 3.90mm Width)
- Datasheet:
-
LTC3726EGN#TRPBF.pdf
- Description:
- IC SECONDARY SIDE CTRLR 16SSOP
- Quantity:
- Payment:
- Shipping:
Inventory:4,509
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC3726EGN#TRPBF from Analog Devices (formerly Linear Technology) is a secondary-side synchronous forward controller IC designed for isolated DC/DC power supplies. It delivers ±1% output voltage accuracy, supports 100kHz–500kHz PLL-synchronized switching, and enables self-starting operation without external bias regulators in telecom 48V systems. Its proprietary gate drive encoding reduces isolation component count in 3.3V/20A telecommunication converters.
For engineers reviewing the LTC3726EGN#TRPBF datasheet, LTC3726EGN#TRPBF pinout, LTC3726EGN#TRPBF application, or LTC3726EGN#TRPBF equivalent, key selection criteria include secondary-side current-mode control, 16-lead SSOP package compatibility, OPTI-LOOP® compensation, isolated pulse transformer interface (PT+/PT–), and support for PolyPhase® slave-mode synchronization in multi-phase forward topologies.
Technical Context
The LTC3726EGN#TRPBF implements fixed-frequency current-mode control with adaptive shoot-through prevention via SW pin monitoring and leading-edge blanking. It integrates a transconductance error amplifier (gm = 2.75 mS), programmable slope compensation (via SLP pin), and dual-mode current sensing (RSENSE or CT mode with 78mV/1.28V thresholds).
Its PLL-based FS/SYNC pin accepts external clocks from 75kHz to 500kHz or sets internal frequency via resistor (fOSC = 4·RFS – 200kΩ). The MODE pin configures maximum duty cycle (50% or 75%) and selects between encoded PWM (with LTC3705/LTC3725) or standard PWM outputs on PT+/PT– pins.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Control Architecture | Secondary-side current-mode with PLL-synchronized oscillator (75–500 kHz) |
| Output Voltage Accuracy | ±1% over temperature and line/load - ensures stable 3.3V rail in telecom servers |
| Current Sense Threshold | 78 mV (RSENSE mode) or 1.28 V (CT mode) - enables precise 20A current limiting |
| Operating Temperature | –40°C to +85°C ambient - qualified for industrial and telecom base station environments |
| Package | 16-lead narrow SSOP (GN) - surface-mount compatible with high-density PCB layouts |
| UVLO Threshold | 4.60 V with 0.4 V hysteresis - prevents erratic startup during brownout conditions |
| Soft-Start Control | Run/SS pin with 5 µA charge current - enables monotonic output ramp and hiccup-mode short-circuit protection |
Pinout & Package
Package: 16-lead narrow-body plastic SSOP (GN), 0.150" wide, JEDEC MO-153 compliant. Thermal resistance θJA = 130°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SG (1) | Synchronous MOSFET gate driver output | Drives low-side sync FET with 1.5–2.3 Ω pull-down/pull-up - enables efficient 3.3V output conduction |
| FG (2) | Forward MOSFET gate driver output | Drives high-side forward FET; complements SG for synchronous forward topology |
| MODE (3) | Duty cycle and encoding mode select | GND/VCC/resistor tie sets 50%/75% max duty or disables encoding for standalone use |
| FB/PHASE (4) | Inverting error amp input / PolyPhase phase selector | Voltage feedback in master mode; sets 0°/60°/90°/120°/180° phase offset in slave mode |
| ITH (5) | Error amplifier output | Connects to compensation network; controls peak inductor current in current-mode loop |
| RUN/SS (6) | Enable and soft-start control | 0.45 V threshold; capacitor sets ramp time; pulses fault signal across shared RUN/SS bus in PolyPhase |
| SLP (7) | Slope compensation programming | Resistor-to-GND selects 5 preset slopes - doubles above 50% duty for stability |
| GND (8) | Signal ground reference | Separate from PGND; used for analog circuitry and error amplifier reference |
| FS/SYNC (9) | Oscillator frequency set and PLL sync input | Sources 20 µA; resistor sets fOSC, clock input locks to external 75–500 kHz reference |
| IS– (10) | Negative current sense input | Tied to VCC for CT-mode sensing; enables 1.28 V trip level with 16× gain reduction |
| IS+ (11) | Positive current sense input | Accepts differential signal from sense resistor or transformer secondary |
| SW (12) | Synchronous FET drain monitor | Enables adaptive shoot-through prevention by detecting negative voltage at turn-off |
| PGND (13) | Power ground for gate drivers | Low-inductance return path for FG/SG outputs; must be star-connected near FETs |
| PT+ / PT– (14,15) | Pulse transformer encoded outputs | Multiplex PWM + bias power across single transformer; decoded by LTC3705/LTC3725 |
| VCC (16) | Main supply input | 5–10 V operating range; powers all logic, drivers, and analog blocks |
Key Features
| Feature | Design Value |
|---|---|
| Self-starting architecture | Eliminates dedicated bias regulator by deriving VCC from peak-charged capacitor - reduces BOM count and startup complexity |
| Proprietary gate drive encoding | Transmits PWM signals and DC bias power across single pulse transformer - replaces dual-winding designs and optocouplers |
| OPTI-LOOP® compensation | Single-pole compensation simplifies loop design while maintaining phase margin >60° across line/load/temp |
| PolyPhase® slave mode | FB/PHASE pin configures six preset phase delays (0°–180°) - enables interleaved multi-phase forward converters with current sharing |
| Adaptive shoot-through prevention | SW pin monitoring detects negative voltage after primary turn-off - ensures safe synchronous FET turn-on timing |
Applications
| Telecom 48V Isolated Power | Internet Router DC/DC Conversion |
|---|---|
Use Scenario: 48V backplane powering 3.3V/20A ASICs in carrier-grade switches. IC Role / Device Role / Timing Role: Secondary-side controller managing synchronous rectification, current sharing, and fast transient response. Use Value: ±1% regulation maintains ASIC core voltage under dynamic load steps; PLL sync eliminates beat frequencies in multi-board systems. | Use Scenario: Distributed 3.3V supply for packet processing engines in modular routers. IC Role / Device Role / Timing Role: Forward converter controller with PolyPhase® slave capability for interleaved phase management. Use Value: PT+/PT– encoding reduces isolation component count by 33% vs. discrete opto + bias winding solutions. |
| Automotive Heavy Equipment | Distributed Step-Down Converters |
Use Scenario: 24V/48V battery-fed 3.3V supply for engine control units in off-highway vehicles. IC Role / Device Role / Timing Role: Isolated forward controller with UVLO hysteresis and extended temperature operation. Use Value: –40°C to +85°C rating ensures reliability in under-hood environments; 0.4 V UVLO hysteresis prevents cycling during cold cranking. | Use Scenario: Multi-rail distributed power architecture in industrial PLC backplanes. IC Role / Device Role / Timing Role: Master/slave-configurable controller enabling synchronized multi-phase forward conversion. Use Value: FB/PHASE pin-selectable phase angles allow precise current balancing across parallel 3.3V outputs without external controllers. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar secondary-side forward controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3725IGN#PBF | Primary-side gate driver/controller; requires external secondary controller; no integrated PT+/- encoding | Used with LTC3726EGN#TRPBF on primary side only - not standalone replacement | Select when designing full forward solution with separate primary/secondary control partitioning |
| UCC2897APW | Secondary-side forward controller with integrated gate drivers; no PT+/- encoding; fixed 500kHz max frequency | Lacks pulse transformer multiplexing - requires separate bias winding and optocoupler for isolation | Choose for cost-sensitive designs where isolation simplicity is less critical than BOM count |
Compared with LTC3725IGN#PBF and UCC2897APW, the LTC3726EGN#TRPBF uniquely integrates pulse transformer encoding for combined PWM and bias transmission, eliminating optocouplers and auxiliary windings - reducing isolation complexity while maintaining full secondary-side control authority and PolyPhase® scalability.
Availability
LTC3726EGN#TRPBF is available at Aetrix Electronics and suitable for telecom infrastructure, internet routing hardware, and automotive heavy equipment requiring stable component supply, long-lifecycle support, and guaranteed -40°C to +85°C operation.
Supply support for LTC3726EGN#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its high-performance power management portfolio. Linear's legacy includes industry-leading DC/DC controllers optimized for efficiency, precision, and robustness in demanding applications.
The LTC3726EGN#TRPBF belongs to Linear's secondary-side synchronous forward controller family, engineered specifically for isolated telecom and server power supplies where fast transient response, self-starting capability, and minimal isolation components are critical design requirements.
FAQ
What is the function of the PT+ and PT– pins on the LTC3726EGN#TRPBF?
The PT+ and PT– pins on the LTC3726EGN#TRPBF deliver a proprietary encoded signal that multiplexes PWM gate drive information and DC bias power across a single pulse transformer. This eliminates the need for separate optocouplers and auxiliary bias windings. In normal operation, PT+ and PT– drive complementary 50% duty-cycle pulses; brief zero-volt differentials encode PWM edge transitions. The LTC3705 or LTC3725 decodes this signal on the primary side.
How does the LTC3726EGN#TRPBF achieve self-starting without an external bias regulator?
The LTC3726EGN#TRPBF achieves self-starting by deriving its initial VCC from a peak-charged capacitor powered through the main transformer's auxiliary winding. When input voltage is applied, the LTC3705/LTC3725 begins open-loop switching, causing the peak-charged capacitor voltage to rise faster than the main output. Once VCC exceeds 4.6 V, the LTC3726EGN#TRPBF wakes up, measures the rising output voltage, presets its RUN/SS voltage accordingly, and assumes control - eliminating the need for a dedicated bias supply.
Can the LTC3726EGN#TRPBF operate in PolyPhase® configurations, and how is phase alignment controlled?
Yes, the LTC3726EGN#TRPBF supports PolyPhase® operation with one master and multiple slaves. Phase alignment is controlled via the FB/PHASE pin: tying it to VCC sets 180° delay, while resistors to VCC (200kΩ, 100kΩ, 50kΩ) select 60°, 90°, or 120° offsets. In slave mode, ITH becomes high-impedance and is driven by the master, ensuring matched inductor currents. The FS/SYNC pin synchronizes all devices to a common clock.
What are the current sensing options supported by the LTC3726EGN#TRPBF, and how do they affect the current limit threshold?
The LTC3726EGN#TRPBF supports two current sensing modes: RSENSE (shunt resistor) and CT (current transformer). In RSENSE mode, IS+ and IS– connect across a sense resistor, yielding a 78 mV typical current limit threshold. In CT mode, IS– is tied to VCC, reducing internal gain by 16× and raising the threshold to 1.28 V - enabling high-current detection without excessive shunt losses. Both modes include adaptive leading-edge blanking.
Does the LTC3726EGN#TRPBF provide overvoltage protection, and how is it implemented?
Yes, the LTC3726EGN#TRPBF includes non-latching overvoltage protection (OVP). When the FB pin voltage exceeds 117% of the 0.6 V reference (i.e., >0.702 V), the OVP circuit immediately turns on the synchronous MOSFET (SG) while turning off FG and all other switches. This crowbars the output to protect downstream loads. The condition clears automatically when FB falls below 115% of 0.6 V (0.69 V), allowing recovery without reset.
LTC3726EGN#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-SSOP (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Applications:
- Secondary-Side Controller
- Voltage - Input:
- -
- Voltage - Supply:
- 5V ~ 10V
- Current - Supply:
- 4.2 mA
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SSOP
LTC3726EGN#TRPBF FAQ
1.How can I place an order for LTC3726EGN#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3726EGN#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3726EGN#TRPBF reliable?
The price and inventory of LTC3726EGN#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3726EGN#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC3726EGN#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3726EGN#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3726EGN#TRPBF?
LTC3726EGN#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3726EGN#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3726EGN#TRPBF?
For technical support, including LTC3726EGN#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3726EGN#TRPBF requirements.
6.How does Aetrix verify that LTC3726EGN#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC3726EGN#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3726EGN#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC3726EGN#TRPBF?
All LTC3726EGN#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3726EGN#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3726EGN#TRPBF part is unused and in its original packaging.
Return procedure for LTC3726EGN#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC3726EGN#TRPBF Tags
-
UC3845AD8TR
Texas Instruments
-
UC2843AD8TR
Texas Instruments
-
LM3880MFX-1AE/NOPB
Texas Instruments
-
LM3880MFX-1AA/NOPB
Texas Instruments
-
INA234AIYBJR
Texas Instruments
-
INA700AYWFR
Texas Instruments
-
LM3880MF-1AE/NOPB
Texas Instruments
-
LM3880MF-1AA/NOPB
Texas Instruments
-
LM3881MM/NOPB
Texas Instruments
-
UCC2802DTR
Texas Instruments
-
NCP4305DMTTWG
onsemi
-
INA237AIDGSR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
