Analog Devices Inc. LTC3727AEG-1#PBF
- Part No.:
- LTC3727AEG-1#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 28-SSOP (0.209", 5.30mm Width)
- Datasheet:
-
LTC3727AEG-1#PBF.pdf
- Description:
- IC REG CTRLR BUCK 28SSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC3727AEG-1#PBF from Analog Devices (formerly Linear Technology) is a dual-phase, constant-frequency, current-mode synchronous step-down controller driving two independent N-channel MOSFET stages. It delivers up to 5A and 4A on VOUT1/VOUT2 respectively, supports 4V–30V input, regulates outputs from 0.8V to 14V with ±1% accuracy, and operates out-of-phase at 250kHz–550kHz to reduce input RMS current and EMI-used in telecom power supplies and automotive infotainment DC/DC conversion.
For engineers reviewing the LTC3727AEG-1#PBF datasheet, LTC3727AEG-1#PBF pinout, LTC3727AEG-1#PBF application, or LTC3727AEG-1#PBF equivalent, key selection criteria include its dual-phase interleaved operation, OPTI-LOOP® compensation for wide output capacitor/ESR tolerance, 99% dropout duty cycle, phase-lockable oscillator, and integrated 3.3V LDO for auxiliary biasing.
Technical Context
The LTC3727AEG-1#PBF implements a dual-channel, constant-frequency current-mode control architecture with 180° phase separation between channels. Each channel features independent error amplifiers (ITH1/ITH2), differential current sense inputs (SENSE1±/SENSE2±), and dedicated gate drivers (TG1/BG1/TG2/BG2) supporting N-MOSFET synchronous rectification.
Its OPTI-LOOP® compensation allows stable loop response across diverse output capacitance and ESR values, while the PLLIN/PLLFLTR interface enables external synchronization or DC voltage-controlled frequency tuning from 250kHz to 550kHz. Dropout operation is managed via internal detection that forces periodic top-FET off-time to recharge bootstrap capacitors.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4V to 30V (36V absolute max); supports 12V/24V automotive and telecom battery inputs. |
| Output Voltage Range | 0.8V to 14V per channel; set by external resistor divider on VOSENSE pins. |
| Reference Accuracy | ±1% over –40°C to 85°C; ensures tight regulation under load and temperature variation. |
| Switching Frequency | 250kHz to 550kHz, phase-lockable; enables EMI reduction and layout optimization. |
| Max Duty Cycle | 99.4% in dropout; sustains regulation when VIN approaches VOUT (e.g., 5.2V → 5V). |
| Current Sense Threshold | 105mV to 165mV (typ. 135mV); sets peak inductor current via RSENSE for precise current limiting. |
| Soft-Start Current | 0.5μA to 1.2μA; controls ramp rate of RUN/SS capacitor for controlled output voltage rise. |
Pinout & Package
Package: 28-Lead Plastic SSOP (G package), –40°C to 85°C operating temperature range, lead-free finish (PBF).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RUN/SS1, RUN/SS2 (1, 15) | Soft-start & enable control | Capacitor-based ramp for controlled startup; <1.0V forces shutdown of respective channel. |
| SENSE1+, SENSE2+ (2, 14) | Current sense positive input | Differential input to current comparator; used with RSENSE to set peak inductor current limit. |
| SENSE1–, SENSE2– (3, 13) | Current sense negative input | Completes differential sense path; common-mode range extends to 14V for high-side sensing. |
| VOSENSE1, VOSENSE2 (4, 12) | Feedback voltage input | Remote-sense input for output voltage regulation; referenced to internal 0.8V precision bandgap. |
| PLLFLTR (5) | PLL filter / frequency control | DC voltage input (0–2.4V) sets oscillator frequency; also serves as low-pass filter node for PLL lock. |
| PLLIN (6) | External sync input | Accepts external clock (e.g., system master clock); forces TG1 rising edge alignment to PLLIN rising edge. |
| FCB (7) | Forced continuous/burst mode select | <0.8V forces continuous PWM; 0.8V–(VINTVCC–2V) enables Burst Mode® for light-load efficiency. |
| ITH1, ITH2 (8, 11) | Error amplifier output | Transconductance amplifier output controlling current comparator threshold; compensation point for loop stability. |
| SGND (9) | Small-signal ground | Reference for analog circuitry; must be routed separately from PGND to avoid noise coupling into feedback path. |
| 3.3VOUT (10) | Integrated LDO output | Stable 3.3V supply (10mA DC, 50mA peak); powers external logic or bias circuits without extra regulator. |
| PGOOD (28) | Power-good indicator | Open-drain output pulled low if either VOSENSE deviates >±7.5% from target; enables system sequencing. |
| TG1, TG2 (27, 16) | Top-gate drivers | Floating high-side N-MOSFET drivers; swing = INTVCC – 0.5V above SWx node voltage. |
| BG1, BG2 (23, 19) | Bottom-gate drivers | Low-side N-MOSFET drivers; swing = 0V to INTVCC; optimized for fast turn-on/turn-off (40–90ns). |
| BOOST1, BOOST2 (25, 18) | Bootstrap supply | Charged via external diode/capacitor; provides floating bias for TG drivers during high-side conduction. |
| SW1, SW2 (26, 17) | Switch node connections | Connects to inductor high-side; voltage swings from ~–0.4V (Schottky drop) to VIN during operation. |
| VIN (24) | Main input supply | Primary power input (4V–36V); powers internal regulators and logic; requires local 4.7μF decoupling. |
| INTVCC (21) | Internal 7.5V LDO output | Supplies gate drivers and core logic; can be bypassed by EXTVCC >7.3V for higher efficiency. |
| EXTVCC (22) | External VCC input | Optional high-efficiency supply input (≤8.5V); disables internal LDO when >7.3V, reducing heat dissipation. |
| PGND (20) | Power ground | High-current return path for bottom MOSFET sources, Schottky anodes, and CIN negative terminals. |
Key Features
| Feature | Design Value |
|---|---|
| Out-of-phase dual controllers | Reduces input RMS current by up to 39% vs. in-phase operation, enabling smaller input capacitors and lower EMI. |
| OPTI-LOOP® compensation | Allows stable loop response across ceramic, polymer, or electrolytic output capacitors with ESR from 1mΩ to 100mΩ. |
| 99.4% maximum duty cycle | Enables ultra-low dropout operation (e.g., 5.1V input → 5V output), critical for battery-powered systems near end-of-life. |
| Integrated 3.3V/10mA LDO | Eliminates need for external bias rail; supports level-shifting, monitoring ICs, or microcontroller I/O without added components. |
| Programmable Burst Mode® | Extends light-load efficiency by disabling switching until output droop triggers regulated burst cycles (60mV hysteresis). |
| Output overvoltage protection | Active clamp disables top FET and turns on bottom FET if VOSENSE exceeds +7.5%, protecting downstream loads. |
Applications
| Telecom Power Supply | Automotive Infotainment |
|---|---|
|
Use Scenario: Dual-rail DC/DC conversion in 48V or 24V telecom shelf systems requiring isolated 12V and 5V rails. IC Role / Device Role / Timing Role: Dual-phase synchronous buck controller managing interleaved switching to minimize input ripple and meet EN55022 Class B conducted EMI limits. Use Value: 39% lower input RMS current reduces required input capacitance by ~50% and cuts thermal stress on bulk capacitors and PCB traces. |
Use Scenario: Power management for head unit SoC, display, and audio subsystems in vehicles with 9V–16V battery input. IC Role / Device Role / Timing Role: Dual-output controller delivering 12V@4A and 5V@5A with phase interleaving to suppress alternator-induced noise coupling into sensitive analog circuits. Use Value: 180° phase shift reduces peak input current surges during cold-crank (6.5V min), preventing brownout of display and touch controller rails. |
| Battery-Powered Test Equipment | Industrial PLC I/O Module |
|
Use Scenario: Portable oscilloscope or signal generator using Li-ion (8.4V–12.6V) battery pack to generate clean 5V and 3.3V system rails. IC Role / Device Role / Timing Role: High-efficiency dual buck controller with Burst Mode® operation extending runtime at standby while maintaining <10mV output ripple during active measurement. Use Value: 20μA shutdown IQ and programmable soft-start prevent inrush current damage to aging battery cells during repeated power cycling. |
Use Scenario: DIN-rail mounted PLC module converting 24V DC field supply to isolated 5V logic and 12V analog sensor rails. IC Role / Device Role / Timing Role: Robust dual-phase controller with overvoltage protection and PGOOD sequencing ensuring safe startup before enabling FPGA and ADC subsystems. Use Value: ±1% reference accuracy and load regulation maintain ADC reference stability across –40°C to 70°C ambient, meeting IEC 61000-6-2 immunity requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-phase synchronous buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP2918GL-Z | Single-chip dual-phase controller with integrated MOSFET drivers and PMBus interface; no 3.3V LDO; max VIN = 28V. | Requires external PMBus host; lacks integrated 3.3V bias rail; better suited for digitally managed server VRMs than analog-heavy industrial designs. | Select MP2918GL-Z only if digital telemetry and dynamic margining are required; LTC3727AEG-1#PBF preferred for analog simplicity and auxiliary 3.3V supply. |
| LTC3855IUH#PBF | Single-phase, 2-phase capable controller with similar 4V–30V input and 0.8V reference; no integrated 3.3V LDO; uses different pinout and compensation scheme. | Requires external 3.3V regulator; lacks Burst Mode®; supports only one output per device unless paralleled with complex current-sharing circuitry. | Choose LTC3855IUH#PBF for cost-sensitive single-output designs; LTC3727AEG-1#PBF remains optimal for native dual-output, low-noise, and integrated bias needs. |
Compared with MP2918GL-Z and LTC3855IUH#PBF, the LTC3727AEG-1#PBF uniquely combines dual independent outputs, integrated 3.3V LDO, Burst Mode® efficiency, and out-of-phase operation in a single 28-pin SSOP-reducing BOM count and layout complexity for analog-intensive, thermally constrained applications.
Availability
LTC3727AEG-1#PBF is available at Aetrix Electronics and suitable for telecom power supplies, automotive infotainment systems, and battery-powered test equipment requiring stable component supply, long-term lifecycle support, and guaranteed RoHS-compliant sourcing.
Supply support for LTC3727AEG-1#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full technical and manufacturing continuity for all Linear power products.
The LTC3727AEG-1#PBF belongs to Linear's high-performance DC/DC controller family, designed specifically for high-efficiency, low-noise, multi-rail power conversion in space-constrained and thermally demanding environments.
FAQ
What is the minimum on-time specification for the LTC3727AEG-1#PBF?
The LTC3727AEG-1#PBF has a minimum on-time of 120ns, verified across temperature and process corners. This spec enables stable operation at high input-to-output voltage ratios (e.g., 24V→12V at 500kHz) without pulse-skipping artifacts. The LTC3727AEG-1#PBF achieves this via improved internal timing circuitry versus the original LTC3727, allowing tighter regulation in high-VIN applications.
Does the LTC3727AEG-1#PBF support synchronization to an external clock?
Yes, the LTC3727AEG-1#PBF supports external synchronization via the PLLIN pin (Pin 6), which accepts TTL- or CMOS-compatible clock signals. When enabled, the phase-locked loop aligns the rising edge of TG1 to the rising edge of the external clock. The LTC3727AEG-1#PBF maintains lock across frequency deviations of ±10% and rejects jitter up to 1ns RMS, making it suitable for noise-sensitive mixed-signal systems.
How does the FCB pin affect operating mode selection in the LTC3727AEG-1#PBF?
The FCB pin (Pin 7) selects between three modes: <0.8V forces continuous PWM on both channels; 0.8V–(VINTVCC–2V) enables Burst Mode® for light-load efficiency; open or >VINTVCC–2V defaults to constant-frequency PWM. The LTC3727AEG-1#PBF uses internal comparators to decode FCB voltage without external resistors, simplifying design while preserving flexibility for secondary-winding regulation.
What is the purpose of the 3.3VOUT pin on the LTC3727AEG-1#PBF?
The 3.3VOUT pin (Pin 10) delivers a regulated 3.3V output capable of 10mA DC and 50mA peak current. It is internally derived from the INTVCC rail and includes line/load regulation specs (±0.5% load, ±0.3% line). The LTC3727AEG-1#PBF uses this rail to power external level-shifters, ADC references, or microcontroller I/O-eliminating a discrete LDO and reducing board area in compact designs.
Can the LTC3727AEG-1#PBF operate with only one channel enabled?
Yes, the LTC3727AEG-1#PBF supports independent channel control: pulling RUN/SS1 low disables Channel 1 only, leaving Channel 2 fully operational. This allows asymmetric rail generation (e.g., 12V always-on, 5V on-demand) and simplifies power sequencing. The LTC3727AEG-1#PBF maintains full protection (OVP, current foldback, PGOOD) on the active channel even when the other is disabled.
LTC3727AEG-1#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-SSOP (0.209", 5.30mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Number of Outputs:
- 2
- Output Phases:
- 2
- Voltage - Supply (Vcc/Vdd):
- 4V ~ 30V
- Frequency - Switching:
- 255kHz ~ 530kHz
- Duty Cycle (Max):
- 99.4%
- Synchronous Rectifier:
- Yes
- Clock Sync:
- No
- Serial Interfaces:
- -
- Control Features:
- Enable, Power Good, Soft Start
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-SSOP
LTC3727AEG-1#PBF FAQ
1.How can I place an order for LTC3727AEG-1#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3727AEG-1#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3727AEG-1#PBF reliable?
The price and inventory of LTC3727AEG-1#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3727AEG-1#PBF is usually 5 days.
3.What payment methods are accepted for LTC3727AEG-1#PBF?
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Once your LTC3727AEG-1#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3727AEG-1#PBF?
For technical support, including LTC3727AEG-1#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3727AEG-1#PBF requirements.
6.How does Aetrix verify that LTC3727AEG-1#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3727AEG-1#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3727AEG-1#PBF meets industry standards.
7.What is the process for return or replacement of LTC3727AEG-1#PBF?
All LTC3727AEG-1#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3727AEG-1#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3727AEG-1#PBF part is unused and in its original packaging.
Return procedure for LTC3727AEG-1#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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