Analog Devices Inc. LTC3729LEUH-6#PBF
- Part No.:
- LTC3729LEUH-6#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 32-WFQFN Exposed Pad
- Datasheet:
-
LTC3729LEUH-6#PBF.pdf
- Description:
- IC REG CTRLR BUCK 32QFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,608
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Product details
Overview
LTC3729LEUH-6#PBF from Analog Devices (formerly Linear Technology) is a dual-phase, polyphase synchronous step-down controller IC with 0.6V ±1% reference, phase-lockable 250kHz–550kHz fixed-frequency operation, true remote differential sensing, and integrated power-good monitoring. It drives external N-channel MOSFETs in high-current DC/DC converters for server VRMs and large memory arrays.
For engineers reviewing the LTC3729LEUH-6#PBF datasheet, LTC3729LEUH-6#PBF pinout, LTC3729LEUH-6#PBF application, or LTC3729LEUH-6#PBF equivalent, key selection criteria include its dual-phase current-mode control, 32-pin 5mm × 5mm QFN package with exposed ground pad, 4V–30V input range, 99% max duty cycle, and support for up to 12-phase expansion via CLKOUT daisy-chaining.
Technical Context
The LTC3729LEUH-6#PBF implements a constant-frequency, current-mode control architecture with two independent PWM channels operating 180° out of phase. Its internal 0.6V reference feeds an error amplifier whose output (ITH) sets per-phase peak current thresholds via differential sense amplifiers (SENSE1±/SENSE2±) with 75mV max threshold and 46dB CMRR.
Phase synchronization is achieved through PLLIN input and PLLFLTR voltage-controlled oscillator tuning (260kHz–550kHz), while PHASMD selects relative phase offsets (180°/240°) between controllers and CLKOUT (60°/90°/120°). The device integrates OPTI-LOOP compensation, overvoltage soft-latch, micropower shutdown (20µA), and a 5V INTVCC LDO with EXTVCC switchover at 4.7V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reference Voltage | 0.600V ±1% - enables precise 0.7V–5V output regulation with minimal drift over temperature and line. |
| Input Voltage Range | 4V to 30V - supports wide-input industrial and server power rails without external pre-regulation. |
| Switching Frequency | 250kHz to 550kHz - adjustable via PLLFLTR voltage; higher frequencies reduce passive size but increase gate loss. |
| Max Duty Cycle | 99% - allows ultra-low dropout operation down to VIN − VOUT ≈ 0.1V, critical for high-current 12V-to-1V conversion. |
| Current Sense Threshold | 75mV typical - sets peak inductor current; combined with RSENSE, determines per-phase current capability and thermal margin. |
| Power Good Accuracy | ±10% window on EAIN - provides reliable system-level power sequencing and fault detection with 100µs OV/UV masking. |
| Operating Temp Range | −40°C to +85°C - qualified for industrial and computing environments; junction limit 125°C with θJA = 34°C/W. |
Pinout & Package
Package: 32-lead 5mm × 5mm plastic QFN with exposed signal ground pad (must be soldered to PCB). Thermal resistance θJA = 34°C/W; maximum reflow peak body temperature 240°C.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EAIN (1) | Error Amplifier Input | Receives feedback from DIFFOUT; compared to 0.6V reference to regulate output voltage. |
| PLLFLTR (2) | PLL Low-Pass Filter | DC voltage input (0–2.4V) sets oscillator frequency; also outputs phase detector current. |
| PLLIN (3) | External Sync Input | 50kΩ internally terminated; synchronizes rising TG1 edge to external clock's rising edge. |
| PHASMD (4) | Phase Mode Select | Configures relative phase offset between controllers and CLKOUT (GND/Open/INTVCC = 180°/180°/240°). |
| ITH (5) | Error Amp Output | Compensation node and current threshold control; 0–2.4V range sets per-phase peak current. |
| SGND (6) | Signal Ground | Common reference for both controllers; must be routed separately from PGND to avoid noise coupling. |
| VDIFFOUT (7) | Differential Amp Output | Drives external resistive divider; provides true remote sensing across high-current output paths. |
| VOS– / VOS+ (8,9) | Differential Amp Inputs | Accept remote sense points at load; enable precision regulation despite PCB trace IR drop. |
| TG1 / TG2 (14,26) | Top Gate Drivers | Floating N-MOS drivers; swing = INTVCC superimposed on SW node; drive external high-side FETs. |
| SW1 / SW2 (15,25) | Switch Nodes | Connect to inductors; voltage swings from Schottky diode drop below GND to VIN. |
| BOOST1 / BOOST2 (17,24) | Bootstrap Supplies | Capacitors tied between BOOST–SW; supply floating top drivers; swing = INTVCC to (VIN + INTVCC). |
| BG1 / BG2 (18,22) | Bottom Gate Drivers | Ground-referenced N-MOS drivers; swing = 0V to INTVCC; drive synchronous low-side FETs. |
| PGND (19) | Power Ground | Return path for bottom FET sources and CIN (–) terminals; separate from SGND to minimize noise. |
| INTVCC (20) | Internal 5V Regulator | Supplies drivers and logic; bypassed by EXTVCC > 4.7V; requires 1µF ceramic + ≥4.7µF tantalum decoupling. |
| EXTVCC (21) | External Supply Input | Enables high-efficiency INTVCC sourcing from regulated output or auxiliary winding; max 7V. |
| VIN (23) | Main Input Supply | Primary power rail (4–30V); must be closely decoupled to SGND with low-ESR capacitors. |
| CLKOUT (27) | Phase Expansion Clock | Outputs synchronized clock for daisy-chaining up to 12 controllers; enables 15A–200A systems. |
| RUN/SS (28) | Soft-Start & Shutdown | Capacitor sets ramp time; <0.8V forces shutdown; >4.1V arms short-circuit latchoff after timeout. |
| PGOOD (13) | Power-Good Monitor | Open-drain output; pulled low when EAIN deviates >±10% from setpoint; includes 100µs fault masking. |
Key Features
| Feature | Design Value |
|---|---|
| PolyPhase™ Dual-Channel Architecture | Two 180°-out-of-phase controllers reduce RMS input/output capacitor ripple by >70%, enabling smaller, cooler designs. |
| True Remote Differential Sensing | VOS+/VOS− inputs with 0.995–1.005 gain and 46–55dB CMRR compensate for PCB trace losses in >40A systems. |
| OPTI-LOOP® Compensation | Adapts loop response to wide range of output capacitance (e.g., 270µF ×4 ceramic/tantalum) and ESR without redesign. |
| Phase-Lockable Frequency Control | PLLIN sync + PLLFLTR voltage tuning (260–550kHz) ensures deterministic timing across multi-controller systems. |
| Integrated Power-Good Monitoring | PGOOD pin asserts low within microseconds of ±10% output deviation, with 100µs OV/UV masking to prevent nuisance trips. |
Applications
| Server VRM Power Delivery | High-Density Memory Subsystem |
|---|---|
Use Scenario: Regulating 0.7V/40A for CPU core voltage in dual-socket internet servers with tight thermal constraints. IC Role / Device Role / Timing Role: Dual-phase synchronous buck controller managing parallel MOSFET stages with interleaved switching to minimize input ripple and thermal hotspots. Use Value: Reduces required input capacitance by 75% and improves transient response via 180° phase shift-critical for handling rapid CPU load steps. | Use Scenario: Providing stable 1.2V/30A to DDR4/DDR5 memory modules in desktop computers and large memory arrays. IC Role / Device Role / Timing Role: PolyPhase controller driving two independent buck stages with true remote sensing across long PCB traces to the DIMM slots. Use Value: Compensates for >50mΩ interconnect resistance using VOS+/VOS− inputs, maintaining ±0.5% load regulation under full current. |
| Industrial DC Power Distribution | High-Current FPGA/ASIC Core Supply |
Use Scenario: Converting 12V or 24V bus to 3.3V/25A for programmable logic and interface circuitry in factory automation systems. IC Role / Device Role / Timing Role: Fixed-frequency current-mode controller with 4V–30V input range and 99% duty cycle supporting wide-input industrial power rails. Use Value: Enables dropout operation down to VIN − VOUT ≈ 0.1V, sustaining regulation during brownout conditions without external assist. | Use Scenario: Delivering 0.85V/50A to high-performance FPGA cores with aggressive dynamic current demands and strict voltage tolerance. IC Role / Device Role / Timing Role: Dual-phase controller with OPTI-LOOP compensation and 0.6V ±1% reference ensuring fast transient recovery and ±10mV accuracy. Use Value: Maintains 0.85V ±1% under 20A/µs load steps via interleaved ripple cancellation and adaptive loop bandwidth. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-phase synchronous buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3855IUFD#PBF | Single-phase controller with integrated MOSFET drivers; no CLKOUT expansion; 4.5V–38V input; 0.6V ref. | Suitable for lower-current (<20A), space-constrained designs where phase expansion is unnecessary. | Select LTC3855IUFD#PBF only when dual-phase interleaving and 12-phase scalability are not required. |
| ISL6322IRZ-T | Triple-phase controller with SMBus interface; 4.5V–24V input; 0.3–1.85V programmable ref; no remote sensing pins. | Targeted at VR12-compliant CPU power with digital telemetry; lacks differential sense inputs for remote load regulation. | Choose ISL6322IRZ-T for digitally managed, triple-phase CPU VRMs-not for analog-sensed, high-current memory or FPGA supplies. |
Compared with LTC3729LEUH-6#PBF, LTC3855IUFD#PBF simplifies layout but sacrifices phase interleaving benefits and scalability, while ISL6322IRZ-T adds digital control at the cost of analog remote sensing fidelity and analog design flexibility.
Availability
LTC3729LEUH-6#PBF is available at Aetrix Electronics and suitable for server VRMs, high-density memory subsystems, and industrial DC power distribution requiring stable component supply, long-term lifecycle support, and guaranteed performance across –40°C to +85°C.
Supply support for LTC3729LEUH-6#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and power management semiconductors, formed through the acquisition of Linear Technology in 2017.
The LTC3729L-6 product line delivers high-current, multi-phase DC/DC controller solutions optimized for computing, data center, and industrial power systems demanding precision regulation, thermal efficiency, and scalable architecture.
FAQ
What is the function of the PHASMD pin on the LTC3729LEUH-6#PBF?
The PHASMD pin on the LTC3729LEUH-6#PBF selects the relative phase relationship between Controller 1, Controller 2, and the CLKOUT signal. With PHASMD grounded, controllers operate 180° out of phase and CLKOUT leads Controller 1 by 60°; with PHASMD open, CLKOUT leads by 90°; with PHASMD at INTVCC, Controller 2 shifts to 240° and CLKOUT leads by 120°. This enables flexible multi-phase system configuration without external logic.
Does the LTC3729LEUH-6#PBF support true remote voltage sensing, and how is it implemented?
Yes, the LTC3729LEUH-6#PBF supports true remote voltage sensing via dedicated VOS+ and VOS− pins that feed an internal differential amplifier (ADA = 0.995–1.005 V/V, CMRR = 46–55 dB). This amplifier produces VDIFFOUT, which drives the EAIN feedback network-enabling accurate regulation at the load point despite PCB trace resistance, critical for high-current applications like 40A CPU supplies.
How does the RUN/SS pin provide both soft-start and short-circuit protection on the LTC3729LEUH-6#PBF?
The RUN/SS pin on the LTC3729LEUH-6#PBF serves dual functions: during startup, an internal 1.2µA current charges an external capacitor to ramp ITH gradually for controlled soft-start; once operational, if output voltage drops below 70% of nominal, the same capacitor discharges via ISCL current (0.5–4µA), and if it falls below 0.8V, the controller latches off. This eliminates need for separate fault-detection circuitry.
What is the purpose of the CLKOUT pin on the LTC3729LEUH-6#PBF, and what is its timing relationship?
The CLKOUT pin on the LTC3729LEUH-6#PBF provides a synchronized clock signal to daisy-chain additional LTC3729L-6 or compatible controllers, enabling expansion from 2 to up to 12 phases. Its phase relative to Controller 1's TG1 rising edge is configurable via PHASMD: 60° (GND), 90° (open), or 120° (INTVCC), allowing precise interleaving for optimal ripple cancellation in high-current systems.
Can the LTC3729LEUH-6#PBF operate with input voltages below 4V, and what is the undervoltage lockout threshold?
No, the LTC3729LEUH-6#PBF has a guaranteed minimum operating input voltage of 4V. Its undervoltage lockout (UVLO) threshold is specified at 3.5V (typical), with a range of 3.0V to 4.0V. Below this threshold, the controller disables all switching activity and enters shutdown mode-preventing erratic behavior during brownout conditions and ensuring clean startup above 4V.
LTC3729LEUH-6#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- PolyPhase®
- Package/Case:
- 32-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Number of Outputs:
- 2
- Output Phases:
- 2
- Voltage - Supply (Vcc/Vdd):
- 4V ~ 30V
- Frequency - Switching:
- 260kHz ~ 550kHz
- Duty Cycle (Max):
- 99.5%
- Synchronous Rectifier:
- Yes
- Clock Sync:
- No
- Serial Interfaces:
- -
- Control Features:
- Current Limit, Enable, Phase Control, Power Good, Soft Start
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-QFN (5x5)
LTC3729LEUH-6#PBF FAQ
1.How can I place an order for LTC3729LEUH-6#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3729LEUH-6#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3729LEUH-6#PBF reliable?
The price and inventory of LTC3729LEUH-6#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3729LEUH-6#PBF is usually 5 days.
3.What payment methods are accepted for LTC3729LEUH-6#PBF?
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Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3729LEUH-6#PBF?
LTC3729LEUH-6#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3729LEUH-6#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3729LEUH-6#PBF?
For technical support, including LTC3729LEUH-6#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3729LEUH-6#PBF requirements.
6.How does Aetrix verify that LTC3729LEUH-6#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3729LEUH-6#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3729LEUH-6#PBF meets industry standards.
7.What is the process for return or replacement of LTC3729LEUH-6#PBF?
All LTC3729LEUH-6#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3729LEUH-6#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3729LEUH-6#PBF part is unused and in its original packaging.
Return procedure for LTC3729LEUH-6#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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