Analog Devices Inc. LTC3736EUF-1#PBF
- Part No.:
- LTC3736EUF-1#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 24-WFQFN Exposed Pad
- Datasheet:
-
LTC3736EUF-1#PBF.pdf
- Description:
- IC REG CTRLR BUCK 24QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC3736EUF-1#PBF from Analog Devices (formerly Linear Technology) is a dual 2-phase synchronous step-down controller driving external complementary MOSFETs without current-sense resistors. It features spread-spectrum switching (450–580 kHz), 0.6 V ±1.5% reference, 2.75 V to 9.8 V input range, and 100% duty-cycle low-dropout operation - enabling high-efficiency power conversion in space-constrained battery-powered systems such as dual-rail notebook subsystems.
For engineers reviewing the LTC3736EUF-1#PBF datasheet, LTC3736EUF-1#PBF pinout, LTC3736EUF-1#PBF application, or LTC3736EUF-1#PBF equivalent, key selection criteria include no-RSENSE current sensing, out-of-phase interleaving for reduced input RMS current, tracking startup capability, and micropower shutdown (9 µA).
Technical Context
The LTC3736EUF-1#PBF implements constant-frequency current-mode control with VDS-based MOSFET sensing, eliminating sense resistors while maintaining accurate peak-current limiting. Its dual controllers operate 180° out of phase to halve input capacitor RMS current versus single-phase dual controllers.
Spread-spectrum modulation randomly dithers switching frequency between 450 kHz and 580 kHz, reducing EMI peak amplitudes by >20 dBm. Pulse-skipping at light loads maintains high efficiency without discontinuous conduction, and internal soft-start (1 ms typical) ensures controlled VOUT ramp-up with tracking support between outputs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.75 V to 9.8 V - supports 2-cell Li-ion batteries and wide-input industrial rails. |
| Reference Voltage | 0.6 V ±1.5% over –40°C to 85°C - enables precise output regulation with minimal drift. |
| Switching Frequency | 450–580 kHz (spread spectrum enabled); 300/550/750 kHz selectable (SS disabled) - balances EMI, efficiency, and passive size. |
| Shutdown Current | 9 µA - extends battery life during system sleep modes. |
| Output Overvoltage Threshold | 0.68 V at VFB (±20 mV hysteresis) - triggers immediate P-MOSFET turn-off to protect downstream loads. |
| Current Sense Threshold | Configurable: 85/125/204 mV via IPRG pins - adapts peak-current limit to MOSFET RDS(on) without resistor networks. |
| Power Good Accuracy | ±10% window around 0.6 V - provides reliable system-level power sequencing and fault detection. |
Pinout & Package
The LTC3736EUF-1#PBF is housed in a thermally enhanced 24-pin (4 mm × 4 mm) QFN package with exposed PGND pad (Pin 25) requiring PCB soldering for thermal and electrical integrity. Package height is 0.75 mm, suitable for ultra-thin portable designs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| ITH1 / ITH2 (Pins 1, 8) | Error amplifier compensation & current threshold node | Voltage sets peak inductor current; 0.7–2.0 V range enables stable loop compensation and adjustable current limit. |
| FREQ (Pin 3) | Frequency filter/adjust input | Accepts capacitor for spread-spectrum filtering or voltage for analog frequency tuning (300–750 kHz when SS disabled). |
| RUN/SS (Pin 14) | Enable & external soft-start input | Pull below 0.65 V shuts down IC; internal 0.7 µA current source charges external CSS for programmable start-up time. |
| TRACK (Pin 6) | Tracking reference input for Channel 2 | Allows VOUT2 to follow VOUT1 during startup using resistor-divider ratio matching - critical for FPGA or multi-core SoC rail sequencing. |
| PGOOD (Pin 9) | Open-drain power-good monitor | Asserts low if either VFB1 or VFB2 deviates >±10% from 0.6 V - enables safe system enable/disable coordination. |
| TG1/TG2 (Pins 17, 15) | Top-gate drive outputs | Drive external P-channel MOSFET gates from PGND to SENSE+ - eliminates need for level-shifting circuitry. |
| BG1/BG2 (Pins 19, 13) | Bottom-gate drive outputs | Drive external N-channel MOSFET gates from PGND to SENSE+ - supports high-side synchronous rectification. |
| SENSE1+/SENSE2+ (Pins 21, 11) | Current-sense reference inputs | Connect to P-MOSFET source; provide gate-drive supply and differential current sensing - enables no-RSENSE architecture. |
Key Features
| Feature | Design Value |
|---|---|
| No-RSENSE current sensing | Uses MOSFET VDS drop for current measurement - eliminates sense-resistor power loss, board area, and thermal drift errors. |
| 2-phase interleaved operation | 180° phase shift between channels reduces input capacitor RMS current by ~50% - enables smaller, lower-cost input bulk capacitors. |
| Spread-spectrum frequency modulation | Randomizes switching frequency across 450–580 kHz band - lowers peak conducted/radiated EMI by >20 dBm, easing EMC certification. |
| Tracking startup with internal soft-start | Single CSS capacitor controls VOUT1 ramp; TRACK pin synchronizes VOUT2 rise - ensures monotonic, glitch-free multi-rail power-up for processors and FPGAs. |
| 100% duty-cycle low-dropout mode | Extends battery runtime by sustaining regulation as VIN approaches VOUT - critical for Li-ion discharge tail-end operation. |
| Output overvoltage protection (OVP) | Hardware-comparator trips at +13.3% VREF (0.68 V) - disables top switch within microseconds to prevent damage to sensitive loads. |
Applications
| Mobile Computing Power Rails | FPGA Core & I/O Supply Sequencing |
|---|---|
|
Use Scenario: Dual-output power delivery for notebook CPU core (1.8 V) and memory I/O (2.5 V) from 2-cell Li-ion (3.0–8.4 V). IC Role / Device Role / Timing Role: Dual 2-phase controller managing independent feedback loops, interleaved switching, and synchronized soft-start via TRACK pin. Use Value: Reduces input ripple current by 49% versus single-phase dual controllers, allowing 47 µF ×2 ceramic input caps instead of 100 µF tantalum - saving 32 mm² PCB area and lowering EMI filter cost. |
Use Scenario: Sequenced 1.2 V core and 2.5 V auxiliary rails for Xilinx Artix-7 FPGA during cold boot. IC Role / Device Role / Timing Role: Master-slave tracking controller where VOUT2 follows VOUT1 with matched resistor-divider ratios on VFB2 and TRACK pins. Use Value: Guarantees monotonic, slope-matched voltage ramps meeting FPGA's tRAMP and ∆V/∆t requirements - prevents configuration lockup or I/O contention. |
| Portable Medical Instrumentation | Distributed DC Power Systems |
|
Use Scenario: Battery-backed dual-rail supply (3.3 V analog, 1.8 V digital) for handheld ultrasound front-end with strict noise and efficiency targets. IC Role / Device Role / Timing Role: Low-noise controller using spread-spectrum mode and pulse-skipping to minimize conducted EMI into sensitive ADC paths. Use Value: Achieves <–70 dBm conducted noise at 500 kHz fundamental (RBW = 30 Hz), avoiding post-regulation LDOs and preserving >92% full-load efficiency. |
Use Scenario: Distributed 5 V and 3.3 V supplies in industrial IoT gateway with centralized 12 V bus and local point-of-load regulation. IC Role / Device Role / Timing Role: High-density dual controller delivering up to 6 A total (3 A per channel) in 4 mm × 4 mm footprint with thermal pad soldered to inner ground plane. Use Value: Enables 2.2 µH inductors and 47 µF output ceramics per rail - cuts solution volume by 40% vs discrete dual buck ICs while maintaining <15 mVpp ripple. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-phase synchronous controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP2953GQ-Z (Monolithic Power) | Integrated MOSFETs (40 V max), fixed 500 kHz, no spread spectrum, no TRACK pin | Suitable for lower-current (<3 A/channel), fixed-frequency designs where board space > EMI is priority | Select when integration outweighs EMI flexibility and sequencing needs; requires redesign for no-RSENSE and tracking. |
| ISL95836IRZ (Renesas) | 3-phase capable, supports VR12.5/IMVP7, includes SVID interface, 0.5% ref accuracy | Targeted at CPU VR applications with dynamic VID programming - not suited for standalone dual-rail sequencing | Choose only for Intel-compatible processor VRMs; lacks TRACK, no-RSENSE, and spread-spectrum features essential for portable multi-rail use. |
Compared with MP2953GQ-Z and ISL95836IRZ, the LTC3736EUF-1#PBF uniquely combines no-RSENSE sensing, hardware-based TRACK sequencing, and certified spread-spectrum EMI reduction - making it the only option for compact, low-noise, battery-operated dual-rail systems requiring guaranteed monotonic startup and long discharge runtime.
Availability
LTC3736EUF-1#PBF is available at Aetrix Electronics and suitable for mobile computing power rails, FPGA supply sequencing, portable medical instrumentation, and distributed DC power systems requiring stable component supply, long-lifecycle availability, and guaranteed parametric performance across –40°C to 85°C.
Supply support for LTC3736EUF-1#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its legacy of high-performance power management ICs with rigorous characterization and automotive-grade reliability testing.
The LTC3736EUF-1#PBF belongs to Linear's No-RSENSE® controller family, designed specifically for high-efficiency, low-EMI, dual-output DC/DC conversion in space- and noise-sensitive portable electronics.
FAQ
What is the function of the TRACK pin on the LTC3736EUF-1#PBF?
The TRACK pin on the LTC3736EUF-1#PBF enables hardware-based output voltage tracking during startup. When the TRACK voltage is below 0.6 V, the second controller regulates VFB2 to match the TRACK voltage instead of the internal 0.6 V reference - allowing VOUT2 to precisely follow VOUT1's ramp rate. This is implemented using matched resistor dividers on VOUT1 (to TRACK) and VOUT2 (to VFB2), ensuring monotonic, slope-controlled sequencing required by FPGAs and multi-core processors. The LTC3736EUF-1#PBF does not require external timing components or firmware to achieve this behavior.
Does the LTC3736EUF-1#PBF require external current-sense resistors?
No, the LTC3736EUF-1#PBF does not require external current-sense resistors. It uses MOSFET VDS sensing through the SENSE+ and SW pins to measure inductor current - a feature branded No-RSENSE™ by Linear Technology. This eliminates power loss, board area, and thermal drift associated with sense resistors. Peak current threshold is set via the ITH pin voltage and fine-tuned using IPRG1/IPRG2 pins to select 85 mV, 125 mV, or 204 mV maximum sense voltage - all calibrated for direct use with standard P-channel MOSFETs. The LTC3736EUF-1#PBF achieves this without compromising current-limit accuracy or stability.
How does spread-spectrum operation reduce EMI in the LTC3736EUF-1#PBF?
The LTC3736EUF-1#PBF reduces EMI by randomly dithering its switching frequency between 450 kHz and 580 kHz when SSDIS is grounded. This spreads energy across a 130 kHz bandwidth instead of concentrating it at a single fundamental frequency and its harmonics - lowering peak radiated and conducted noise by >20 dBm as measured in standard EMC test setups (RBW = 30 Hz). Unlike fixed-frequency converters, the LTC3736EUF-1#PBF avoids resonant coupling with board structures or cables, simplifying compliance with CISPR 22/32 Class B limits. The spread-spectrum function is fully hardware-controlled and requires no configuration registers or software intervention.
What is the purpose of the exposed pad (Pin 25) on the LTC3736EUF-1#PBF QFN package?
The exposed pad (Pin 25) on the LTC3736EUF-1#PBF is electrically connected to PGND and serves dual thermal and electrical functions. It must be soldered directly to a PCB thermal pad tied to the main ground plane to achieve θJA = 37°C/W - enabling reliable operation at full load in ambient temperatures up to 85°C. Electrically, it provides low-inductance return paths for high-frequency gate-drive currents and reverse-current comparator signals, minimizing noise coupling into sensitive analog blocks like the error amplifier and reference. Failure to solder the exposed pad degrades thermal performance and may cause instability or premature thermal shutdown. The LTC3736EUF-1#PBF datasheet explicitly mandates this connection.
Can the LTC3736EUF-1#PBF operate with 100% duty cycle, and under what conditions?
Yes, the LTC3736EUF-1#PBF supports true 100% duty-cycle operation when input voltage approaches or equals the regulated output voltage. In this mode, the top P-channel MOSFET remains continuously on, and output voltage equals VIN minus the sum of P-MOSFET RDS(on) × ILOAD and inductor DCR × ILOAD. This low-dropout behavior extends usable battery runtime in Li-ion systems - for example, sustaining 1.8 V output down to VIN = 1.95 V at 2 A load. The LTC3736EUF-1#PBF automatically transitions into 100% mode without external intervention when the error amplifier drives ITH to its maximum, and resumes PWM operation as VIN rises. Undervoltage lockout (2.15–2.75 V) ensures safe disable before dropout becomes uncontrolled.
LTC3736EUF-1#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 24-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Number of Outputs:
- 2
- Output Phases:
- 2
- Voltage - Supply (Vcc/Vdd):
- 2.75V ~ 9.8V
- Frequency - Switching:
- 300kHz ~ 750kHz
- Duty Cycle (Max):
- 100%
- Synchronous Rectifier:
- Yes
- Clock Sync:
- No
- Serial Interfaces:
- -
- Control Features:
- Current Limit, Enable, Frequency Control, Power Good, Soft Start, Tracking
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-QFN (4x4)
LTC3736EUF-1#PBF FAQ
1.How can I place an order for LTC3736EUF-1#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3736EUF-1#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3736EUF-1#PBF reliable?
The price and inventory of LTC3736EUF-1#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3736EUF-1#PBF is usually 5 days.
3.What payment methods are accepted for LTC3736EUF-1#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3736EUF-1#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3736EUF-1#PBF?
LTC3736EUF-1#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3736EUF-1#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3736EUF-1#PBF?
For technical support, including LTC3736EUF-1#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3736EUF-1#PBF requirements.
6.How does Aetrix verify that LTC3736EUF-1#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3736EUF-1#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3736EUF-1#PBF meets industry standards.
7.What is the process for return or replacement of LTC3736EUF-1#PBF?
All LTC3736EUF-1#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3736EUF-1#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3736EUF-1#PBF part is unused and in its original packaging.
Return procedure for LTC3736EUF-1#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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