Analog Devices Inc. LTC3737EGN#PBF
- Part No.:
- LTC3737EGN#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 24-SSOP (0.154", 3.90mm Width)
- Datasheet:
-
LTC3737EGN#PBF.pdf
- Description:
- IC REG CTRLR BUCK 24SSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC3737EGN#PBF from Analog Devices (formerly Linear Technology) is a dual 2-phase synchronous step-down DC/DC controller for high-efficiency power conversion in portable and battery-powered systems. It supports input voltage from 2.75V to 9.8V, delivers two independently regulated outputs from 0.6V to VIN, and features MOSFET VDS current sensing (no RSENSE), out-of-phase operation to reduce input ripple, and programmable output voltage tracking - used in dual-rail notebook CPU/core logic supplies.
For engineers reviewing the LTC3737EGN#PBF datasheet, LTC3737EGN#PBF pinout, LTC3737EGN#PBF application, or LTC3737EGN#PBF equivalent, key selection considerations include its 2-phase interleaved architecture, 0.6V ±1.5% reference accuracy, selectable Burst Mode® or pulse-skipping light-load operation, PLL-based frequency synchronization (250–850kHz), and support for P-channel MOSFETs with no external sense resistor.
Technical Context
The LTC3737EGN#PBF implements a constant-frequency current-mode control architecture with two independent controllers operating 180° out of phase. Each channel uses differential VDS sensing across external P-channel MOSFETs to eliminate sense resistors, improving efficiency and thermal performance. The ITH pins serve as combined error amplifier outputs and peak current threshold inputs, directly setting inductor peak current via voltage-controlled comparator thresholds.
Frequency is set either by the PLLLPF pin (300/550/750kHz options) or externally synchronized via SYNC/MODE (250–850kHz guaranteed lock range). Tracking startup is implemented by routing VOUT1's feedback divider to the TRACK pin to force VFB2 regulation against TRACK instead of the internal 0.6V reference - enabling monotonic, ratio-matched ramp-up of VOUT2 relative to VOUT1.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Range | 2.75V to 9.8V - supports single/dual Li-ion battery inputs and wide industrial rails without external LDO pre-regulation. |
| VOUT Range | 0.6V to VIN - enables low-voltage core logic (e.g., 1.8V, 2.5V) and adjustable auxiliary rails from same input. |
| Reference Voltage | 0.6V ±1.5% over –40°C to 85°C - ensures tight output regulation tolerance critical for CPU/GPU core supplies. |
| Switching Frequency | 250kHz to 850kHz (PLL-locked) - allows optimization between efficiency (lower f) and component size (higher f). |
| Peak Current Sense Threshold | Selectable: 85mV / 125mV / 204mV per channel via IPRG1/IPRG2 - matches MOSFET RDS(ON) to minimize conduction loss without sense resistor. |
| Light-Load Mode | Burst Mode® or pulse skipping - achieves >85% efficiency at 10mA load while maintaining low output ripple in pulse-skip mode. |
| Shutdown IQ | 9µA - extends battery runtime during system sleep states in portable instruments and PDAs. |
| PGOOD Accuracy | ±10% window around 0.6V reference - provides reliable power sequencing and fault detection for downstream logic. |
Pinout & Package
The LTC3737EGN#PBF is housed in a thermally enhanced 24-lead narrow SSOP package (0.15mm lead pitch, 7.6mm × 4.4mm body). Exposed pad (Pin 25) is PGND and must be soldered to PCB for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN (Pin 5) | Signal Power Supply | Powers internal logic and error amplifiers; requires RC filtering (e.g., 10Ω + 1µF) to suppress noise coupling into control loops. |
| PGATE1/PGATE2 (Pins 17, 15) | P-Channel MOSFET Gate Drivers | Drive external high-side P-MOSFETs from PGND to SENSE+; 40ns rise/fall time supports >500kHz switching. |
| SENSE1+/SENSE2+ (Pins 21, 11) | Current Sense Positive Inputs | Connect to MOSFET source to enable VDS-based current sensing - eliminates RSENSE, reduces heat and BOM cost. |
| SW1/SW2 (Pins 22, 10) | Switch Node Terminals | Connect to MOSFET drain and inductor; serve as negative inputs to differential current comparators. |
| ITH1/ITH2 (Pins 1, 8) | Error Amplifier Output / Current Threshold | Set peak inductor current; voltage range 0.7V–2.0V defines comparator trip point - also used for loop compensation. |
| TRACK (Pin 6) | Tracking Reference Input | Enables VOUT2 to track VOUT1 start-up via external resistor divider - critical for controlled power sequencing in multi-rail systems. |
| RUN/SS (Pin 14) | Enable & External Soft-Start | Pull below 0.65V to shut down; internal 0.7µA current source charges external CSS capacitor for programmable soft-start ramp. |
| SYNC/MODE (Pin 18) | PLL Clock Input / Light-Load Mode Select | High = Burst Mode®; Low = pulse skipping; clocked = PLL sync - provides flexible noise/efficiency trade-off in EMI-sensitive applications. |
| PGOOD (Pin 9) | Open-Drain Power Good Monitor | Asserts low if either VFB1 or VFB2 deviates >±10% from 0.6V - used for system power sequencing and fault signaling. |
| PLLLPF (Pin 3) | PLL Loop Filter / Frequency Select | Floating = 550kHz; tied to GND = 300kHz; tied to VIN = 750kHz - or connects RC filter to ground when externally synchronized. |
Key Features
| Feature | Design Value |
|---|---|
| No RSENSE VDS current sensing | Eliminates power loss and board space of sense resistors; improves efficiency by up to 3% at 2A load vs. resistor-based sensing. |
| 2-phase interleaved operation | Reduces input capacitor RMS current by ~50% (e.g., 1.79A → 0.91A), enabling smaller, lower-cost ceramic input capacitors and lower EMI. |
| Programmable output voltage tracking | Ensures monotonic, ratio-controlled startup of secondary rail (e.g., VDDQ tracking VDD) - prevents latch-up in DDR memory interfaces. |
| True PLL frequency synchronization | Guaranteed lock from 250kHz to 850kHz - allows noise-sensitive systems (audio, RF) to avoid switching frequency bands and harmonics. |
| Selectably optimized light-load efficiency | Burst Mode® achieves >90% efficiency at 10mA; pulse skipping maintains low output ripple (<10mVpp) for analog/sensor rails. |
| 100% duty cycle low-dropout operation | Extends battery runtime by sustaining regulation down to VIN ≈ VOUT + ILOAD × RDS(ON) - critical for Li-ion end-of-discharge operation. |
Applications
| Portable Computing Power | Dual-Rail Memory Systems |
|---|---|
|
Use Scenario: Dual-output power supply for notebook CPU (2.5V) and GPU core (1.8V) powered from 2-cell Li-ion (7V–8.4V). IC Role / Device Role / Timing Role: Dual 2-phase controller managing interleaved switching, output tracking, and coordinated soft-start to meet Intel VRD specifications. Use Value: Reduces input capacitance by 50%, lowers thermal stress on MOSFETs, and ensures monotonic VDDQ ramp-up before VDD in DDR3/DDR4 interfaces. |
Use Scenario: DDR memory subsystem requiring tightly tracked VDD (1.5V) and VDDQ (1.35V) with simultaneous, ratio-matched startup. IC Role / Device Role / Timing Role: Precision tracking controller using TRACK pin to servo VFB2 against scaled VOUT1 feedback - eliminates need for discrete tracking ICs. Use Value: Prevents data corruption during power-up by enforcing VDDQ ≤ VDD + 0.1V, meeting JEDEC JESD79-4 timing requirements. |
| Industrial Portable Instruments | Distributed DC Power Systems |
|
Use Scenario: Handheld test equipment with isolated analog front-end (3.3V) and digital processing rail (1.2V), powered from 3.7V Li-ion. IC Role / Device Role / Timing Role: High-efficiency dual controller delivering ultra-low-noise outputs via pulse-skipping mode and 0.6V reference stability. Use Value: Achieves <15µVRMS output noise at 100mA load - meets EN 61000-4-3 radiated immunity requirements for Class B instrumentation. |
Use Scenario: Telecom remote radio unit (RRU) with separate 5V analog bias and 1.1V FPGA core supplies derived from 12V intermediate bus. IC Role / Device Role / Timing Role: Interleaved 2-phase controller minimizing input ripple current into shared 12V bus - avoids interaction with other DC/DC converters. Use Value: Enables use of single 22µF X7R ceramic input cap instead of three 10µF caps - saves 28mm² PCB area and reduces bill-of-materials cost. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-phase step-down controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3855EUH#PBF | Single-channel, 2-phase controller with integrated gate drivers; supports N-channel MOSFETs; no TRACK pin; 4.5–38V VIN. | Designed for higher-input industrial systems; lacks output tracking and dual independent VOUT control. | Choose LTC3855EUH#PBF only when N-MOSFET topology and wider VIN are required - not suitable for Li-ion portable tracking applications. |
| MP2918GL-Z | Monolithic dual 2-phase controller with integrated MOSFETs; fixed 0.6V reference; no PLL sync; 4.5–28V VIN; QFN-40 package. | Higher integration but no VDS sensing or TRACK functionality; limited to mid-range input voltages. | MP2918GL-Z fits compact, cost-sensitive designs where board space is constrained and tracking is unnecessary - not drop-in compatible. |
Compared with LTC3737EGN#PBF, LTC3855EUH#PBF offers higher VIN capability and N-MOSFET drive but omits tracking and true dual-output independence, while MP2918GL-Z integrates power stages at the expense of flexibility, sensing method, and low-VIN suitability - making LTC3737EGN#PBF uniquely suited for precision-tracked, battery-fed dual-rail systems.
Availability
LTC3737EGN#PBF is available at Aetrix Electronics and suitable for portable computing, DDR memory power sequencing, industrial handheld instruments, and distributed telecom power systems requiring stable component supply, long-lifecycle availability, and guaranteed parametric performance over –40°C to 85°C.
Supply support for LTC3737EGN#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and power management semiconductors, serving industrial, automotive, communications, and healthcare markets.
The LTC3737EGN#PBF belongs to Linear's legacy high-efficiency DC/DC controller product line, specifically engineered for dual-rail, battery-powered applications demanding precision tracking, ultra-low quiescent current, and resistorless current sensing - targeting notebook, PDA, and portable instrumentation designs.
FAQ
What is the maximum guaranteed PLL lock range for LTC3737EGN#PBF?
The LTC3737EGN#PBF guarantees phase-locked loop synchronization across an external clock frequency range of 250kHz to 850kHz under all process, voltage, and temperature conditions. This is specified in the Electrical Characteristics table under "Phase-Locked Loop Lock Range" and confirmed in the Typical Performance Characteristics (Figure 3737 G12). Operation outside this band may result in loss of lock or increased jitter - always verify with actual bench testing at system-level operating conditions.
Does LTC3737EGN#PBF support N-channel MOSFETs?
No, LTC3737EGN#PBF is designed exclusively for external P-channel high-side MOSFETs. Its PGATE outputs swing from PGND to SENSE+, which is compatible only with P-MOSFET gate drive requirements. Attempting to drive N-MOSFETs would require bootstrapped high-side gate drive circuitry not supported by the LTC3737EGN#PBF architecture - use LTC3855 or LTC3857 for N-MOSFET-based designs.
How does the TRACK pin function during normal regulation (not startup)?
During steady-state operation, the TRACK pin has no active role in regulation - it only influences VOUT2 startup behavior. Once VOUT2 reaches regulation, the error amplifier (EAMP2) compares VFB2 to the internal 0.6V reference, independent of the TRACK voltage. The TRACK pin is effectively disconnected from the control loop after soft-start completes, ensuring stable long-term output accuracy unaffected by TRACK node noise or drift.
Can LTC3737EGN#PBF operate with only one output enabled?
Yes, LTC3737EGN#PBF supports single-output operation. To disable Channel 2, tie VFB2 to SGND and leave ITH2 floating or pull it to SGND - this forces the second controller into shutdown while Channel 1 remains fully functional. However, the 2-phase interleaving benefit is lost, and input ripple reverts to single-phase levels. For dedicated single-channel use, consider lower-cost alternatives like LTC3780.
What is the purpose of the exposed pad on the LTC3737EGN#PBF SSOP package?
The exposed pad (Pin 25) on the LTC3737EGN#PBF is electrically connected to PGND and serves as the primary thermal and low-impedance return path for gate drive currents. Per the manufacturer's Package Information section, it must be soldered to a PCB copper pour tied to PGND - failure to do so risks thermal overload, gate drive instability, and premature device failure. Thermal resistance θJA is specified at 130°C/W only when the pad is properly soldered.
LTC3737EGN#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 24-SSOP (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Number of Outputs:
- 2
- Output Phases:
- 2
- Voltage - Supply (Vcc/Vdd):
- 2.75V ~ 9.8V
- Frequency - Switching:
- 300kHz ~ 750kHz
- Duty Cycle (Max):
- 100%
- Synchronous Rectifier:
- Yes
- Clock Sync:
- Yes
- Serial Interfaces:
- -
- Control Features:
- Current Limit, Enable, Power Good, Soft Start, Tracking
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-SSOP
LTC3737EGN#PBF FAQ
1.How can I place an order for LTC3737EGN#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3737EGN#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3737EGN#PBF reliable?
The price and inventory of LTC3737EGN#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3737EGN#PBF is usually 5 days.
3.What payment methods are accepted for LTC3737EGN#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3737EGN#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3737EGN#PBF?
LTC3737EGN#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3737EGN#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3737EGN#PBF?
For technical support, including LTC3737EGN#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3737EGN#PBF requirements.
6.How does Aetrix verify that LTC3737EGN#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3737EGN#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3737EGN#PBF meets industry standards.
7.What is the process for return or replacement of LTC3737EGN#PBF?
All LTC3737EGN#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3737EGN#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3737EGN#PBF part is unused and in its original packaging.
Return procedure for LTC3737EGN#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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