Analog Devices Inc. LTC3770EUH#PBF
- Part No.:
- LTC3770EUH#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 32-WFQFN Exposed Pad
- Datasheet:
-
LTC3770EUH#PBF.pdf
- Description:
- IC REG CTRLR BUCK 32QFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,067
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Product details
Overview
LTC3770EUH#PBF from Analog Devices (formerly Linear Technology) is a synchronous step-down switching regulator controller with valley current mode control, output voltage tracking, programmable margining, and PLL-based external clock synchronization. It operates from 4V to 32V input, delivers 0.6V reference accuracy of ±0.67%, supports ≤100ns minimum on-time, and enables resistor-programmable switching frequency - used in high-performance server power supplies for ASIC and memory rail regulation.
For engineers reviewing the LTC3770EUH#PBF datasheet, LTC3770EUH#PBF pinout, LTC3770EUH#PBF application, or LTC3770EUH#PBF equivalent, key selection considerations include its no-RSENSE capability via MOSFET RDS(ON) sensing, dual N-channel gate driver strength (4A peak), programmable cycle-by-cycle current limit, and thermal performance advantage of the 5mm × 5mm QFN package (θJA = 34°C/W).
Technical Context
The LTC3770EUH#PBF implements constant-on-time, valley current mode control without requiring an external sense resistor - it supports Kelvin sensing via SENSE+/SENSE– pins or direct SW/PGND sensing using bottom MOSFET RDS(ON). Its internal 5V INTVCC regulator powers dual gate drivers, while the PLL synchronizes switching to an external clock via PLLIN/PLLFLTR pins.
It features true current-mode operation with adjustable ITH threshold (0–2.4V), programmable soft-start via TRACK/SS pin, and robust fault protection including output overvoltage lockout (±10% window), input UVLO (3.2–4.0V), and current foldback limiting disabled at startup. Margining is implemented via MARGIN0/MARGIN1 logic inputs and MPGM resistor programming.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4V to 32V - supports wide-range industrial and server inputs, including 12V, 24V, and 28V bus rails. |
| Reference Voltage Accuracy | ±0.67% at 0.6V - enables tight regulation for DDR memory and CPU core rails requiring <±1% tolerance. |
| Min On-Time | ≤100ns - allows high VIN-to-low VOUT conversion (e.g., 24V→0.6V) at practical frequencies without pulse-skipping. |
| Switching Frequency | Resistor-programmable (external RON) - enables optimization for efficiency (lower f) or size (higher f); PLL sync supports deterministic timing in multi-rail systems. |
| Gate Driver Output | Dual N-channel drivers with 4A peak TG/BG sink/source - drives large MOSFETs directly, reducing need for external buffers in 10A+ designs. |
| Thermal Resistance | θJA = 34°C/W (QFN) - enables higher continuous power density vs. SSOP (130°C/W), critical for compact server VRMs. |
| Current Sense Flexibility | Supports optional sense resistor or MOSFET RDS(ON) sensing - eliminates sense resistor losses for efficiency-critical applications. |
Pinout & Package
Package: 32-lead (5mm × 5mm) plastic QFN with exposed pad (SGND), –40°C to +85°C operating range. Exposed pad must be soldered to PCB ground for electrical integrity and thermal performance (θJA = 34°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN (Pin 17) | Main input supply connection | Accepts 4V–32V; requires local 0.1–1μF ceramic decoupling to PGND. |
| SW (Pin 24) | Switch node | Connects to inductor and top MOSFET source; swing ranges from ~–0.7V to VIN. |
| TG (Pin 25) | Top gate driver output | Drives top N-MOSFET gate with INTVCC-referenced swing; 4A peak drive capability. |
| BG (Pin 22) | Bottom gate driver output | Drives bottom N-MOSFET gate between PGND and INTVCC; 4A peak sink/source. |
| SENSE+ / SENSE– (Pins 24/23) | Current sense comparator inputs | Enable Kelvin sensing across external resistor or MOSFET; support no-RSENSE operation when SENSE+ = SW, SENSE– = PGND. |
| VFB (Pin 5) | Error amplifier feedback input | Compares output divider voltage against 0.6V reference; sets regulation point. |
| ITH (Pin 6) | Error amp compensation / current threshold | 0–2.4V control voltage sets valley current limit; also serves as loop compensation node. |
| TRACK/SS (Pin 14) | Tracking & soft-start input | Internal 1.4μA current charges external capacitor for controlled ramp-up; accepts master VFB for rail sequencing. |
| PLLIN / PLLFLTR (Pins 16/15) | Phase-locked loop interface | PLLIN accepts external clock (50kHz–1MHz); PLLFLTR hosts low-pass filter for phase detector output. |
| PGOOD (Pin 32) | Power-good open-drain output | Asserts low when VFB exits ±10% window after 25μs mask timer - used for system enable sequencing. |
| RUN (Pin 30) | Enable control input | IC enabled when >1.5V; shutdown draws <30μA - supports precise power sequencing. |
| MPGM / MARGIN0 / MARGIN1 (Pins 13/9/8) | Margining control interface | Two-bit logic selects margin-high/margin-low/no-margin; MPGM resistor sets offset magnitude (±1–5%). |
Key Features
| Feature | Design Value |
|---|---|
| No-RSENSE operation | Eliminates sense resistor losses by using bottom MOSFET RDS(ON) for current sensing - improves full-load efficiency by 0.5–1.2% in 12V→1.2V/10A designs. |
| Valley current mode control | Provides inherent cycle-by-cycle current limiting and stable operation across wide VIN/VOUT ratios without slope compensation. |
| Programmable margining | Enables ±1% to ±5% output voltage adjustment via external MPGM resistor and MARGIN0/MARGIN1 logic - supports production test and BIOS-controlled voltage tuning. |
| Output voltage tracking | Allows precise sequencing of multiple rails (e.g., VDDQ before VDD) using master/slave configuration - meets JEDEC DDR4/DDR5 power-up timing requirements. |
| PLL synchronization | Enables deterministic switching alignment across multiple controllers - reduces EMI peak amplitude and simplifies filter design in multi-phase systems. |
Applications
| Server Memory Power Supply | ASIC Core Voltage Regulator |
|---|---|
Use Scenario: Delivering tightly regulated 1.2V/10A to DDR4/DDR5 memory modules with strict sequencing and margining requirements. IC Role / Device Role / Timing Role: Primary synchronous buck controller managing VDDQ rail, performing tracking against VDD, and enabling BIOS-adjustable voltage margins during stress testing. Use Value: Achieves ±0.67% reference accuracy and <100ns min on-time to maintain regulation at 24V input → 1.2V output; eliminates sense resistor to preserve >94% efficiency at full load. | Use Scenario: Generating 0.8V/25A core supply for high-performance FPGA or AI accelerator with dynamic load steps up to 10A/μs. IC Role / Device Role / Timing Role: High-bandwidth current-mode controller with fast transient response, synchronized via PLL to system clock to minimize jitter-induced noise coupling. Use Value: 4A gate drivers reduce MOSFET switching time; valley current sensing enables accurate current limiting during rapid load transients without external components. |
| Industrial Distributed Power System | High-Density Telecom VRM |
Use Scenario: Providing isolated, sequenced 3.3V and 5V rails from a 24V intermediate bus in programmable logic controllers (PLCs). IC Role / Device Role / Timing Role: Master controller for 3.3V rail with TRACK/SS pin driving slave LTC3770 on 5V rail - ensures monotonic startup per IEC 61000-4-11. Use Value: Internal soft-start current (1.4μA) and resistor-programmable ramp rate eliminate need for external timers; wide 4–32V input accommodates brownout conditions. | Use Scenario: Compact 48V→3.3V/15A VRM in space-constrained telecom line cards requiring low EMI and high reliability. IC Role / Device Role / Timing Role: Synchronized buck controller operating at 500kHz, locked to system backplane clock to suppress conducted emissions in narrow bands. Use Value: PLL synchronization reduces peak EMI by 8–12dB; QFN thermal performance (34°C/W) sustains 15A continuous output without forced air. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3890EUH#PBF | Includes integrated 5V bias supply for external drivers; lacks margining and tracking; higher IQ (2.5mA vs 1.3mA) | Preferred for designs needing bias supply for external high-side drivers; not suitable for margining-critical server memory rails | Select LTC3890EUH#PBF only if external driver bias is required and margining/tracking are unnecessary. |
| MP2940AGQ-Z | Fixed 600kHz frequency; no PLL sync; no margining; supports PMBus for telemetry | Used where digital monitoring is prioritized over analog precision; lacks analog tracking and voltage margining capabilities | Choose MP2940AGQ-Z for PMBus-enabled systems requiring telemetry but not analog rail coordination. |
Compared with LTC3890EUH#PBF and MP2940AGQ-Z, the LTC3770EUH#PBF uniquely combines analog voltage margining, precise output tracking, and PLL synchronization in a single controller - making it the only option among the three for JEDEC-compliant DDR memory power delivery with BIOS-adjustable voltage offsets.
Availability
LTC3770EUH#PBF is available at Aetrix Electronics and suitable for server power supply design, ASIC core regulation, and industrial distributed power systems requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for LTC3770EUH#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global semiconductor leader specializing in high-performance analog, mixed-signal, and power management ICs - acquired Linear Technology in 2017 to strengthen its power solutions portfolio.
The LTC3770EUH#PBF belongs to ADI's high-accuracy, high-density DC/DC controller product line, designed specifically for mission-critical server, data center, and high-end computing power delivery where precision regulation, rail coordination, and thermal efficiency are non-negotiable.
FAQ
What is the minimum on-time specification for the LTC3770EUH#PBF, and why does it matter?
The LTC3770EUH#PBF has a guaranteed minimum on-time of ≤100ns. This enables stable operation at very high input-to-output voltage ratios - for example, stepping 24V down to 0.6V at 500kHz - without pulse-skipping or loss of regulation. In server applications where 12V or 48V intermediate buses feed sub-1V ASIC cores, this spec ensures consistent current-mode control and predictable transient response across the full input range.
Can the LTC3770EUH#PBF operate without an external current sense resistor?
Yes, the LTC3770EUH#PBF supports no-RSENSE operation by using the bottom MOSFET's RDS(ON) as the current sensing element. Connect SENSE+ to the SW node and SENSE– to PGND. This configuration eliminates sense resistor power loss and improves full-load efficiency - especially valuable in high-current, low-VOUT applications like DDR memory supplies. The VRNG pin adjusts sense threshold scaling to accommodate MOSFET temperature drift.
How does the LTC3770EUH#PBF implement output voltage margining, and what are the supported ranges?
The LTC3770EUH#PBF implements margining via three pins: MARGIN0, MARGIN1 (logic inputs), and MPGM (current-setting resistor). These configure high/low/no-margin states and set offset magnitude. With typical resistor values, it achieves ±1% to ±5% margin around the nominal VOUT - used during production test to verify regulation window and in BIOS-controlled systems for adaptive voltage scaling. The 0.6V reference accuracy (±0.67%) ensures margining remains precise across temperature and line variations.
What is the role of the PLLIN and PLLFLTR pins on the LTC3770EUH#PBF?
The PLLIN pin accepts an external clock signal (50kHz–1MHz) to synchronize the LTC3770EUH#PBF's switching frequency, while PLLFLTR hosts the low-pass filter capacitor for the internal phase detector. This PLL synchronization eliminates beat frequencies in multi-controller systems, reduces EMI peaks, and enables deterministic timing for coordinated multi-phase operation - essential in high-density server VRMs where noise coupling between rails must be minimized.
Does the LTC3770EUH#PBF support power supply sequencing, and how is it implemented?
Yes, the LTC3770EUH#PBF supports precise power supply sequencing via its TRACK/SS pin. When configured as a master, an external capacitor on TRACK/SS sets soft-start ramp rate; when configured as a slave, the master's VFB is fed into TRACK/SS through a resistor divider to replicate its ramp. This enables monotonic, JEDEC-compliant startup sequences - for example, ramping DDR VDDQ before VDD - without external timers or microcontrollers. The internal 1.4μA soft-start current ensures repeatable timing across units.
LTC3770EUH#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 32-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Number of Outputs:
- 1
- Output Phases:
- 1
- Voltage - Supply (Vcc/Vdd):
- 4V ~ 32V
- Frequency - Switching:
- -
- Duty Cycle (Max):
- 90%
- Synchronous Rectifier:
- Yes
- Clock Sync:
- No
- Serial Interfaces:
- -
- Control Features:
- Current Limit, Enable, On Time Control, Power Good, Soft Start, Tracking
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-QFN (5x5)
LTC3770EUH#PBF FAQ
1.How can I place an order for LTC3770EUH#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3770EUH#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3770EUH#PBF reliable?
The price and inventory of LTC3770EUH#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3770EUH#PBF is usually 5 days.
3.What payment methods are accepted for LTC3770EUH#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3770EUH#PBF transactions.
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4.How is shipping managed for LTC3770EUH#PBF?
LTC3770EUH#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3770EUH#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3770EUH#PBF?
For technical support, including LTC3770EUH#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3770EUH#PBF requirements.
6.How does Aetrix verify that LTC3770EUH#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3770EUH#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3770EUH#PBF meets industry standards.
7.What is the process for return or replacement of LTC3770EUH#PBF?
All LTC3770EUH#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3770EUH#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3770EUH#PBF part is unused and in its original packaging.
Return procedure for LTC3770EUH#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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