Analog Devices Inc. LTC3773EG#TRPBF
- Part No.:
- LTC3773EG#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 36-SSOP (0.209", 5.30mm Width)
- Datasheet:
-
LTC3773EG#TRPBF.pdf
- Description:
- IC REG CTRLR BUCK 36SSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC3773EG#TRPBF from Analog Devices (formerly Linear Technology) is a high-performance, 3-phase, triple-output synchronous step-down DC/DC controller with programmable up/down voltage tracking. It delivers precise 0.6V reference accuracy (±1%), supports 3.3V–36V input, drives external N-channel MOSFETs per phase, and enables 120° phase interleaving up to 700kHz per phase for low-RMS-input-current power supplies in telecom and server applications.
For engineers reviewing the LTC3773EG#TRPBF datasheet, LTC3773EG#TRPBF pinout, LTC3773EG#TRPBF application, or LTC3773EG#TRPBF equivalent, key selection criteria include its triple-channel current-mode control architecture, OPTI-LOOP® compensation, selectable Burst Mode®/discontinuous/continuous light-load operation, and support for sequential/coincident/ratiometric output tracking across FPGA, DSP, and multi-rail industrial systems.
Technical Context
The LTC3773EG#TRPBF implements a constant-frequency, current-mode control loop per channel, using an internal 0.6V reference and transconductance error amplifier (gm = 2.3–3.2 mmho, GBW = 3 MHz) to regulate output via ITH pin voltage control. Each phase features independent SENSE+/- current sensing with 60–90 mV threshold range and foldback protection under overload.
It integrates three synchronized gate drivers (TG/BG) with matched on-resistances (TG RUP = 2.2 Ω, BG RDOWN = 0.9 Ω), programmable phase alignment (120° or 90°/270° via PHASEMD), and PLL-synchronizable oscillator (160–700 kHz). Tracking is implemented via dedicated TRACK1/2/3 pins with 1 µA pull-up and soft-start capacitor interface.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Range | 3.3V to 36V - supports wide-input industrial, telecom, and server rails without pre-regulation. |
| Feedback Accuracy | ±1% at 0.6V over –40°C to 85°C - ensures tight output regulation across temperature for multi-rail sequencing. |
| Switching Frequency | 160 kHz to 700 kHz - adjustable via PLLFLTR or external sync; enables optimization of size vs. efficiency. |
| Current Sense Threshold | 60–90 mV - sets overcurrent limit with external sense resistor; supports accurate load-step response and foldback. |
| Phase Separation | 120° (default) or 90°/270° - reduces input capacitor RMS current by >50% versus single-phase designs. |
| Light-Load Modes | Selectable Burst Mode®, discontinuous, or forced continuous - balances efficiency (Burst Mode®), ripple (continuous), and stability (discontinuous). |
| Tracking Capability | Programmable up/down tracking (sequential, coincident, ratiometric) - enables controlled power-up/down of FPGA core/I/O or DSP supply rails. |
Pinout & Package
The LTC3773EG#TRPBF is packaged in a 36-lead plastic SSOP (5mm × 7mm footprint, 1.0mm max height) with exposed thermal pad connected internally to PGND. Pin functions are electrically identical between SSOP (G) and QFN (UHF) packages, though pin numbering differs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SDB1/SDB2/SDB3 | Channel shutdown enable (active-low) | Independent power-up thresholds (1.2V/1.8V/2.4V) allow staggered rail activation; <0.4V forces <30µA shutdown. |
| TRACK1/2/3 | Tracking reference input | Accepts external ramp or divider voltage to coordinate VOUT1–VOUT3 startup/shutdown; disables foldback if <0.54V during fault. |
| SENSE1+/– to SENSE3+/– | Differential current sense inputs | Measure voltage across external sense resistors; set per-channel current limit with 60–90 mV threshold range. |
| TG1–TG3 / BG1–BG3 | Top/bottom gate drive outputs | Drive external N-MOSFET gates with matched RON (TG: 2.2Ω up / 1.8Ω down; BG: 2.4Ω up / 0.9Ω down). |
| VFB1–VFB3 | Feedback input (0.6V reference) | Connects to resistor dividers for 0.6V–5V output regulation; ±1% accuracy ensures stable multi-rail tolerance stacking. |
| PLLIN/FC | Sync input / mode select | Float = discontinuous mode; <1V = Burst Mode®; >3V = forced continuous - enables dynamic efficiency optimization. |
| PGOOD | Open-drain power-good indicator | Asserts low if any VOUT deviates >±10% for >100µs; supports system-level sequencing and fault reporting. |
Key Features
| Feature | Design Value |
|---|---|
| OPTI-LOOP® Compensation | Minimizes required output capacitance by optimizing phase margin across load and line variations - reduces BOM cost and board area. |
| Programmable Phase Operation | 120° default or 90°/270° via PHASEMD pin - enables flexible interleaving to match system EMI requirements or existing clock domains. |
| Triple Output Tracking | Supports sequential, coincident, or ratiometric startup/shutdown - eliminates sequencing ICs in FPGA/DSP power trees. |
| Current Foldback Protection | Reduces MOSFET stress during short-circuit by lowering peak current limit - improves reliability in high-power server modules. |
| Wide Input Voltage Range | 3.3V–36V operation with integrated VCC UVLO (3.7V–4.4V) - simplifies front-end design for 5V, 12V, 24V, and 28V industrial/telecom inputs. |
Applications
| FPGA Core & I/O Power | DSP Multi-Rail Sequencing |
|---|---|
|
Use Scenario: Powering Xilinx or Intel FPGAs requiring separate 0.85V core, 1.2V auxiliary, and 1.8V I/O rails with strict power-up order. IC Role / Device Role / Timing Role: Triple-output controller managing all three rails with ratiometric tracking and independent SDB enable timing. Use Value: Eliminates discrete sequencers and reduces component count while ensuring <100µs tracking accuracy and ±1% output regulation. |
Use Scenario: Supplying TI C6000 or ADI SHARC DSPs with 1.2V core, 3.3V interface, and 1.8V memory rails requiring coincident startup. IC Role / Device Role / Timing Role: Centralized 3-phase controller coordinating all rails via shared TRACK signals and synchronized PWM phases. Use Value: Achieves <±2% inter-rail tracking deviation during power-up and maintains <5mV load regulation at full 15A/channel. |
| Telecom Line Card Power | Industrial Server VRM |
|
Use Scenario: Generating 3.3V, 5V, and 12V rails from 48V backplane in compact line cards with strict thermal limits. IC Role / Device Role / Timing Role: High-efficiency 3-phase controller operating at 560kHz with 120° interleaving to minimize input cap RMS current. Use Value: Reduces input capacitor heating by 60% versus single-phase, enabling smaller 1210-case ceramics and extending lifetime. |
Use Scenario: Delivering 2.5V/15A, 1.8V/15A, and 1.2V/15A to CPU/GPU subsystems in 1U rack servers with airflow constraints. IC Role / Device Role / Timing Role: Triple-channel controller with Burst Mode® operation maintaining >85% efficiency at 100mA load per rail. Use Value: Cuts standby power by 4× versus forced continuous mode while preserving fast transient response (<10µs recovery). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple-output synchronous buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP8770GL-DS | Single-chip 3-phase controller with integrated MOSFETs (60V max VIN); no TRACK pins; fixed 600kHz frequency. | Targeted at space-constrained, lower-power (<10A/rail) applications where layout simplicity outweighs tracking flexibility. | Select MP8770GL-DS when board area is critical and external MOSFETs are unnecessary; avoid when programmable tracking or >10A/rail is required. |
| LTC3873EG#TRPBF | Legacy dual-output version (no TRACK3, no SDB3, no CLKOUT); same 36-lead SSOP package and pinout compatibility for CH1/CH2. | Used in legacy 2-rail systems where third output is omitted or implemented separately; lacks 3-phase synchronization capability. | Select LTC3873EG#TRPBF only for drop-in replacement in existing dual-rail designs; not suitable for new triple-rail deployments. |
Compared with MP8770GL-DS and LTC3873EG#TRPBF, the LTC3773EG#TRPBF uniquely supports full triple-rail tracking, 36V input, and external MOSFET scalability to 15A+ per rail - making it optimal for high-density, high-reliability telecom and server power systems requiring precise sequencing and thermal headroom.
Availability
LTC3773EG#TRPBF is available at Aetrix Electronics and suitable for telecom infrastructure, server power supplies, and industrial FPGA power management requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for LTC3773EG#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full product support, documentation, and manufacturing continuity for the LTC portfolio.
The LTC3773EG#TRPBF belongs to Linear's high-performance power controller family, designed specifically for multi-phase, multi-rail DC/DC conversion in demanding computing, networking, and industrial applications where precision, efficiency, and sequencing integrity are critical.
FAQ
What is the maximum switching frequency supported by the LTC3773EG#TRPBF?
The LTC3773EG#TRPBF supports a nominal switching frequency range of 160 kHz to 700 kHz per phase. When configured with PLLFLTR floating, typical operation is 400 kHz; pulling PLLFLTR to 0V yields ~220 kHz, and to 5V yields ~560 kHz. The absolute maximum is 700 kHz, verified across temperature and load conditions per the datasheet's fPLLHIGH specification.
Does the LTC3773EG#TRPBF support phase synchronization with external clocks?
Yes, the LTC3773EG#TRPBF supports external synchronization via the PLLIN/FC pin. When driven with a clean square wave between 160 kHz and 700 kHz, the internal oscillator locks to the external source with <1° phase jitter. This enables coherent multi-controller operation in large-scale power systems, and the CLKOUT pin (UHF package only) can distribute the synchronized clock to other controllers.
How does the LTC3773EG#TRPBF implement output voltage tracking during power-up?
The LTC3773EG#TRPBF uses dedicated TRACK1/2/3 pins to implement programmable tracking. During startup, the error amplifier compares VFB to the rising voltage on the TRACK pin instead of the 0.6V reference. An external capacitor on TRACK1 creates a linear ramp; connecting TRACK2/TRACK3 to resistive dividers from VOUT1 enables ratiometric or coincident tracking of VOUT2/VOUT3 - all coordinated within a single IC without external circuitry.
What protection features are integrated into the LTC3773EG#TRPBF?
The LTC3773EG#TRPBF integrates output overvoltage protection (OVP), input undervoltage lockout (UVLO), cycle-by-cycle current limiting, and thermal foldback. Each channel independently monitors SENSE+/- voltage; exceeding the 60–90 mV threshold triggers immediate current foldback. PGOOD asserts low if any output deviates >±10% for >100 µs, and VCC UVLO (3.7V–4.4V hysteresis) prevents erratic operation during brownout.
Can the LTC3773EG#TRPBF operate with only one or two outputs enabled?
Yes, the LTC3773EG#TRPBF supports independent channel enable/disable via SDB1/SDB2/SDB3 pins. In the SSOP package (LTC3773EG#TRPBF), SDB1–SDB3 are shorted to a single SDB pin, so all channels start together. However, each channel's feedback (VFBn), current sense (SENSEn±), and gate drive (TGn/BGn) remain fully functional - allowing partial use (e.g., CH1 only) with no derating or performance penalty.
LTC3773EG#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 36-SSOP (0.209", 5.30mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Number of Outputs:
- 3
- Output Phases:
- 3
- Voltage - Supply (Vcc/Vdd):
- 3.3V ~ 36V
- Frequency - Switching:
- 220kHz ~ 560kHz
- Duty Cycle (Max):
- 98.5%
- Synchronous Rectifier:
- Yes
- Clock Sync:
- No
- Serial Interfaces:
- -
- Control Features:
- Enable, Power Good, Tracking
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 36-SSOP
LTC3773EG#TRPBF FAQ
1.How can I place an order for LTC3773EG#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3773EG#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3773EG#TRPBF reliable?
The price and inventory of LTC3773EG#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3773EG#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC3773EG#TRPBF?
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4.How is shipping managed for LTC3773EG#TRPBF?
LTC3773EG#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3773EG#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3773EG#TRPBF?
For technical support, including LTC3773EG#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3773EG#TRPBF requirements.
6.How does Aetrix verify that LTC3773EG#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC3773EG#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3773EG#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC3773EG#TRPBF?
All LTC3773EG#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3773EG#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3773EG#TRPBF part is unused and in its original packaging.
Return procedure for LTC3773EG#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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