Analog Devices Inc. LTC3823EUH#PBF

Overview

LTC3823EUH#PBF from Analog Devices (formerly Linear Technology) is a synchronous step-down DC/DC controller with true remote differential output sensing, output voltage tracking, and PLL-based external clock synchronization. It operates from 4.5V to 36V input, delivers 0.6V to ≤3.3V output (with remote sense), supports ≤90% duty cycle at 200kHz, features <100ns minimum on-time, and is used in high-accuracy server and ASIC power supplies.

For engineers reviewing the LTC3823EUH#PBF datasheet, LTC3823EUH#PBF pinout, LTC3823EUH#PBF application, or LTC3823EUH#PBF equivalent, key selection criteria include its valley current mode control architecture, programmable current limit via VRNG/ITH, differential remote sensing accuracy (±0.35% gain error), and QFN-32 package thermal performance (θJA = 34°C/W).

Technical Context

The LTC3823EUH#PBF implements constant on-time, valley current mode control without requiring an external sense resistor-current sensing uses either MOSFET R_DS(ON) or optional sense resistor. Its internal phase-locked loop enables precise synchronization to external clocks up to 1MHz, while the differential remote sensing amplifier (ADA = 0.9965–1.0035 V/V, VOS = 2mV) maintains regulation accuracy under PCB trace IR drop.

Control is implemented via ITH voltage (0–2.4V) setting current comparator threshold, VON pin enabling V_OUT-proportional on-time, and VRNG pin scaling maximum sense threshold from 50mV to 200mV. Fault protection includes overvoltage lockout (±11% VFB window), undervoltage lockout (VIN UVLO+ = 3.9V), and foldback current limiting disabled at startup.

Key Specifications

Pinout & Package

Package: 32-lead (5mm × 5mm) plastic QFN with exposed SGND pad (Pin 33), rated for –40°C to +85°C operation. Thermal performance requires soldering the exposed pad to PCB ground plane.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous step-down controller applications.

Compared with LTC3855EUFD#PBF and MP2918GL-Z, the LTC3823EUH#PBF uniquely balances precision remote sensing, PLL synchronization, and No-RSENSE flexibility-making it optimal for high-reliability, multi-rail server and ASIC power where regulation accuracy and EMI control are non-negotiable.

Availability

LTC3823EUH#PBF is available at Aetrix Electronics and suitable for server power supplies, ASIC core voltage regulation, and DDR memory VDDQ generation requiring stable component supply, long-term lifecycle support, and guaranteed RoHS-compliant sourcing.

Supply support for LTC3823EUH#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices acquired Linear Technology in 2017 and maintains full product support, documentation, and manufacturing continuity for the LTC portfolio.

The LTC3823EUH#PBF belongs to Linear's high-performance power controller family, designed specifically for demanding digital power applications in servers, networking equipment, and high-end computing where accuracy, efficiency, and reliability are critical.

FAQ

What is the minimum on-time specification for the LTC3823EUH#PBF, and why does it matter?

The LTC3823EUH#PBF has a minimum on-time of 50ns (typical) to 100ns (max) under specified conditions. This spec is critical for high-step-down applications-for example, converting 24V input to 1.2V output at 500kHz requires a 10% duty cycle, corresponding to 200ns period and only 20ns on-time. The LTC3823EUH#PBF's sub-100ns capability ensures stable operation without pulse-skipping or mode transitions, preserving regulation accuracy and transient response in such scenarios.

How does the LTC3823EUH#PBF implement remote differential sensing, and what is its accuracy?

The LTC3823EUH#PBF uses dedicated VOUTSENSE+ and VOUTSENSE– pins feeding an internal differential amplifier with gain accuracy of 0.9965–1.0035 V/V and input offset voltage of 2mV. Its output (VDIFFOUT) connects directly to VFB, closing the regulation loop at the load. This achieves ±0.67% total output accuracy-including reference, amplifier, and PCB layout effects-enabling stable 0.6V–3.3V regulation even with >100mΩ interconnect resistance between IC and load.

Can the LTC3823EUH#PBF operate without an external current sense resistor?

Yes, the LTC3823EUH#PBF supports No-RSENSE operation by using the bottom N-channel MOSFET's R_DS(ON) as the current sensing element. Connect SENSE+ to the SW node and SENSE– to PGND. This eliminates sense resistor losses and board space but requires careful MOSFET selection-R_DS(ON) must be tightly characterized over temperature, as the controller scales current limit based on VRNG and ITH settings assuming known resistance.

What is the role of the PLLIN and PLLFLTR pins on the LTC3823EUH#PBF?

The PLLIN pin accepts an external clock signal (up to 1MHz) for phase-locking the LTC3823EUH#PBF's switching frequency, while PLLFLTR provides the low-pass filter node for the internal phase detector. Together, they enable deterministic edge alignment across multiple power rails-critical for EMI reduction in dense PCB layouts and for synchronizing with system clocks in telecom or datacenter applications. When unused, PLLIN is internally terminated to SGND and PLLFLTR floats at 1.180V.

How does the TRACK/SS pin function in both tracking and soft-start modes for the LTC3823EUH#PBF?

The TRACK/SS pin serves dual roles: during soft-start, an internal 1.7μA current charges an external capacitor to ramp VOUT linearly; during tracking, it accepts a scaled VFB voltage from a master controller to force identical VOUT ramp profiles. In either mode, the pin's voltage directly controls the ITH reference, ensuring coordinated startup and shutdown across multiple rails-essential for FPGA, CPU, and memory subsystems requiring strict power sequencing.