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Analog Devices Inc. LTC3828EG#TRPBF

Part No.:
LTC3828EG#TRPBF
Manufacturer:
Analog Devices Inc.
Category:
DC DC Switching Controllers
Package:
28-SSOP (0.209", 5.30mm Width)
Datasheet:
AetrixLTC3828EG#TRPBF.pdf
Description:
IC REG CTRLR BUCK 28SSOP
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:4,093

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Product details

Overview

LTC3828EG#TRPBF from Analog Devices (formerly Linear Technology) is a dual, 180° phase-shifted, synchronous step-down controller driving two independent N-channel MOSFET stages for high-efficiency DC/DC conversion. It delivers ±1% output voltage accuracy, supports 4.5V–28V input, regulates dual outputs down to 0.8V with tracking capability, and operates at phase-lockable frequencies from 260kHz to 550kHz - used in telecom infrastructure power supplies requiring tight voltage coordination between ASIC core and I/O rails.

For engineers reviewing the LTC3828EG#TRPBF datasheet, LTC3828EG#TRPBF pinout, LTC3828EG#TRPBF application, or LTC3828EG#TRPBF equivalent, key selection criteria include dual-phase interleaving for reduced input ripple, OPTI-LOOP® compensation for wide capacitor/ESR tolerance, TRCKSS pin-based soft-start & ratiometric tracking, and FCB/PLLIN-selectable light-load modes (Burst Mode®, skip-cycle, forced continuous).

Technical Context

The LTC3828EG#TRPBF implements constant-frequency current-mode control with independent error amplifiers (ITH1/ITH2), dual 0.8V references, and precision current sensing via SENSE+/- differential inputs. Its phase-locked loop accepts external clocks on FCB/PLLIN and generates CLKOUT for daisy-chaining up to 6-phase systems.

It integrates dual 5V LDOs (INTVCC), supports dropout operation up to 99% duty cycle, provides output overvoltage protection (±7.5% trip), and disables reverse current and foldback limiting during soft-start. The G-package variant uses 28-lead SSOP with separate SGND and PGND pins for noise isolation.

Key Specifications

Parameter Value and Actual Design Meaning
Input Voltage Range 4.5V to 28V (30V absolute max); supports 12V/24V industrial and telecom battery inputs.
Output Voltage Accuracy ±1% over line/load/temperature; enables stable core/I/O rail regulation without post-regulation.
Switching Frequency Range 260kHz to 550kHz (phase-lockable); allows EMI optimization and inductor size reduction.
Phase Configuration Fixed 180° interleaving; cuts RMS input current by ~30% vs. single-phase, reducing input cap size and losses.
Feedback Reference 0.8V ±1%, trimmed; permits low-VOUT designs (e.g., 0.8V FPGA cores) with minimal divider error impact.
Soft-Start Current 1.2μA typical (TRCKSS pins); sets precise ramp rate for controlled voltage sequencing in multi-rail systems.
Power Good Threshold ±7.5% window on VOSENSE; ensures reliable system enable only when both outputs meet spec.

Pinout & Package

Package: 28-lead plastic SSOP (G package), RoHS-compliant, –40°C to +85°C operating range. Exposed pad not present (unlike QFN UH variant). Requires separate SGND and PGND routing per layout guidelines.

Pin Circuit Role Design Meaning
TG1/TG2 Top gate drivers Drive N-MOSFET gates with floating 5V swing; require bootstrap capacitors tied to BOOSTx/SWx.
BG1/BG2 Bottom gate drivers Sink/source 5V gate drive referenced to PGND; enable synchronous rectification with zero reverse recovery loss.
SENSE1+/–, SENSE2+/– Differential current sense inputs Measure inductor current via external RSENSE; reject common-mode noise up to (1.1)×INTVCC.
VOSENSE1/VOSENSE2 Remote feedback inputs Accept resistor-divider output voltage; enable Kelvin sensing for <1% load regulation error.
TRCKSS1/TRCKSS2 Tracking & soft-start control Internal 1.2μA current source charges external caps; master/slave configuration enables ratiometric or coincident startup.
FCB/PLLIN Mode select & sync input Selects Burst Mode® (0.85–4.3V), forced continuous (<0.75V), or constant frequency (>4.8V); accepts external clock for PLL lock.
CLKOUT Phase-synchronized clock output 90° out-of-phase with CH1 in SSOP; drives additional controllers for 3-/4-/6-phase expansion without external timing IC.
RUN1/RUN2 Independent channel enable Logic-controlled shutdown (ON >2.0V, OFF <1.0V); allows staggered startup or dynamic rail disable.

Key Features

Feature Design Value
OPTI-LOOP® compensation Minimizes required output capacitance by adapting loop gain to actual COUT and ESR - eliminates trial-and-error tuning across 10μF–1000μF ceramic/polymer banks.
Dual-phase interleaving Reduces input capacitor RMS current by ≥30% and peak-to-peak ripple voltage - enables smaller, lower-ESR input caps and cuts EMI filter cost.
Tracking with soft-start Enables precise sequencing of multiple rails (e.g., 3.3V → 2.5V → 1.8V) using resistor dividers and shared TRCKSS current source - no external sequencer needed.
Foldback current limiting Activates below 70% nominal VOUT to limit short-circuit power dissipation - protects MOSFETs while maintaining safe fault current (~1/3 rated output).
99% maximum duty cycle Supports ultra-low dropout operation (e.g., 5V→4.95V at 10A); critical for high-VIN, low-VOUT applications like intermediate bus converters.

Applications

Telecom Base Station Power ASIC Core & I/O Supply

Use Scenario: Dual-rail power for FPGA-based baseband processing units requiring synchronized 1.2V core and 2.5V I/O with strict sequencing.

IC Role / Device Role / Timing Role: Dual-phase controller providing interleaved switching, output tracking, and independent RUN pin control for staged power-up.

Use Value: Eliminates need for discrete sequencers; reduces input capacitor count by 40% and improves transient response via OPTI-LOOP® adaptive compensation.

Use Scenario: High-current, low-noise supply for mixed-signal ASICs in test equipment where rail interaction must be minimized.

IC Role / Device Role / Timing Role: Dual-channel synchronous buck controller with independent current sensing and PGOOD monitoring per rail.

Use Value: ±1% accuracy and ±7.5% PGOOD window ensure reliable logic state initialization; 180° phasing suppresses conducted EMI coupling into analog sections.

Industrial PLC CPU Module Automotive Infotainment SoC

Use Scenario: 24V input conversion to isolated 5V/3.3V rails powering ARM Cortex-A series CPUs and real-time Ethernet PHYs.

IC Role / Device Role / Timing Role: Primary DC/DC controller managing input filtering, thermal derating, and brownout-safe shutdown via UVLO and RUN pin control.

Use Value: 4.5V–28V input range accommodates wide automotive/industrial transients; FCB/PLLIN pin enables noise-sensitive constant-frequency mode during CAN bus activity.

Use Scenario: Power management for infotainment SoCs requiring coordinated 1.1V GPU, 1.8V memory, and 3.3V peripheral rails with thermal throttling support.

IC Role / Device Role / Timing Role: Dual-phase controller with TRCKSS-based tracking and foldback limiting for fault containment during hot-plug events.

Use Value: Internal 1.2μA soft-start current enables predictable ramp times across temperature; 99% duty cycle sustains operation during cold-crank (6.5V battery).

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-phase synchronous buck controller applications.

Alternative Part Technical Difference Application Difference Selection Advice
LTC3829EG#TRPBF Includes integrated MOSFET drivers with higher peak current (4A vs. 3A), enhanced current sense accuracy (±0.5% vs. ±1%), and extended temp range (–40°C to 125°C). Targeted at higher-power, thermally constrained designs (e.g., server VRMs); lacks TRCKSS pin - requires external tracking circuitry. Choose LTC3829EG#TRPBF when higher gate drive strength, tighter current sensing, or extended temperature operation is required - not a drop-in replacement due to missing TRCKSS functionality.
MP8765GL-Z Single-channel, 2-phase capable controller (requires external phase-splitting logic); lower max frequency (1MHz), no PLL sync, no tracking support, and 0.6V reference. Cost-optimized for simpler dual-output systems without sequencing requirements; limited to 16V max input. Choose MP8765GL-Z only for non-tracking, single-rail-focused applications with ≤16V input and no need for daisy-chain expansion - lacks key LTC3828EG#TRPBF features including TRCKSS, CLKOUT, and dual independent RUN control.

Compared with LTC3829EG#TRPBF and MP8765GL-Z, the LTC3828EG#TRPBF uniquely combines dual independent tracking, phase-locked daisy-chaining, and 4.5V–28V operation in a single SSOP package - making it optimal for telecom and industrial systems requiring coordinated multi-rail startup and robust input transient handling.

Availability

LTC3828EG#TRPBF is available at Aetrix Electronics and suitable for telecom infrastructure, ASIC power supply, and industrial equipment applications requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.

Supply support for LTC3828EG#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices acquired Linear Technology in 2017 and maintains full product support, datasheet documentation, and application engineering resources for all Linear-branded power management ICs.

The LTC3828EG#TRPBF belongs to Linear's high-performance dual-phase controller product line, designed specifically for applications demanding precise voltage tracking, low-noise operation, and scalable multi-phase power architecture in space-constrained environments.

FAQ

What is the function of the TRCKSS pins on the LTC3828EG#TRPBF?

The TRCKSS1 and TRCKSS2 pins on the LTC3828EG#TRPBF provide combined soft-start ramping and output voltage tracking functionality. An internal 1.2μA current source charges external capacitors connected to these pins, setting the voltage ramp rate. When configured in master-slave mode, the slave channel replicates the master's VOSENSE voltage via a resistor divider applied to its TRCKSS pin - enabling precise ratiometric or coincident startup of multiple rails without external circuitry. This is integral to the LTC3828EG#TRPBF's role in multi-rail power sequencing.

Does the LTC3828EG#TRPBF support external frequency synchronization?

Yes, the LTC3828EG#TRPBF supports external frequency synchronization via the FCB/PLLIN pin. When an external clock signal is applied, the internal phase-locked loop locks channel 1 to the rising edge of that signal, and channel 2 follows with fixed phase offset. The PLLFLTR pin provides the loop filter connection, and the oscillator frequency can be tuned from 260kHz to 550kHz using a DC voltage (0V–2.4V) on PLLFLTR. This capability is documented in the LTC3828EG#TRPBF datasheet Figure 1 and Table 1.

What is the purpose of the PGOOD pin on the LTC3828EG#TRPBF?

The PGOOD pin on the LTC3828EG#TRPBF is an open-drain logic output that indicates valid regulation status for either channel. It pulls low when the voltage on VOSENSE1 or VOSENSE2 deviates by more than ±7.5% from the 0.8V reference - signaling undervoltage or overvoltage fault conditions. The pin releases (high-impedance) within 10μs once both enabled channels meet regulation. If either RUN pin is pulled low, that channel's output is ignored by PGOOD - ensuring accurate system enable only when active rails are in spec. This behavior is specified in the LTC3828EG#TRPBF Electrical Characteristics table.

How does the LTC3828EG#TRPBF handle short-circuit conditions?

The LTC3828EG#TRPBF handles short-circuit conditions using foldback current limiting, which activates when output voltage falls below 70% of nominal. Under short-circuit, the controller reduces peak inductor current to a safe level - limiting MOSFET power dissipation while maintaining regulation attempt. Reverse current and foldback functions are disabled during soft-start to prevent false triggering. The LTC3828EG#TRPBF also includes output overvoltage protection (±7.5% trip) and undervoltage lockout (3.5V–4.0V) for comprehensive fault coverage.

Can the LTC3828EG#TRPBF operate with only one channel enabled?

Yes, the LTC3828EG#TRPBF supports independent channel operation via RUN1 and RUN2 pins. Driving RUN1 low disables channel 1 (including TG1, BG1, and associated sensing), while RUN2 controls channel 2 identically. Both channels can be active, one active/one disabled, or both disabled - with INTVCC regulator remaining functional if at least one RUN pin is high. This flexibility enables dynamic rail management in systems like FPGA-based accelerators where I/O and core rails may power up/down independently - a confirmed capability of the LTC3828EG#TRPBF per its Absolute Maximum Ratings and Operation section.

LTC3828EG#TRPBF Specifications

Product attributes
Attribute value
Manufacturer:
Analog Devices Inc.
Series:
PolyPhase®
Package/Case:
28-SSOP (0.209", 5.30mm Width)
Packaging:
Tape & Reel (TR)
Product Status:
Active
Output Type:
Transistor Driver
Function:
Step-Down
Output Configuration:
Positive
Topology:
Buck
Number of Outputs:
2
Output Phases:
2
Voltage - Supply (Vcc/Vdd):
4.5V ~ 28V
Frequency - Switching:
260kHz ~ 550kHz
Duty Cycle (Max):
99.4%
Synchronous Rectifier:
Yes
Clock Sync:
No
Serial Interfaces:
-
Control Features:
Enable, Phase Control, Power Good, Tracking
Operating Temperature:
-40°C ~ 85°C (TA)
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
28-SSOP

LTC3828EG#TRPBF FAQ

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Please submit a Request for Quotation (RFQ) for LTC3828EG#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

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The price and inventory of LTC3828EG#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3828EG#TRPBF is usually 5 days.

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5.How can I obtain technical support or documentation for LTC3828EG#TRPBF?

For technical support, including LTC3828EG#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3828EG#TRPBF requirements.

6.How does Aetrix verify that LTC3828EG#TRPBF is sourced from the original manufacturer or authorized distributors?

All LTC3828EG#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3828EG#TRPBF meets industry standards.

7.What is the process for return or replacement of LTC3828EG#TRPBF?

All LTC3828EG#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3828EG#TRPBF, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The LTC3828EG#TRPBF part is unused and in its original packaging.

Return procedure for LTC3828EG#TRPBF:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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