Analog Devices Inc. LTC3829IUHF#PBF
- Part No.:
- LTC3829IUHF#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 38-WFQFN Exposed Pad
- Datasheet:
-
LTC3829IUHF#PBF.pdf
- Description:
- IC REG CTRLR BUCK 38QFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,505
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Product details
Overview
LTC3829IUHF#PBF from Analog Devices is a high-performance 3-phase, single-output synchronous step-down DC/DC controller driving triple N-channel MOSFET stages. It features phase-lockable fixed-frequency operation (250–770 kHz), true remote sensing via integrated differential amplifier, ±0.75% 0.6 V reference accuracy, and programmable DCR temperature compensation. It delivers up to 95% efficiency in telecom power distribution systems with 12 V input and 1.5 V/50 A output.
For engineers reviewing the LTC3829IUHF#PBF datasheet, LTC3829IUHF#PBF pinout, LTC3829IUHF#PBF application, or LTC3829IUHF#PBF equivalent, key selection criteria include its 38-pin 5 mm × 7 mm QFN package with exposed PGND/SGND pad, 4.5 V to 38 V wide input range, 0.6 V to 3.3 V diffamp-enabled output range, and support for stage shedding, burst mode, or forced continuous operation under light load conditions.
Technical Context
The LTC3829IUHF#PBF implements a constant-frequency current-mode control architecture with three independent PWM channels synchronized in 120° phase offset to minimize input capacitor RMS current and EMI. Each channel uses dedicated SENSE+ and SENSE− inputs for RSENSE or DCR-based current sensing, with ITH voltage setting peak inductor current per phase.
Its integrated differential amplifier (DIFFP/DIFFN → DIFFOUT) enables true point-of-load remote sensing with 0.997–1.003 V/V gain and 2.5 mV input offset, while the AVP pin supports active voltage positioning when used with the diffamp. The device supports 6-phase expansion via CLKIN/CLKOUT and includes nonlinear fast-transient response via IFAST pin.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5 V to 38 V - supports wide-range industrial and telecom inputs without external pre-regulation |
| Output Voltage Range (with diffamp) | 0.6 V to 3.3 V - enables precise low-voltage CPU/GPU core rail regulation with remote sense compensation |
| Reference Accuracy | ±0.75% at 0.6 V - ensures tight output regulation across –40°C to 125°C junction temperature range |
| Switching Frequency Range | 250 kHz to 770 kHz - adjustable via FREQ pin current; phase-lockable for multi-controller synchronization |
| Max Duty Cycle | 94% - maintains regulation during high-input-to-low-output conversion (e.g., 12 V → 1.2 V) |
| Efficiency | Up to 95% - achieved via low-RDS(ON) gate drivers (TG RUP = 2.6 Ω, BG RDOWN = 1.1 Ω) and out-of-phase 3-phase operation |
| Package | 38-pin 5 mm × 7 mm QFN with exposed thermal pad - rated for –40°C to 125°C operation; SGND/PGND pad must be soldered to PCB |
Pinout & Package
Package: 38-lead (5 mm × 7 mm) plastic QFN with exposed SGND/PGND pad (Pin 39), RoHS-compliant, lead-free finish. Thermal resistance θJA = 34°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| BOOST1–BOOST3 | Floating bootstrap supply for top gate drivers | Connects to (+) terminal of bootstrap capacitors; swings from diode drop below INTVCC to VIN + INTVCC |
| TG1–TG3 | Top N-MOSFET gate drive outputs | Drives gates of high-side switches; floating outputs referenced to SWx nodes |
| BG1–BG3 | Bottom N-MOSFET gate drive outputs | Drives gates of low-side switches; referenced to PGND; 25 ns rise/fall time into 3300 pF |
| SENSE1+–SENSE3+, SENSE1––SENSE3– | Differential current sense inputs per phase | Supports RSENSE or DCR sensing; bias current ±1 µA; common-mode range up to 5.7 V |
| DIFFP / DIFFN / DIFFOUT | Remote sensing differential amplifier I/O | DIFFP connects directly to load VOUT; DIFFN to load GND; DIFFOUT feeds VFB through resistor divider |
| VFB | Error amplifier feedback input | Compares scaled remote-sense signal to 0.6 V internal reference; ±15 nA input current |
| ITH | Error amplifier output & current threshold control | Sets per-phase peak inductor current; transconductance = 2.2 mmho; used for loop compensation |
| RUN | Enable/disable control input | 1.22 V threshold with 100 mV hysteresis; internal 1.0 µA pull-up; disables all switching and INTVCC regulator when low |
| MODE | Light-load operation mode select | SGND = forced CCM; FLOAT = Burst Mode®; INTVCC = Stage Shedding™ - no external logic required |
| CLKOUT | Phase-locked clock output | 60° out-of-phase with Channel 1 in 3-phase mode; 180° out-of-phase during stage shedding |
Key Features
| Feature | Design Value |
|---|---|
| Triple N-channel synchronous drive | Enables high-efficiency, high-current buck conversion without external P-channel or driver ICs |
| Programmable DCR temperature compensation | ITEMP pin accepts NTC thermistor near inductors to dynamically adjust current sense threshold vs. coil temp |
| True remote sensing differential amplifier | 0.997–1.003 V/V gain, 2.5 mV offset, 100 dB PSRR - eliminates IR drop error in high-current POL rails |
| Active Voltage Positioning (AVP) | AVP pin sinks 250 µA or sources 2 mA to implement load-line droop for CPU VRM compliance |
| Stage Shedding™ and Burst Mode® | ISET pin programs transition thresholds; reduces light-load quiescent current to <60 µA in shutdown |
| AEC-Q100 qualified variants available | This I-grade part shares same 38-pin QFN footprint and electrical specs as automotive-qualified versions |
Applications
| Telecom DC Power Distribution | Notebook Core Voltage Regulation |
|---|---|
|
Use Scenario: 48 V intermediate bus converted to 1.2 V/50 A for baseband processor in 5G macro base station. IC Role / Device Role / Timing Role: 3-phase synchronous buck controller managing interleaved switching, phase shedding, and remote voltage sensing at load. Use Value: 95% peak efficiency and 75 A/µs transient response reduce thermal design burden and improve system power density. |
Use Scenario: Dual-phase (using two LTC3829 controllers) generating 0.85 V/30 A for mobile CPU in ultrabook platform. IC Role / Device Role / Timing Role: Primary voltage regulator with AVP, diffamp remote sense, and programmable soft-start for sequencing. Use Value: ±0.75% reference accuracy and 0.6 V feedback threshold ensure stable core voltage under dynamic load changes. |
| Industrial PLC Power Module | High-Density Server VRM |
|
Use Scenario: 24 V input converted to 3.3 V/25 A for FPGA and I/O banks in ruggedized programmable logic controller. IC Role / Device Role / Timing Role: Single-output 3-phase controller with DCR sensing, UVLO, and PGOOD signaling for system health monitoring. Use Value: Wide 4.5–38 V input range accommodates brownout conditions; PGOOD asserts after 100 µs delay with ±10% window. |
Use Scenario: 12 V input to 0.95 V/80 A GPU core rail using dual LTC3829 in 6-phase configuration with CLKIN/CLKOUT sync. IC Role / Device Role / Timing Role: Phase-synchronized controller enabling interleaving, reduced input ripple, and scalable current capacity. Use Value: 60° phase offset between channels cuts input capacitor RMS current by >50% versus single-phase design. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multiphase synchronous buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP2940AGQ-DC | 4-phase, 0.5% reference accuracy, integrated MOSFET drivers only (no external FET control); 32-pin QFN | Targeted at compact, lower-current (<30 A) applications; lacks diffamp, AVP, and DCR tempco | Choose MP2940AGQ-DC for space-constrained designs where integrated drivers suffice and remote sensing is not required. |
| ISL95836IRZ | 3-phase, Intel VR12.5/VR13 compliant, 0.5% reference, supports SVID interface; 40-pin QFN | Designed specifically for CPU VRMs with digital interface; no diffamp or AVP pin; requires PMBus host | Choose ISL95836IRZ only for Intel-compatible platforms requiring SVID communication and strict VR13 timing. |
Compared with MP2940AGQ-DC and ISL95836IRZ, the LTC3829IUHF#PBF provides superior analog flexibility-true remote sensing, programmable AVP, DCR temperature compensation, and pin-selectable light-load modes-making it optimal for custom high-current POL designs where digital interface or integration are secondary to precision analog control.
Availability
LTC3829IUHF#PBF is available at Aetrix Electronics and suitable for telecom power distribution systems, notebook core voltage regulation, and industrial PLC power modules requiring stable component supply, long-term lifecycle support, and AEC-Q100-aligned reliability.
Supply support for LTC3829IUHF#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.
The LTC3829IUHF#PBF belongs to Analog Devices' Power by Linear™ controller family, designed for high-efficiency, high-current, multi-phase DC/DC conversion in demanding infrastructure and computing applications where precision, thermal robustness, and flexible control are critical.
FAQ
What is the operating temperature range for the LTC3829IUHF#PBF?
The LTC3829IUHF#PBF is specified for operation from –40°C to 125°C junction temperature. Its I-grade qualification guarantees full electrical performance across this range, including ±0.75% reference accuracy, 250–770 kHz frequency tuning, and functional DCR temperature compensation via the ITEMP pin.
Does the LTC3829IUHF#PBF support remote voltage sensing, and how is it implemented?
Yes, the LTC3829IUHF#PBF supports true remote voltage sensing via an integrated differential amplifier. DIFFP connects directly to the load's positive terminal, DIFFN to the load's ground, and DIFFOUT feeds the VFB pin through an external resistor divider. This architecture achieves 0.997–1.003 V/V gain and 2.5 mV input offset, eliminating IR drop errors in high-current POL rails.
How does the MODE pin configure light-load operation on the LTC3829IUHF#PBF?
The MODE pin on the LTC3829IUHF#PBF selects among three light-load strategies: tie to SGND for forced continuous conduction mode, leave floating for Burst Mode® operation, or tie to INTVCC for Stage Shedding™ mode. Each mode is implemented entirely within the IC-no external logic or firmware is required-and transitions are controlled by the ITH voltage level and ISET programming.
Can the LTC3829IUHF#PBF be used in 6-phase configurations, and what pins enable that?
Yes, the LTC3829IUHF#PBF supports 6-phase operation via clock synchronization. The CLKOUT pin outputs a phase-locked signal (60° out-of-phase in 3-phase mode, 180° during shedding), and the PLLIN pin accepts an external clock to synchronize multiple LTC3829 controllers. This allows seamless scaling to 6-phase or higher topologies without additional timing ICs.
What is the purpose of the AVP pin on the LTC3829IUHF#PBF, and how is it used?
The AVP pin on the LTC3829IUHF#PBF enables Active Voltage Positioning for CPU/GPU VRM compliance. When used with the differential amplifier, AVP sinks 250 µA or sources 2 mA to create a programmable load-line droop. A resistor between AVP and DIFFP sets the slope, ensuring output voltage decreases linearly with increasing load current-critical for stability in high-performance processors.
LTC3829IUHF#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- PolyPhase®
- Package/Case:
- 38-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Number of Outputs:
- 3
- Output Phases:
- 3
- Voltage - Supply (Vcc/Vdd):
- 4.5V ~ 38V
- Frequency - Switching:
- 250kHz ~ 770kHz
- Duty Cycle (Max):
- 94%
- Synchronous Rectifier:
- Yes
- Clock Sync:
- No
- Serial Interfaces:
- -
- Control Features:
- Current Limit, Enable, Frequency Control, Power Good, Soft Start, Tracking
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 38-QFN (5x7)
LTC3829IUHF#PBF FAQ
1.How can I place an order for LTC3829IUHF#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3829IUHF#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3829IUHF#PBF reliable?
The price and inventory of LTC3829IUHF#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3829IUHF#PBF is usually 5 days.
3.What payment methods are accepted for LTC3829IUHF#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3829IUHF#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3829IUHF#PBF?
LTC3829IUHF#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3829IUHF#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3829IUHF#PBF?
For technical support, including LTC3829IUHF#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3829IUHF#PBF requirements.
6.How does Aetrix verify that LTC3829IUHF#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3829IUHF#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3829IUHF#PBF meets industry standards.
7.What is the process for return or replacement of LTC3829IUHF#PBF?
All LTC3829IUHF#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3829IUHF#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3829IUHF#PBF part is unused and in its original packaging.
Return procedure for LTC3829IUHF#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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