Analog Devices Inc. LTC3836EUFD#TRPBF
- Part No.:
- LTC3836EUFD#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 28-WFQFN Exposed Pad
- Datasheet:
-
LTC3836EUFD#TRPBF.pdf
- Description:
- IC REG CTRLR BUCK 28QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC3836EUFD#TRPBF from Analog Devices (formerly Linear Technology) is a dual-output, 2-phase synchronous step-down controller driving external N-channel MOSFETs for high-efficiency DC/DC conversion in space-constrained systems. It operates from 2.75V to 4.5V input, delivers up to 15A per output with 0.6V ±1.5% reference, supports 300kHz–750kHz adjustable switching frequency, and enables out-of-phase interleaving to reduce input RMS current and capacitor size. It is used in single Li-ion-powered devices requiring tightly regulated 1.8V/1.2V rails.
For engineers reviewing the LTC3836EUFD#TRPBF datasheet, LTC3836EUFD#TRPBF pinout, LTC3836EUFD#TRPBF application, or LTC3836EUFD#TRPBF equivalent, key selection criteria include no-RSENSE VDS current sensing, dual-output tracking capability, 97% dropout duty cycle, PLL-based external synchronization (250–850kHz), and thermal performance in the 4mm × 5mm QFN package.
Technical Context
The LTC3836EUFD#TRPBF implements constant-frequency current-mode control using MOSFET VDS sensing instead of sense resistors-eliminating power loss and noise while enabling precise peak-current limiting via IPRG1/IPRG2 pins (selecting 82mV/122mV/202mV thresholds). Its two controllers operate 180° out-of-phase to halve input capacitor RMS current versus single-phase designs.
It integrates independent soft-start (internal 1ms ramp + external RUN/SS capacitor option) and tracking start-up (via TRACK/SS2 pin with 1μA pull-up), supports pulse-skipping or forced continuous mode via SYNC/FCB pin, and includes output overvoltage protection (trip at 0.68V on VFB), PGOOD monitoring, and undervoltage lockout (2.25V rising threshold).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Range | 2.75V to 4.5V - supports single-cell Li-ion and low-voltage distributed power rails without pre-regulation. |
| Output Voltage Reference | 0.6V ±1.5% - enables accurate 1.2V, 1.8V, or other sub-1V outputs using standard resistor dividers. |
| Switching Frequency | 300kHz–750kHz (selectable) or 250kHz–850kHz (PLL-synchronized) - balances efficiency vs. inductor/capacitor size. |
| Max Duty Cycle | 97% - sustains regulation during deep battery discharge (e.g., 3.3V input → 1.8V output with <0.1V headroom). |
| Current Sense Method | VDS-based, no RSENSE - eliminates sense resistor losses and PCB area; supports programmable thresholds via IPRG pins. |
| Quiescent Current (Shutdown) | 6.5μA - extends battery life in always-on or standby modes. |
| Operating Temperature | –40°C to +85°C - qualified for industrial and portable embedded applications. |
Pinout & Package
The LTC3836EUFD#TRPBF is housed in a thermally enhanced 28-lead (4mm × 5mm) plastic QFN package with exposed pad (Pin 29) that must be soldered to PCB ground for optimal thermal performance (θJA = 43°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN (Pin 6) | Small-signal power supply | Powers internal circuitry except gate drivers; requires RC filtering to suppress noise coupling into control loops. |
| SW1/SW2 (Pins 11, 26 / Pins 14, 11) | Switch node | Connects to inductor and MOSFET sources/drains; serves as negative input to current comparator and reverse-current detector. |
| BOOST1/BOOST2 (Pins 13, 24 / Pins 16, 27) | Gate driver bootstrap supply | Provides floating high-side drive voltage; requires external Schottky diode and bootstrap capacitor per channel. |
| TG1/TG2 (Pins 18, 20 / Pins 21, 23) | Top gate drive output | Drives gates of external high-side N-MOSFETs with rail-to-rail swing (PGND to BOOST). |
| BG1/BG2 (Pins 15, 22 / Pins 19, 25) | Bottom gate drive output | Drives gates of external synchronous rectifier N-MOSFETs (PGND to BOOST swing). |
| VFB1/VFB2 (Pins 8, 1 / Pins 11, 4) | Feedback input | Monitors output voltage via resistor divider; compared to 0.6V reference to regulate output within ±1.5%. |
| TRACK/SS2 (Pin 7) | Channel 2 tracking & soft-start | Enables VOUT2 to track VOUT1 start-up slope or accept external soft-start ramp; internal 1μA pull-up enables capacitor-based timing. |
| RUN/SS (Pin 17) | Enable & external soft-start | Pulling below 0.65V disables both channels; releasing enables internal soft-start; external capacitor extends ramp time linearly. |
| SYNC/FCB (Pin 21) | PLL sync input / mode select | Accepts external clock (250–850kHz) for phase locking; tied to VIN = pulse-skipping, tied to SGND = forced continuous conduction. |
| PLLLPF (Pin 4) | PLL loop filter / freq select | When synchronized: RC network sets PLL bandwidth; when free-running: GND/VIN/floating selects 300/750/550kHz oscillator frequency. |
| PGOOD (Pin 10) | Power-good open-drain output | Asserts low if either VFB deviates >±13.3% from 0.6V - signals system controller of output fault or startup completion. |
| PGND (Pins 14, 19, 23) | Power ground | Return path for gate drivers and reverse-current comparators; must be low-inductance connection to minimize shoot-through risk. |
| SGND (Pin 5) | Small-signal ground | Reference for error amplifiers, comparators, and bias circuits; should be separated from PGND and joined at single point. |
| IPRG1/IPRG2 (Pins 3, 27 / Pins 6, 2) | Peak current threshold select | Three-state inputs (VIN/GND/floating) set max VSENSE to 202mV/82mV/122mV - adapts sensing gain to MOSFET RDS(on). |
| ITH1/ITH2 (Pins 9, 12 / Pins 5, 2) | Error amp output / current limit | Voltage (0.7–2V range) sets peak inductor current threshold; also used for compensation network connection. |
| SENSE1+/SENSE2+ (Pins 12, 25 / Pins 5, 28) | Current sense positive input | Connects to main MOSFET drain; provides VDS signal to differential current comparator for no-RSENSE operation. |
Key Features
| Feature | Design Value |
|---|---|
| No external current sense resistor | Uses MOSFET VDS sensing to eliminate RSENSE power loss, board area, and thermal drift errors - improves light-load efficiency by up to 3%. |
| 2-phase interleaved operation | 180° phase shift between controllers cuts input capacitor RMS current by ~70%, enabling smaller ceramic input caps and reducing EMI filtering requirements. |
| Dual-output tracking with independent soft-start | TRACK/SS2 pin allows VOUT2 to precisely follow VOUT1's ramp profile or accept separate timing - critical for FPGA/CPU core-I/O sequencing. |
| True PLL synchronization | Locks internal oscillator to external clock (250–850kHz) with guaranteed capture range - eliminates beat frequencies in multi-rail systems and simplifies EMI compliance testing. |
| Programmable peak current limit | IPRG1/IPRG2 pins independently configure VSENSE(MAX) per channel (82/122/202mV) - matches sensing gain to specific MOSFET RDS(on) across temperature and process variation. |
| Low-dropout 97% duty cycle | Maintains regulation with only 0.1V input-to-output headroom - extends runtime in battery-powered systems operating down to 2.8V cell voltage. |
Applications
| Single Li-ion Powered Devices | Distributed DC Power Systems |
|---|---|
Use Scenario: Portable medical monitors powered by a single 3.3V nominal Li-ion cell requiring isolated 1.8V (core logic) and 1.2V (memory interface) rails with tight sequencing. IC Role / Device Role / Timing Role: Dual-output 2-phase controller providing independent, tracked regulation with no external sense resistors and minimal input capacitance. Use Value: Enables >92% efficiency at 15A per rail while maintaining <1% cross-regulation and supporting cold-temperature startup down to –40°C. |
Use Scenario: Industrial PLC backplane supplying multiple 1.2V/1.8V FPGA banks from a centralized 3.3V intermediate bus with strict ripple and EMI limits. IC Role / Device Role / Timing Role: Interleaved dual controller minimizing input ripple current and enabling shared input capacitor bank across multiple LTC3836EUFD#TRPBF instances. Use Value: Reduces total input capacitance by 50% versus discrete single-phase controllers, cutting BOM cost and PCB area while meeting CISPR-22 Class B conducted emissions. |
| FPGA Core & I/O Power Sequencing | High-Density Embedded Computing |
Use Scenario: Xilinx Artix-7 FPGA requiring 1.0V core and 1.8V I/O supplies with monotonic, tracked startup and <100μs response to load transients. IC Role / Device Role / Timing Role: Dual-output controller with TRACK/SS2 and RUN/SS pins enabling precise voltage ramp alignment and fast transient recovery via current-mode control. Use Value: Achieves <±1% output deviation during 10A/μs load steps and guarantees monotonic rise without undershoot - eliminating FPGA configuration failures. |
Use Scenario: RISC-V SoM module with dual-core processor needing 1.1V CPU and 0.9V GPU rails from 3.3V input, constrained to ≤8mm² board area per regulator. IC Role / Device Role / Timing Role: Compact 4mm × 5mm QFN controller driving low-RDS(on) MOSFETs with integrated soft-start and PGOOD signaling for system-level power management. Use Value: Delivers 15A per rail in <120mm² total solution size (including inductors/caps), with shutdown IQ <7μA preserving battery charge during sleep states. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output synchronous buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP2964GQ-Z (Monolithic Power) | Integrated MOSFETs (40V max), fixed 500kHz freq, no VDS sensing - requires RSENSE; smaller 4mm × 4mm QFN but lower current capability (12A max). | Suitable for lower-power apps (<10A/rail) where integration reduces component count but sacrifices flexibility in MOSFET selection and thermal design. | Choose MP2964GQ-Z when board space is critical and input voltage exceeds 4.5V; avoid when using ultra-low RDS(on) discrete MOSFETs or requiring 250–850kHz PLL sync. |
| LTC3855IUFD#PBF (Analog Devices) | Single-output, 4-phase controller with identical VDS sensing, same QFN package, but no tracking or dual independent feedback - supports higher total current (up to 60A) on one rail. | Used when a single high-current rail (e.g., 1.0V @ 30A) is needed instead of two independent rails; lacks second VFB/ITH/track path. | Choose LTC3855IUFD#PBF for single-rail high-current applications; LTC3836EUFD#TRPBF remains optimal for true dual-rail, sequenced, or tracked power domains. |
Compared with MP2964GQ-Z and LTC3855IUFD#PBF, the LTC3836EUFD#TRPBF uniquely combines dual independent outputs, VDS-based current sensing, and full 2-phase interleaving in a compact QFN - making it the only choice for space-constrained, battery-powered dual-rail systems demanding high efficiency, sequencing control, and wide input voltage tolerance.
Availability
LTC3836EUFD#TRPBF is available at Aetrix Electronics and suitable for single Li-ion-powered devices, FPGA power sequencing, and distributed DC power systems requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for LTC3836EUFD#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its high-performance power management portfolio, emphasizing precision, efficiency, and reliability in analog-intensive applications.
The LTC3836EUFD#TRPBF belongs to Linear's high-efficiency synchronous controller product line, designed specifically for compact, high-current DC/DC conversion in battery-powered and thermally constrained systems where RSENSE-free operation and interleaved topology deliver measurable size and efficiency advantages.
FAQ
What is the maximum supported input voltage for the LTC3836EUFD#TRPBF?
The LTC3836EUFD#TRPBF has an absolute maximum input supply voltage (VIN) rating of 4.5V. Its operational input range is specified from 2.75V to 4.5V - making it ideal for single-cell Li-ion (2.7–4.2V) and low-voltage intermediate bus applications. Exceeding 4.5V risks permanent damage per Absolute Maximum Ratings.
Does the LTC3836EUFD#TRPBF require external current sense resistors?
No, the LTC3836EUFD#TRPBF uses MOSFET VDS sensing instead of external sense resistors. It measures the voltage drop across the main N-channel MOSFET's RDS(on) via SENSE1+/SENSE2+ and SW1/SW2 pins, eliminating sense resistor losses, board area, and thermal drift - a core feature confirmed in the device description and Features list.
How does the LTC3836EUFD#TRPBF achieve 2-phase interleaving?
The LTC3836EUFD#TRPBF internally configures its two controllers to operate 180° out-of-phase by default. This interleaving reduces input capacitor RMS current by up to 70%, lowers EMI, and allows smaller input capacitors - a key advantage explicitly highlighted in the Applications and Operation sections of the datasheet.
Can the LTC3836EUFD#TRPBF synchronize to an external clock?
Yes, the LTC3836EUFD#TRPBF features a true phase-locked loop (PLL) accessible via the SYNC/FCB pin. It locks to external CMOS clocks from 250kHz to 850kHz (guaranteed range), with PLLLPF pin configured as loop filter - enabling deterministic timing across multiple regulators and simplifying EMI compliance.
What is the purpose of the TRACK/SS2 pin on the LTC3836EUFD#TRPBF?
The TRACK/SS2 pin on the LTC3836EUFD#TRPBF controls the startup behavior of the second output (VOUT2). It allows VOUT2 to track VOUT1's ramp (e.g., via resistor divider from VOUT1) or implement independent soft-start using an external capacitor charged by the internal 1μA current source - ensuring reliable power sequencing for FPGAs and processors.
LTC3836EUFD#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- PolyPhase®
- Package/Case:
- 28-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Number of Outputs:
- 2
- Output Phases:
- 2
- Voltage - Supply (Vcc/Vdd):
- 2.75V ~ 4.5V
- Frequency - Switching:
- 300kHz ~ 750kHz
- Duty Cycle (Max):
- 97%
- Synchronous Rectifier:
- Yes
- Clock Sync:
- Yes
- Serial Interfaces:
- -
- Control Features:
- Enable, Power Good, Soft Start, Tracking
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-QFN (4x5)
LTC3836EUFD#TRPBF FAQ
1.How can I place an order for LTC3836EUFD#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3836EUFD#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3836EUFD#TRPBF reliable?
The price and inventory of LTC3836EUFD#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3836EUFD#TRPBF is usually 5 days.
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Once your LTC3836EUFD#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3836EUFD#TRPBF?
For technical support, including LTC3836EUFD#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3836EUFD#TRPBF requirements.
6.How does Aetrix verify that LTC3836EUFD#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC3836EUFD#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3836EUFD#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC3836EUFD#TRPBF?
All LTC3836EUFD#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3836EUFD#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3836EUFD#TRPBF part is unused and in its original packaging.
Return procedure for LTC3836EUFD#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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