Analog Devices Inc. LTC3851AIUD-1#PBF
- Part No.:
- LTC3851AIUD-1#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 16-WFQFN Exposed Pad
- Datasheet:
-
LTC3851AIUD-1#PBF.pdf
- Description:
- IC REG CTRLR BUCK 16QFN
- Quantity:
- Payment:

- Shipping:

Inventory:135
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC3851AIUD-1#PBF from Analog Devices (formerly Linear Technology) is a high-performance synchronous step-down switching regulator controller driving dual N-channel MOSFETs in constant-frequency current-mode operation. It supports 4V–38V input, delivers 0.8V–5.5V output with ±1% accuracy, features phase-lockable 250kHz–750kHz switching, and integrates PGOOD monitoring and OPTI-LOOP® compensation. It is used in telecom intermediate bus converters requiring stable, high-efficiency DC/DC regulation.
For engineers reviewing the LTC3851AIUD-1#PBF datasheet, LTC3851AIUD-1#PBF pinout, LTC3851AIUD-1#PBF application, or LTC3851AIUD-1#PBF equivalent, key selection criteria include its 16-pin 3mm × 3mm QFN package, 99% duty cycle capability for low-dropout operation, selectable light-load modes (Burst/Pulse-Skipping/Continuous), and precise 0.8V reference with tracking/soft-start via TK/SS pin.
Technical Context
The LTC3851AIUD-1#PBF implements a constant-frequency current-mode control architecture with internal transconductance error amplifier (gm = 2 mmho, GBW = 3 MHz) and slope-compensated PWM. Its phase-locked loop accepts external clocks up to 750 kHz on MODE/PLLIN and uses an RC network on FREQ/PLLFLTR for frequency programming or PLL filtering.
It features dual gate drivers (TG/BG) with matched 25 ns rise/fall times, 30 ns dead-time control, and integrated dropout detection that forces periodic top-FET off-time to recharge the bootstrap capacitor during near-100% duty cycles. The PGOOD output asserts low when VFB deviates >±10% from 0.8 V or during soft-start/shutdown.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4 V to 38 V - supports 12 V/24 V/36 V battery and intermediate bus systems without pre-regulation. |
| Output Voltage Accuracy | ±1% over –40°C to 125°C - ensures tight regulation across automotive and industrial temperature ranges. |
| Switching Frequency | 250 kHz to 750 kHz - adjustable via resistor on FREQ/PLLFLTR; enables optimization of efficiency vs. size trade-offs. |
| Reference Voltage | 0.8 V ±1% - precision feedback threshold enabling accurate output setting down to sub-1 V with external divider. |
| Light-Load Operation | Selectable Burst Mode®, Pulse-Skipping, or Forced Continuous - reduces quiescent current to 20 µA in shutdown and improves light-load efficiency. |
| Driver Output Capability | TG/BG pull-up/down resistances: 2.2 Ω / 1.2 Ω (TG), 2.1 Ω / 1.1 Ω (BG) - drives standard logic-level N-MOSFETs with fast 25 ns transitions. |
| Power Good Threshold | VFB deviation >±10% triggers PGOOD low - provides reliable system power sequencing and fault indication with 17 µs debounce. |
Pinout & Package
Package: 16-lead (3 mm × 3 mm) plastic QFN with exposed thermal pad (Pin 17 = GND). RoHS-compliant, lead-free finish. Thermal resistance θJA = 68°C/W, θJC = 4.2°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Pin 1 (RUN) | Enable control input | Turns IC on above 1.22 V; shuts down below 1.1 V; internal 2 µA pull-up enables simple RC startup delay. |
| Pin 2 (TK/SS) | Soft-start/tracking control | Internal 1 µA current charges external capacitor to ramp VOUT linearly; supports ratiometric or coincident tracking of master supply. |
| Pin 3 (ITH) | Error amplifier output & current limit threshold | Controls peak inductor current; voltage sets current sense threshold (e.g., 1.2 V → 50 mV at SENSE pins); also used for loop compensation. |
| Pin 4 (FB) | Feedback input | Compares output voltage (via resistive divider) against 0.8 V reference; ±10% window determines PGOOD state. |
| Pin 5 (SENSE–) | Current sense inverting input | Connects to low-side of DCR network or shunt resistor; enables accurate current-mode control and foldback limiting. |
| Pin 6 (SENSE+) | Current sense non-inverting input | Connects to high-side of sensing element; differential input rejects common-mode noise for robust current measurement. |
| Pin 7 (PGOOD) | Open-drain power-good indicator | Pulled low during startup, shutdown, or VFB out-of-regulation; requires external pull-up to ≤6 V for system monitoring. |
| Pin 8 (GND) | Analog/digital ground | Kelvin connection point for FB, SENSE, and CVCC; exposed pad (Pin 17) must be soldered to PCB ground plane for thermal and electrical integrity. |
| Pin 9 (BG) | Bottom gate driver output | Drives source-follower N-MOSFET between GND and INTVCC; 1.1 Ω pull-down ensures fast turn-off and prevents shoot-through. |
| Pin 10 (INTVCC) | Internal 5 V LDO output | Supplies gate drivers and internal circuitry; requires ≥2.2 µF low-ESR ceramic/tantalum decoupling to GND. |
| Pin 11 (VIN) | Main input supply | Accepts 4 V–38 V; powers INTVCC LDO and supplies energy to boost capacitor during high-duty-cycle operation. |
| Pin 12 (BOOST) | Floating bootstrap supply | Connects to (+) terminal of bootstrap capacitor; swings from ~INTVCC–0.4 V to VIN+INTVCC to bias TG driver. |
| Pin 13 (TG) | Top gate driver output | Floating driver output referenced to SW node; 2.2 Ω pull-up enables fast turn-on of high-side N-MOSFET. |
| Pin 14 (SW) | Switch node connection | Connects to inductor and MOSFET bridge midpoint; voltage swings from ~–0.4 V (Schottky drop) to VIN. |
| Pin 15 (MODE/PLLIN) | Mode selection & external sync input | Selects Burst/Pulse-Skip/Continuous mode or accepts external clock (250–750 kHz) to force synchronization and eliminate beat frequencies. |
| Pin 16 (FREQ/PLLFLTR) | Oscillator programming & PLL filter | Resistor-to-GND sets nominal frequency; with external clock on MODE/PLLIN, functions as PLL loop filter node. |
Key Features
| Feature | Design Value |
|---|---|
| OPTI-LOOP® compensation | Minimizes required output capacitance by optimizing transient response across wide range of COUT and ESR values - reduces BOM cost and board area. |
| 99% maximum duty cycle | Enables ultra-low dropout operation (e.g., 5 V out from 5.2 V in) - critical for post-regulation in tightly constrained power rails. |
| Programmable current foldback | Reduces MOSFET conduction losses during short-circuit by lowering peak current limit - improves thermal safety without external circuitry. |
| Output overvoltage protection | Hardware-based OV comparator disables top FET and activates bottom FET within microseconds if VFB exceeds +10% - protects downstream loads independently of control loop. |
| Thermally enhanced QFN | 3 mm × 3 mm footprint with exposed GND pad achieves θJC = 4.2°C/W - enables high-current designs (>15 A) with minimal heatsinking. |
Applications
| Telecom Intermediate Bus Converter | Industrial PLC Power Supply |
|---|---|
|
Use Scenario: Regulating 48 V or 24 V intermediate bus to 3.3 V/5 V for FPGA, DSP, and I/O modules in carrier-grade equipment. IC Role / Device Role / Timing Role: Primary synchronous buck controller managing high-current, high-efficiency conversion with precise sequencing and fault reporting. Use Value: 90%+ efficiency at 10 A load (VIN = 12 V, VOUT = 3.3 V), PGOOD signaling for system-level power management, and 750 kHz operation enabling compact magnetics. |
Use Scenario: Generating isolated 5 V and 3.3 V rails from 24 V DC field supply in programmable logic controllers with harsh EMI requirements. IC Role / Device Role / Timing Role: Non-isolated step-down controller delivering clean, well-regulated power with low ripple and controlled start-up timing. Use Value: Burst Mode® operation reduces no-load power to <15 mW; OPTI-LOOP® ensures stable response with polymer capacitors; ±1% VREF guarantees ADC reference stability. |
| Automotive Infotainment Core Supply | Distributed DC Power System |
|
Use Scenario: Providing 1.2 V core voltage for SoC in automotive head units operating from 9 V–16 V battery with cold-crank tolerance. IC Role / Device Role / Timing Role: High-input-range buck controller with tracking capability to coordinate with auxiliary 5 V rail during ignition sequences. Use Value: 4 V minimum VIN supports cold-crank down to 6.5 V; TK/SS pin enables ratiometric tracking to avoid sequencing violations; –40°C to 125°C rating meets AEC-Q100 Grade 1 requirements. |
Use Scenario: Local point-of-load regulation in server backplanes or data center racks where multiple 12 V inputs feed distributed 1.8 V/3.3 V supplies. IC Role / Device Role / Timing Role: Scalable, synchronized buck controller enabling coherent switching across multiple rails to suppress conducted EMI. Use Value: PLL synchronization via MODE/PLLIN eliminates beat frequencies; phase-lockable 250–750 kHz allows harmonic alignment with system clock; QFN package supports high-density layout. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3851EMSE-1#PBF | Same die, but in 16-lead MSOP package (θJA = 40°C/W); no exposed thermal pad; higher thermal resistance limits max continuous current. | Better suited for lower-power (<8 A), space-constrained layouts where QFN rework is impractical; lacks thermal performance for sustained high-current operation. | Select when board assembly process favors MSOP, thermal load is moderate, and footprint compatibility with legacy Linear designs is required. |
| MP2918GL-Z | Monolithic 30 V, 12 A buck converter (integrated MOSFETs); fixed 500 kHz; no PLL sync; PGOOD but no tracking/soft-start pin. | Eliminates external FETs and gate drive complexity but sacrifices design flexibility, frequency tuning, and advanced sequencing features. | Choose for cost-sensitive, medium-current applications where integration outweighs need for custom FET selection, wide VIN, or multi-rail synchronization. |
Compared with LTC3851EMSE-1#PBF, the LTC3851AIUD-1#PBF offers superior thermal performance and higher current capability due to its QFN package; compared with MP2918GL-Z, it provides full external FET control, programmable frequency, PLL synchronization, and precision tracking-making it suitable for high-reliability, high-flexibility power architectures.
Availability
LTC3851AIUD-1#PBF is available at Aetrix Electronics and suitable for telecom intermediate bus converters, industrial PLC power supplies, automotive infotainment core supplies, and distributed DC power systems requiring stable component supply, long-term lifecycle support, and guaranteed RoHS-compliant sourcing.
Supply support for LTC3851AIUD-1#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full technical and manufacturing continuity for all Linear power products. Linear Technology pioneered high-performance analog ICs with emphasis on precision, reliability, and ruggedness.
The LTC3851A family was designed specifically for high-efficiency, high-input-voltage synchronous buck regulation in demanding infrastructure and industrial environments - emphasizing thermal robustness, wide operating range, and advanced protection features.
FAQ
What is the absolute maximum input voltage rating for the LTC3851AIUD-1#PBF?
The LTC3851AIUD-1#PBF has an absolute maximum input supply voltage (VIN) rating of 40 V. Exceeding this voltage may cause permanent damage. The device operates continuously from 4 V to 38 V, making it suitable for 24 V and 36 V industrial and telecom systems with margin for transients. Always observe the 40 V limit during hot-swap or load-dump events.
How does the PGOOD pin on the LTC3851AIUD-1#PBF behave during startup and fault conditions?
The PGOOD pin on the LTC3851AIUD-1#PBF is an open-drain output that pulls low during startup (while TK/SS ramps), shutdown (RUN < 1.1 V), or whenever VFB deviates more than ±10% from the 0.8 V reference. It asserts "power good" immediately upon VFB entering regulation but includes a 17 µs power-bad mask to ignore brief transients. An external pull-up resistor (to ≤6 V) is required.
Can the LTC3851AIUD-1#PBF synchronize to an external clock, and what are the frequency limits?
Yes, the LTC3851AIUD-1#PBF can synchronize to an external clock applied to the MODE/PLLIN pin. It accepts input frequencies from 250 kHz to 750 kHz and forces forced continuous conduction mode during synchronization. This eliminates beat frequencies in multi-rail systems and enables coherent EMI management. No additional components are needed beyond the clock source and proper AC coupling if required.
What is the purpose of the TK/SS pin on the LTC3851AIUD-1#PBF, and how is it used for tracking?
The TK/SS pin on the LTC3851AIUD-1#PBF serves dual roles: soft-start control (via internal 1 µA current charging an external capacitor) and output voltage tracking. For ratiometric tracking, connect a resistor divider from a master supply to TK/SS; for coincident tracking, tie TK/SS directly to the master rail through a small resistor. This ensures coordinated ramp-up of multiple rails without sequencing ICs.
Does the LTC3851AIUD-1#PBF support both RSENSE and DCR current sensing, and how is the choice implemented?
Yes, the LTC3851AIUD-1#PBF supports both RSENSE (shunt resistor) and DCR (inductor DC resistance) current sensing via the SENSE+ and SENSE– pins. RSENSE offers higher accuracy and simpler layout; DCR reduces power loss and BOM cost. Selection is implemented by configuring the external sensing network - no configuration register or pin strapping is required. Both methods enable current-mode control and foldback limiting.
LTC3851AIUD-1#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Number of Outputs:
- 1
- Output Phases:
- 1
- Voltage - Supply (Vcc/Vdd):
- 4V ~ 38V
- Frequency - Switching:
- 235kHz ~ 750kHz
- Duty Cycle (Max):
- 99%
- Synchronous Rectifier:
- Yes
- Clock Sync:
- No
- Serial Interfaces:
- -
- Control Features:
- Enable, Frequency Control, Power Good, Soft Start, Tracking
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-QFN (3x3)
LTC3851AIUD-1#PBF FAQ
1.How can I place an order for LTC3851AIUD-1#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3851AIUD-1#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3851AIUD-1#PBF reliable?
The price and inventory of LTC3851AIUD-1#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3851AIUD-1#PBF is usually 5 days.
3.What payment methods are accepted for LTC3851AIUD-1#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3851AIUD-1#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3851AIUD-1#PBF?
LTC3851AIUD-1#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3851AIUD-1#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3851AIUD-1#PBF?
For technical support, including LTC3851AIUD-1#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3851AIUD-1#PBF requirements.
6.How does Aetrix verify that LTC3851AIUD-1#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3851AIUD-1#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3851AIUD-1#PBF meets industry standards.
7.What is the process for return or replacement of LTC3851AIUD-1#PBF?
All LTC3851AIUD-1#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3851AIUD-1#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3851AIUD-1#PBF part is unused and in its original packaging.
Return procedure for LTC3851AIUD-1#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC3851AIUD-1#PBF Tags

-
UCC28C45DR
Texas Instruments

-
UCC28C40DR
Texas Instruments

-
UCC28C43DR
Texas Instruments

-
ZXSC410E6TA
Diodes Incorporated
-
LM3524DMX/NOPB
Texas Instruments
-
LM3489MMX/NOPB
Texas Instruments

-
MIC2102YML-TR
Microchip Technology

-
LM5148RGYR
Texas Instruments
-
TL598CDR
Texas Instruments

-
LM5155DSSR
Texas Instruments

-
LM25085MYX/NOPB
Texas Instruments

-
UCC2813DTR-0
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

