Analog Devices Inc. LTC3852EUDD#TRPBF
- Part No.:
- LTC3852EUDD#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 24-WFQFN Exposed Pad
- Datasheet:
-
LTC3852EUDD#TRPBF.pdf
- Description:
- IC REG CTRLR BUCK 24QFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,759
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Product details
Overview
LTC3852EUDD#TRPBF from Analog Devices (formerly Linear Technology) is a constant-frequency, current-mode synchronous step-down DC/DC controller with integrated charge pump. It operates from 2.7V–5.5V input to power its internal logic and gate drivers, supports 4V–38V main controller input, delivers ±1.25% output voltage accuracy, enables phase-lockable switching up to 750kHz, and features adjustable soft-start, power-good monitoring, and selectable Burst Mode®/pulse-skipping/continuous conduction operation.
For engineers reviewing the LTC3852EUDD#TRPBF datasheet, LTC3852EUDD#TRPBF pinout, LTC3852EUDD#TRPBF application, or LTC3852EUDD#TRPBF equivalent, key selection criteria include low-input-voltage capability via charge pump, RSENSE/DCR current sensing, reverse-current prevention during soft-start, current foldback protection, and 24-lead 3mm × 5mm QFN packaging for high-density power designs.
Technical Context
The LTC3852EUDD#TRPBF implements a constant-frequency current-mode control architecture with dual independent power domains: a charge-pump-powered logic/gate-drive section (VIN1 = 2.7V–5.5V → VPUMP ≈ 5V) and a wide-input buck controller section (VIN2 = 4V–38V). Its error amplifier output (ITH) directly sets peak inductor current, while VFB compares feedback against a 0.800V reference with ±1.25% accuracy over temperature.
Control flexibility is achieved through dedicated pins: MODE/PLLIN selects operating mode (Burst, pulse-skip, or forced CCM) or accepts external clock for synchronization; FREQ/PLLFLTR sets oscillator frequency (250kHz–750kHz) via resistor; TRACK/SS enables ratiometric tracking or soft-start via external capacitor; RUN provides precision enable threshold (1.22V typ); and PGOOD asserts open-drain signal when VOUT is within ±10% of regulation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Controller Input Range (VIN2) | 4V to 38V - supports wide-range industrial and automotive input rails without pre-regulation |
| Charge Pump Input Range (VIN1) | 2.7V to 5.5V - enables direct operation from single-cell Li-ion or 3.3V system rails |
| Output Voltage Accuracy | ±1.25% over temperature - ensures stable regulation across thermal stress in embedded systems |
| Switching Frequency Range | 250kHz to 750kHz - balances efficiency vs. size; phase-lockable for EMI reduction in multi-rail systems |
| Current Sense Threshold | 40mV to 68mV (typ) - supports low-loss RSENSE or DCR sensing with precise overcurrent protection |
| Power Good Threshold | ±10% of regulated VOUT - provides reliable system-level power sequencing and fault detection |
| Minimum On-Time | 90ns - enables high VIN/VOUT ratios (e.g., 36V→1.2V) with practical inductor selection |
| Duty Cycle Capability | Up to 99% - supports very low dropout operation for near-input-output regulation |
Pinout & Package
Package: 24-lead (3mm × 5mm) plastic QFN with exposed pad (Pin 25), rated for –40°C to +125°C junction temperature. Exposed pad must be soldered to PCB for thermal and electrical grounding.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SENSE– (1) | Current sense comparator inverting input | Kelvin connection point for current-sense resistor or DCR network; critical for accurate current limiting |
| SENSE+ (2) | Current sense comparator noninverting input | Connects to high-side of sense resistor or DCR tap; establishes current threshold reference |
| PGOOD (3) | Open-drain power-good indicator | Asserts low when VOUT is within ±10% of target; used for system power sequencing and fault signaling |
| GND2 (4) | Buck controller small-signal ground | Reference for feedback, compensation, and current sense; must be Kelvin-connected to CINTVCC (–) |
| BG (5) | Bottom gate driver output | Drives gate of synchronous N-channel MOSFET between GND2 and INTVCC; 1.1Ω pull-down resistance |
| C+ (7), C– (8) | Flying capacitor terminals | Interface with external 2.2μF ceramic flying capacitor for charge-pump voltage doubling |
| SHDN (10) | Active-low charge pump shutdown | Pulls VPUMP offline when low; CMOS input with 0.7V threshold; must not float |
| VIN1 (12) | Charge pump input supply | Accepts 2.7V–5.5V source; requires ≥1μF low-ESR ceramic bypass to GND1 |
| VPUMP (13) | Regulated 5V charge pump output | Supplies gate drive and logic; requires ≥4.7μF low-ESR ceramic bypass to GND1 |
| INTVCC (14) | Gate drive and logic supply | Powered by VPUMP; supplies TG/BG drivers and internal circuitry; max 50mA peak current |
| VIN2 (15) | Main controller input supply | Accepts 4V–38V rail; powers high-side switch path; bypass to GND2 with ≥4.7μF ceramic |
| BOOST (16) | Floating bootstrap supply node | Connects to booststrap capacitor (+); swings from ~INTVCC–0.7V to VIN1+INTVCC |
| TG (17) | Top gate driver output | Floating driver for high-side N-MOSFET; 2.2Ω pull-up / 1.2Ω pull-down; synchronized with SW node |
| SW (18) | Switch node connection | Connects to inductor and MOSFET bridge; voltage swings from ~–0.7V to VIN2 |
| MODE/PLLIN (19) | Operating mode select / PLL sync input | Configures Burst Mode® (via 50k–250k resistor), pulse-skip (GND2), or forced CCM (INTVCC) |
| FREQ/PLLFLTR (20) | Oscillator frequency set / PLL filter | Resistor-to-GND2 sets nominal frequency (250–750kHz); also serves as PLL loop filter node |
| RUN (21) | Precision enable control | 1.22V typical rising threshold; 2μA internal pull-up; disables controller below 1.1V |
| TRACK/SS (22) | Soft-start ramp / output tracking input | 1μA internal current charges external capacitor; enables linear VOUT ramp or master-supply tracking |
| ITH (23) | Error amplifier output / current limit control | Voltage sets peak inductor current; 2mmho transconductance; used for loop compensation |
| VFB (24) | Feedback voltage input | Compares against 0.800V internal reference; ±50nA input bias enables high-impedance divider |
| GND (25) | Exposed thermal pad | Must be soldered to PCB plane; serves as primary thermal path and common ground for all domains |
Key Features
| Feature | Design Value |
|---|---|
| Integrated charge pump | Generates regulated 5V VPUMP from 2.7V–5.5V VIN1, enabling logic-level N-MOSFETs without external LDO |
| Three selectable light-load modes | Burst Mode® (high efficiency at light load), pulse-skipping (low noise), or forced continuous (low ripple) - configurable via MODE/PLLIN |
| No reverse current during soft-start | Reverse-current comparator disabled until startup completes, preventing output capacitor discharge into input |
| Current foldback protection | Reduces MOSFET gate drive under short-circuit conditions to limit power dissipation and thermal stress |
| Phase-lockable oscillator | Supports synchronization to external clock (250kHz–750kHz) via MODE/PLLIN, reducing system EMI peaks |
| Very low dropout operation | 99% maximum duty cycle allows VOUT close to VIN2, supporting applications like 12V→11.5V post-regulation |
Applications
| Lithium-Ion Powered Systems | Industrial Distributed Power |
|---|---|
|
Use Scenario: Portable medical monitor powered by single-cell Li-ion (3.0V–4.2V) requiring stable 1.2V/20A core supply. IC Role / Device Role / Timing Role: Synchronous step-down controller managing high-current POL conversion with charge-pump self-powering. Use Value: Eliminates need for separate 5V bias rail; ±1.25% VOUT accuracy ensures ADC reference stability; 99% duty cycle maintains regulation down to 3.0V cell voltage. |
Use Scenario: Factory automation PLC with 24V DC bus powering multiple isolated 3.3V/5V subsystems. IC Role / Device Role / Timing Role: Primary buck controller stepping 24V to 3.3V at up to 20A with precise sequencing and fault reporting. Use Value: 4V–38V VIN2 range accommodates brownout and surge conditions; PGOOD enables safe startup of downstream FPGAs; phase-locking reduces conducted EMI in dense backplanes. |
| High-Density Telecom Boards | Automotive Infotainment |
|
Use Scenario: 1U server board with space-constrained 48V intermediate bus converting to 1.8V/15A CPU core rail. IC Role / Device Role / Timing Role: High-efficiency, high-frequency controller enabling compact magnetics and low-profile layout. Use Value: 750kHz max switching frequency shrinks inductor size; 90ns minimum on-time supports 48V→1.8V conversion; 24-lead QFN minimizes PCB footprint. |
Use Scenario: Automotive head unit with 9V–16V battery input requiring robust 5V/10A supply for display and audio ICs. IC Role / Device Role / Timing Role: Automotive-grade buck controller delivering fault-tolerant, thermally resilient power conversion. Use Value: –40°C to +125°C operation meets AEC-Q200 ambient requirements; current foldback protects against shorted displays; undervoltage lockout prevents erratic behavior during cold cranking. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous step-down controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3851AEUFD#TRPBF | Single-output version with integrated LDO bias for gate drivers; no charge pump; requires external 5V or higher bias rail | Preferred where 5V bias is already available and ultra-low VIN1 operation is unnecessary | Select when simplifying BOM by eliminating flying capacitor and VPUMP bypass components is prioritized over lowest possible input voltage |
| MP2918GL-Z | Monolithic 20A buck converter (integrated MOSFETs); fixed 500kHz frequency; no charge pump or PLL sync capability | Suitable for lower-power, cost-sensitive designs where integration outweighs flexibility | Choose for rapid prototyping or space-constrained boards where external MOSFET selection and thermal management are undesirable |
Compared with LTC3851AEUFD#TRPBF, the LTC3852EUDD#TRPBF enables true single-supply operation from 2.7V via charge pump, while MP2918GL-Z trades configurability for integration-making LTC3852EUDD#TRPBF optimal for high-flexibility, wide-input, high-current discrete power stages.
Availability
LTC3852EUDD#TRPBF is available at Aetrix Electronics and suitable for lithium-ion portable devices, industrial distributed power systems, telecom base station POL converters, and automotive infotainment modules requiring stable component supply across extended temperature ranges.
Supply support for LTC3852EUDD#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017, inheriting its legacy of high-performance analog and power management ICs with emphasis on precision, reliability, and ruggedness.
The LTC3852EUDD#TRPBF belongs to Linear's high-efficiency synchronous controller product line, designed specifically for demanding DC/DC conversion in space-, thermal-, and input-voltage-constrained applications where discrete MOSFET control and flexible light-load operation are essential.
FAQ
What input voltage ranges does the LTC3852EUDD#TRPBF support for its two power domains?
The LTC3852EUDD#TRPBF supports two independent input domains: VIN1 (charge pump input) accepts 2.7V to 5.5V, enabling direct operation from Li-ion or 3.3V rails; VIN2 (main controller input) accepts 4V to 38V, accommodating industrial, automotive, and telecom supply voltages. These domains operate concurrently but are electrically isolated in function-VIN1 powers internal logic via VPUMP, while VIN2 supplies the power stage.
How does the LTC3852EUDD#TRPBF achieve high efficiency at light loads?
The LTC3852EUDD#TRPBF achieves high light-load efficiency through three selectable operating modes: Burst Mode® (disables switching and powers load from output capacitor until VOUT droops), pulse-skipping (skips cycles while maintaining fixed frequency), and forced continuous conduction (CCM). Burst Mode® is enabled by connecting MODE/PLLIN to INTVCC via a 50k–250kΩ resistor and reduces quiescent current to ~25μA in shutdown, significantly extending battery life in portable applications using the LTC3852EUDD#TRPBF.
Can the LTC3852EUDD#TRPBF be synchronized to an external clock, and how is this configured?
Yes, the LTC3852EUDD#TRPBF supports external clock synchronization via the MODE/PLLIN pin. When an external clock signal (250kHz–750kHz) is applied to MODE/PLLIN, the internal oscillator locks to it, eliminating beat frequencies and reducing EMI in multi-rail systems. No additional components are required-simply drive MODE/PLLIN with a clean CMOS clock. This feature is confirmed in the Electrical Characteristics table (fMODE min/max) and Functional Diagram (PLL-SYNC block) of the LTC3852EUDD#TRPBF datasheet.
What protection features does the LTC3852EUDD#TRPBF include during fault conditions?
The LTC3852EUDD#TRPBF includes current foldback during short-circuit events (reducing MOSFET gate drive to limit power dissipation), output overvoltage protection (VOVL trips at 0.86V–0.90V on VFB), reverse-current blocking during soft-start, and undervoltage lockout (UVLO at 3.25V on INTVCC). Additionally, the PGOOD pin deasserts if VOUT falls outside ±10% regulation, providing system-level fault signaling-critical for safety-critical applications using the LTC3852EUDD#TRPBF.
Is the LTC3852EUDD#TRPBF pin-compatible with other members of the LTC385x family?
No, the LTC3852EUDD#TRPBF is not pin-compatible with LTC3851 or LTC3853 variants. While sharing functional similarities, pin assignments differ-for example, LTC3851 uses a different package (28-pin QFN) and allocates pins for integrated LDO bias rather than charge pump terminals (C+, C–). The LTC3852EUDD#TRPBF's 24-pin UDD package and dedicated charge-pump interface require unique PCB layout; migration requires schematic and layout revision, not drop-in replacement.
LTC3852EUDD#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 24-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Number of Outputs:
- 1
- Output Phases:
- 1
- Voltage - Supply (Vcc/Vdd):
- 4V ~ 38V
- Frequency - Switching:
- 235kHz ~ 750kHz
- Duty Cycle (Max):
- 99%
- Synchronous Rectifier:
- Yes
- Clock Sync:
- No
- Serial Interfaces:
- -
- Control Features:
- Enable, Frequency Control, Power Good, Soft Start, Tracking
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-QFN (3x5)
LTC3852EUDD#TRPBF FAQ
1.How can I place an order for LTC3852EUDD#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3852EUDD#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3852EUDD#TRPBF reliable?
The price and inventory of LTC3852EUDD#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3852EUDD#TRPBF is usually 5 days.
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LTC3852EUDD#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3852EUDD#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3852EUDD#TRPBF?
For technical support, including LTC3852EUDD#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3852EUDD#TRPBF requirements.
6.How does Aetrix verify that LTC3852EUDD#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC3852EUDD#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3852EUDD#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC3852EUDD#TRPBF?
All LTC3852EUDD#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3852EUDD#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3852EUDD#TRPBF part is unused and in its original packaging.
Return procedure for LTC3852EUDD#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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