My Inquiry
My Account
Analog Devices Inc. LTC3855EUJ#PBF
- Part No.:
- LTC3855EUJ#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 40-WFQFN Exposed Pad
- Datasheet:
-
LTC3855EUJ#PBF.pdf
- Description:
- IC REG CTRLR BUCK 40QFN
- Quantity:
- Payment:
- Shipping:
Inventory:1,332
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC3855EUJ#PBF from Analog Devices (formerly Linear Technology) is a dual, 180° out-of-phase, current-mode synchronous step-down DC/DC controller driving all-N-channel MOSFET stages. It features differential remote sensing, programmable current sense thresholds (30/50/75 mV), 0.6 V ±0.75% reference accuracy, and supports up to 12-phase operation via CLKOUT/PHASMD. It delivers tightly regulated 1.8 V/1.2 V outputs at 15 A per channel in telecom and computer power systems.
For engineers reviewing the LTC3855EUJ#PBF datasheet, LTC3855EUJ#PBF pinout, LTC3855EUJ#PBF application, or LTC3855EUJ#PBF equivalent, key selection criteria include its dual-phase interleaving for input capacitance reduction, DCR temperature compensation for inductor current sensing accuracy, ±10% PGOOD window with 20 µs mask timer, and QFN-40 package thermal performance (θJA = 33°C/W).
Technical Context
The LTC3855EUJ#PBF implements two independent constant-frequency current-mode control loops with 180° phase offset, each using an error amplifier (EA) with transconductance of 2 mmho and ITH-based peak current programming. Its differential remote sense amplifier provides 0.998–1.002 V/V gain, 2 mV input offset, and 100 dB PSRR to reject board-level IR drops.
It integrates dual N-channel gate drivers (TG/BG) with 1.1–2.6 Ω RDS(ON), programmable oscillator (250–770 kHz), and multichip synchronization via MODE/PLLIN (for external clock lock) and PHASMD (to configure 180° or 240° inter-channel phase offsets and CLKOUT phase).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Range | 4.5 V to 38 V - supports 5 V, 12 V, and 24 V intermediate bus rails without external regulation. |
| VOUT Range | 0.6 V to 12.5 V - enables core voltage regulation for CPUs, FPGAs, and ASICs. |
| Reference Accuracy | ±0.75% at 0.6 V - ensures output voltage stability across load, line, and temperature. |
| Current Sense Threshold | Programmable 30/50/75 mV - allows flexible use of DCR or discrete shunt resistors with temperature compensation. |
| Oscillator Frequency | 250 kHz to 770 kHz - adjustable via FREQ pin current (10 µA) and resistor to ground. |
| Thermal Performance | θJA = 33°C/W (QFN-40) - requires exposed pad soldering to PCB for reliable 125°C junction operation. |
| PGOOD Window | ±10% with 20 µs blanking - prevents false fault triggering during transient recovery. |
Pinout & Package
The LTC3855EUJ#PBF is housed in a 40-pin, 6 mm × 6 mm plastic QFN package with exposed SGND pad (Pin 41) that must be soldered to the PCB for thermal and signal integrity. Pin count and layout match the UJ package variant specified in Linear Technology's official documentation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| TG1, TG2 | Top Gate Driver Outputs | Drive gates of high-side N-MOSFETs with floating 5 V swing referenced to SW nodes; support bootstrap capacitor recharge in dropout. |
| BG1, BG2 | Bottom Gate Driver Outputs | Drive gates of low-side N-MOSFETs between PGND and INTVCC; feature anti-shoot-through logic and 25 ns transition times. |
| SENSE1+, SENSE1− SENSE2+, SENSE2− | Current Sense Inputs | Differential inputs for DCR or shunt-based current sensing; bias current ±1 µA minimizes measurement error. |
| DIFFP, DIFFN, DIFFOUT | Differential Remote Sense Amplifier | True Kelvin sensing path: DIFFP connects to remote load, DIFFN to local ground, DIFFOUT feeds VFB for correction. |
| ITH1, ITH2 | Error Amplifier Output / Current Threshold | Analog interface for loop compensation; sets peak inductor current via EA servo; gm = 2 mmho. |
| VFB1, VFB2 | Feedback Input | Receives scaled output voltage; compared to 0.6 V reference; input leakage ≤ ±50 nA preserves divider accuracy. |
| CLKOUT, PHASMD | Multiphase Synchronization | CLKOUT provides phase-adjustable clock (60°/90°/120°); PHASMD configures inter-channel phase (180° or 240°) and CLKOUT alignment. |
| ILIM1, ILIM2 | Current Limit Selection | Three-state input (GND/FLOAT/INTVCC) selects max sense threshold: 30/50/75 mV - enables foldback protection. |
Key Features
| Feature | Design Value |
|---|---|
| Dual 180° phased controllers | Reduces RMS input ripple current by ~30% and cuts required bulk input capacitance by half vs single-phase design. |
| Programmable DCR temperature compensation | Uses ITEMP1/ITEMP2 pins with external NTC thermistors to correct inductor DCR drift over –40°C to 125°C. |
| True remote sensing differential amplifier | 0.998–1.002 V/V gain and 2 mV offset enable <1% load regulation error across 100 mm PCB traces. |
| Adjustable soft-start or tracking | 1.2 µA internal TK/SS current charges external capacitor for monotonic ramp; supports master-slave voltage sequencing. |
| Foldback output current limiting | Reduces peak switch current under overload by lowering ITH threshold when VFB falls below 0.55 V - protects MOSFETs and inductors. |
Applications
| Computer Systems | Telecom Systems |
|---|---|
Use Scenario: Dual-output VRM for CPU core (1.8 V) and memory I/O (1.2 V) on server motherboard with >30 A total load. IC Role / Device Role / Timing Role: Dual-phase synchronous buck controller providing interleaved switching, remote sense correction, and precise 0.6 V reference tracking. Use Value: Achieves <1% output voltage deviation under 10 A/µs load transients while reducing input capacitor count by 40%. | Use Scenario: Intermediate bus converter in 48 V telecom shelf supplying 12 V and 5 V to line cards with strict EMI limits. IC Role / Device Role / Timing Role: Dual-channel controller operating in forced continuous mode with synchronized CLKOUT to adjacent converters. Use Value: Enables deterministic 180° phase shift to suppress 2× fundamental input ripple, easing EMI filter design. |
| Industrial and Medical Instruments | DC Power Distribution Systems |
Use Scenario: Point-of-load regulator for FPGA and ADC in portable ultrasound equipment requiring low noise and tight regulation. IC Role / Device Role / Timing Role: Burst Mode controller with differential remote sense to maintain 0.6 V ±10 mV at FPGA die despite 50 mΩ trace resistance. Use Value: Delivers >92% efficiency at 100 mA load while suppressing audible switching noise via discontinuous conduction. | Use Scenario: Scalable 6-phase or 12-phase power system built from multiple LTC3855EUJ#PBF controllers feeding a common 3.3 V/50 A rail. IC Role / Device Role / Timing Role: Master/slave multiphase node using PHASMD and CLKOUT to distribute timing across 3–6 ICs with <5 ns skew. Use Value: Supports seamless phase addition without redesign; maintains <±0.5% current sharing error across phases. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-phase synchronous buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3857IUJ#PBF | Higher VIN max (40 V), integrated EXTVCC LDO, improved light-load efficiency, same pinout. | Preferred for 36 V battery systems or where EXTVCC simplification is critical. | Select when wider input range or reduced external component count outweighs cost premium. |
| MP2940AGQ-P | Single-chip dual-phase controller with PMBus interface, 0.5% ref accuracy, no differential remote sense. | Suitable for digitally managed supplies but lacks true Kelvin sensing for precision analog loads. | Choose for systems requiring telemetry, margining, or dynamic voltage scaling via digital interface. |
Compared with LTC3855EUJ#PBF, LTC3857IUJ#PBF extends input range and integrates EXTVCC regulation, while MP2940AGQ-P adds digital control at the expense of analog sensing fidelity - making LTC3855EUJ#PBF optimal for high-accuracy analog-regulated, remotely sensed, industrial-grade power delivery.
Availability
LTC3855EUJ#PBF is available at Aetrix Electronics and suitable for computer systems, telecom infrastructure, and industrial instrumentation requiring stable component supply, long-term lifecycle support, and guaranteed -40°C to +85°C operation.
Supply support for LTC3855EUJ#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full product support, datasheets, and application engineering for legacy Linear parts including the LTC3855 series.
The LTC3855 belongs to Linear's high-performance PolyPhase® controller family, designed specifically for high-current, low-voltage DC/DC conversion in space-constrained, thermally demanding environments such as servers, base stations, and medical imaging systems.
FAQ
What is the maximum input voltage rating for the LTC3855EUJ#PBF?
The LTC3855EUJ#PBF has an absolute maximum input supply voltage (VIN) rating of 40 V, with recommended operating range from 4.5 V to 38 V. Exceeding 40 V risks permanent damage per Absolute Maximum Ratings. The internal UVLO circuit disables operation below 3.0 V (typical) and re-enables above 3.4 V with 0.6 V hysteresis.
Does the LTC3855EUJ#PBF support true differential remote sensing, and how is it implemented?
Yes, the LTC3855EUJ#PBF includes a dedicated differential remote sense amplifier with DIFFP, DIFFN, and DIFFOUT pins. DIFFP connects directly to the remote load point, DIFFN to local output capacitor ground, and DIFFOUT feeds back into VFB1 or VFB2 via a resistor divider - enabling sub-1% load regulation despite PCB trace IR drops.
How does the ILIM pin configuration affect current limit behavior in the LTC3855EUJ#PBF?
The ILIM1 and ILIM2 pins on the LTC3855EUJ#PBF set the maximum current sense threshold to 30 mV (GND), 50 mV (floating), or 75 mV (INTVCC). This directly scales the foldback current limit and determines the peak inductor current trip point - critical for MOSFET SOA and thermal design under overload conditions.
Can the LTC3855EUJ#PBF operate in multiphase configurations beyond dual-phase, and what pins enable this?
Yes, the LTC3855EUJ#PBF supports up to 12-phase operation using CLKOUT and PHASMD pins. CLKOUT provides a phase-adjustable clock output (60°/90°/120°), and PHASMD selects inter-controller phase offset (180° or 240°), allowing synchronization of multiple LTC3855EUJ#PBF or compatible controllers in master-slave topology.
What thermal considerations apply to the LTC3855EUJ#PBF's QFN-40 package?
The LTC3855EUJ#PBF in the 40-pin QFN package has θJA = 33°C/W. Its exposed SGND pad (Pin 41) must be soldered to a minimum 200 mm² copper area with ≥4 thermal vias to internal ground planes. Junction temperature must stay ≤125°C; derating is required above 85°C ambient unless PCB layout meets thermal guidelines in the datasheet.
LTC3855EUJ#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- PolyPhase®
- Package/Case:
- 40-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Number of Outputs:
- 2
- Output Phases:
- 2
- Voltage - Supply (Vcc/Vdd):
- 4.5V ~ 38V
- Frequency - Switching:
- 250kHz ~ 770kHz
- Duty Cycle (Max):
- 95%
- Synchronous Rectifier:
- Yes
- Clock Sync:
- No
- Serial Interfaces:
- -
- Control Features:
- Current Limit, Enable, Frequency Control, Phase Control, Power Good, Soft Start, Tracking
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 40-QFN (6x6)
LTC3855EUJ#PBF FAQ
1.How can I place an order for LTC3855EUJ#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3855EUJ#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3855EUJ#PBF reliable?
The price and inventory of LTC3855EUJ#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3855EUJ#PBF is usually 5 days.
3.What payment methods are accepted for LTC3855EUJ#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3855EUJ#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3855EUJ#PBF?
LTC3855EUJ#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3855EUJ#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3855EUJ#PBF?
For technical support, including LTC3855EUJ#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3855EUJ#PBF requirements.
6.How does Aetrix verify that LTC3855EUJ#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3855EUJ#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3855EUJ#PBF meets industry standards.
7.What is the process for return or replacement of LTC3855EUJ#PBF?
All LTC3855EUJ#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3855EUJ#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3855EUJ#PBF part is unused and in its original packaging.
Return procedure for LTC3855EUJ#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC3855EUJ#PBF Tags
-
UCC28C45DR
Texas Instruments
-
UCC28C40DR
Texas Instruments
-
UCC28C43DR
Texas Instruments
-
ZXSC410E6TA
Diodes Incorporated
-
LM3524DMX/NOPB
Texas Instruments
-
LM3489MMX/NOPB
Texas Instruments
-
MIC2102YML-TR
Microchip Technology
-
LM5148RGYR
Texas Instruments
-
TL598CDR
Texas Instruments
-
LM5155DSSR
Texas Instruments
-
LM25085MYX/NOPB
Texas Instruments
-
UCC2813DTR-0
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
