Analog Devices Inc. LTC3861EUH-1#PBF
- Part No.:
- LTC3861EUH-1#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 32-WFQFN Exposed Pad
- Datasheet:
-
LTC3861EUH-1#PBF.pdf
- Description:
- IC REG CTRLR BUCK 32QFN
- Quantity:
- Payment:

- Shipping:

Inventory:170
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Product details
Overview
LTC3861EUH-1#PBF from Analog Devices (formerly Linear Technology) is a dual-channel, multiphase synchronous step-down voltage mode DC/DC controller designed for high-current distributed power systems. It delivers accurate current sharing across phases, supports 250kHz–2.25MHz programmable switching frequency, operates from 3V–24V input to 0.6V–(VCC–0.5V) output, and features lossless DCR current sensing with ±0.75% 0.6V reference accuracy - used in telecom power supplies and FPGA core rails.
For engineers reviewing the LTC3861EUH-1#PBF datasheet, LTC3861EUH-1#PBF pinout, LTC3861EUH-1#PBF application, or LTC3861EUH-1#PBF equivalent, key selection criteria include phase synchronization capability, remote differential voltage sense accuracy, prebiased load startup safety, and compatibility with DrMOS/power block drivers in multi-phase 12A–120A designs.
Technical Context
The LTC3861EUH-1#PBF implements constant-frequency voltage-mode control with two independent error amplifiers (COMP1/COMP2), each driving a PWM channel with line feedforward compensation via VINSNS. Its differential remote sense amplifier (VSNSP/VSNSN → VSNSOUT) provides <±2mV offset and 1.007V/V gain to reject PCB IR drop, enabling precise load-point regulation.
Current sharing is achieved through cycle-by-cycle inductor current sampling (ISNS1P/ISNS1N, ISNS2P/ISNS2N), averaging at IAVG, and master-slave integrator summation - supporting up to 12-phase operation via daisy-chained CLKOUT/PHSMD. Overcurrent protection uses 128-cycle latched shutdown with negative OC detection and automatic soft-start reset.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Range | 3V to 24V - supports wide-input industrial and telecom rails without external regulators. |
| VOUT Range | 0.6V to (VCC – 0.5V) - enables sub-1V FPGA/DSP core supplies with internal 0.6V reference. |
| Switching Frequency | 250kHz to 2.25MHz - programmable via FREQ pin resistor or external CLKIN for EMI optimization. |
| Reference Accuracy | ±0.75% at 0.6V - ensures tight output regulation across –40°C to 125°C junction temperature. |
| Current Sense Input Range | –0.3V to (VCC – 0.5V) - accommodates bidirectional DCR sensing and negative OC detection. |
| Operating Temp | –40°C to 125°C - qualified for industrial and extended-temperature embedded power systems. |
| Package | 32-pin 5mm × 5mm QFN (UH) - exposed pad (Pin 33) must be soldered to SGND for θJA = 34°C/W thermal performance. |
Pinout & Package
Package: 32-lead (5mm × 5mm) plastic QFN (UH), exposed thermal pad (Pin 33) electrically connected to SGND and requiring PCB soldering for thermal compliance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC (Pin 1) | Chip supply input | 3V–5.5V bias rail; requires local 0.1µF–1µF ceramic bypass to SGND for stable operation. |
| FB1/FB2 (Pins 2, 8) | Error amplifier inverting inputs | Connect to resistor divider from VSNSOUT or remote VOUT; bottom of divider tied to SGND for accurate feedback. |
| COMP1/COMP2 (Pins 3, 7) | Error amplifier outputs | Low-impedance op-amp outputs controlling PWM duty; cannot be directly paralleled - master/slave configuration required for multiphase. |
| VSNSP/VSNSN (Pins 6, 5) | Differential remote sense inputs | VSNSP connects to load-side VOUT; VSNSN connects to load-side SGND - rejects PCB trace resistance errors. |
| FREQ (Pin 10) | Frequency set pin | Sources 20µA; resistor to SGND sets frequency from 250kHz–2.25MHz - enables precise EMI tuning. |
| CLKIN/CLKOUT (Pins 11, 12) | Phase synchronization I/O | CLKIN accepts 250kHz–2.25MHz external clock; CLKOUT daisy-chains up to six ICs for 12-phase timing alignment. |
| ISNS1P/ISNS1N (Pins 22, 21) | Channel 1 current sense inputs | Accepts DCR voltage or sense resistor differential; enables lossless current monitoring and per-phase OC protection. |
| IAVG (Pin 28) | Average current monitor | Outputs voltage proportional to master-phase average current; requires 47pF–220pF capacitor to SGND for current sharing loop stability. |
| PGOOD1/PGOOD2 (Pins 27, 14) | Open-drain power-good indicators | Assert low after 30µs when output deviates >±10% from target - enables system-level sequencing and fault reporting. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-channel multiphase control | Supports 1-, 2-, 3-, 4-, 6-, or 12-phase configurations via daisy-chained CLKOUT/PHSMD - scales output current without redesigning magnetics. |
| Lossless DCR current sensing | Eliminates sense resistor power loss and board space; enables accurate per-phase current balancing and overcurrent protection down to milliohm-level DCR. |
| Prebiased load startup | Disables inductor current reversal during soft-start - prevents reverse current flow into precharged outputs in hot-swap or redundant power systems. |
| Differential remote voltage sense | ±2mV input offset and 40MHz unity-gain bandwidth reject PCB voltage drop - maintains ±0.75% regulation at point-of-load under dynamic load steps. |
| Programmable soft-start & tracking | TRACK/SS1/SS2 pins support both ramped startup (via internal 2.5µA charge) and ratiometric/coincident output voltage tracking - simplifies multi-rail sequencing. |
Applications
| Telecom Base Station Power | FPGA Core Supply |
|---|---|
|
Use Scenario: 48V intermediate bus converted to 1.2V/60A for ASIC/FPGA processing units in 5G radio units. IC Role / Device Role / Timing Role: Dual-phase controller managing parallel DrMOS stages (e.g., TDA21220) with synchronized CLKOUT to minimize input ripple and thermal stress. Use Value: Achieves >92% efficiency at 20A–60A load range while maintaining <±10mV output deviation during 30A/µs load transients. |
Use Scenario: Point-of-load regulator for Xilinx Versal ACAP core voltage with strict <±2% tolerance and sequencing requirements. IC Role / Device Role / Timing Role: Master-slave configured LTC3861EUH-1#PBF pair using IAVG current sharing and TRACK/SS for controlled 0.8V→1.2V ramp-up aligned with auxiliary rails. Use Value: Enables single-board 120A solution with <500ns cross-regulation response and no external level-shifting circuitry for 0.6V reference. |
| Data Center Server VRM | Industrial PLC CPU Supply |
|
Use Scenario: 12V input to 0.85V/80A CPU core supply in edge server with thermal constraints and EMI limits. IC Role / Device Role / Timing Role: 6-phase implementation using three LTC3861EUH-1#PBF controllers daisy-chained via CLKOUT/PHSMD for 30° phase shift and interleaved ripple cancellation. Use Value: Reduces input capacitor RMS current by 70% vs. single-phase, lowering temperature rise and extending capacitor lifetime. |
Use Scenario: Ruggedized 24V-to-1.0V/30A supply for ARM-based PLC main processor operating in –40°C to 85°C ambient. IC Role / Device Role / Timing Role: Independent dual-output configuration (RUN1/RUN2 separately controlled) powering CPU and DDR memory rails with individual PGOOD monitoring. Use Value: Maintains ±0.75% output accuracy across full temperature range using differential remote sense, eliminating calibration drift from PCB copper resistance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-phase synchronous buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP2940AGQ-DC | Integrated MOSFET drivers; fixed 600kHz/1MHz frequency options; no CLKIN/CLKOUT daisy-chain capability. | Targeted at cost-sensitive, lower-current (<40A) applications where phase count scalability is not required. | Select MP2940AGQ-DC for simplified layout and reduced BOM count in single- or dual-phase ≤40A designs without need for external clock sync. |
| LTC3883IUH#PBF | Digital PMBus interface; on-chip ADC for telemetry; supports 0.5V–5.5V VOUT; requires external EEPROM for configuration storage. | Used where real-time margining, fault logging, and dynamic VOUT adjustment via host microcontroller are mandatory. | Choose LTC3883IUH#PBF when digital control, telemetry, and firmware-updatable parameters outweigh analog simplicity and lower latency. |
Compared with MP2940AGQ-DC and LTC3883IUH#PBF, the LTC3861EUH-1#PBF offers superior analog transient response due to dedicated high-bandwidth error amplifiers and direct DCR sensing path, making it optimal for high-dI/dt FPGA/ASIC loads where deterministic analog loop behavior is critical.
Availability
LTC3861EUH-1#PBF is available at Aetrix Electronics and suitable for telecom base station power, FPGA core supplies, and industrial PLC CPU rails requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LTC3861EUH-1#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its high-performance power management portfolio with rigorous automotive and industrial qualification standards.
The LTC3861EUH-1#PBF belongs to the PolyPhase® synchronous buck controller family, engineered for high-current, multi-phase DC/DC conversion in telecom infrastructure, data center VRMs, and high-end computing where precision current sharing and fast transient response are essential.
FAQ
What is the maximum number of LTC3861EUH-1#PBF controllers that can be synchronized in a single system?
Up to six LTC3861EUH-1#PBF controllers can operate in parallel using CLKOUT daisy-chaining and PHSMD pin programming to achieve 1-, 2-, 3-, 4-, 6-, or 12-phase operation. Each LTC3861EUH-1#PBF contributes two phases, and CLKOUT alignment ensures precise inter-phase timing with configurable phase offsets (e.g., 120° for 3-phase, 30° for 12-phase).
Does the LTC3861EUH-1#PBF support startup into a prebiased output, and how is it implemented?
Yes, the LTC3861EUH-1#PBF safely powers prebiased loads by disabling inductor current reversal during soft-start. This is enabled by default - the controller monitors ILIM and ISNS pins to suppress negative current flow, preventing reverse energy injection into an already charged output capacitor, which is critical in hot-swap and redundant power architectures.
How does the differential remote sense amplifier in the LTC3861EUH-1#PBF improve regulation accuracy?
The LTC3861EUH-1#PBF's differential remote sense amplifier (VSNSP/VSNSN → VSNSOUT) provides <±2mV input offset and 40MHz bandwidth to measure true load voltage independent of PCB trace resistance. By referencing VSNSOUT to SGND and feeding it to FB1/FB2 via a resistor divider, the LTC3861EUH-1#PBF eliminates IR drop error - maintaining ±0.75% regulation at the load even with 50mΩ board resistance.
Can the LTC3861EUH-1#PBF be used with discrete MOSFETs instead of DrMOS or power blocks?
Yes, the LTC3861EUH-1#PBF supports discrete N-channel MOSFETs via external gate drivers (e.g., LTC4449). Its PWM1/PWM2 outputs are three-state compatible, and PWMEN1/PWMEN2 provide enable signals for non-three-state drivers. The controller's high-bandwidth error amplifiers and programmable gate drive timing ensure robust operation with discrete FETs in high-efficiency, high-current designs.
What is the function of the IAVG pin on the LTC3861EUH-1#PBF, and how is it used in multiphase current sharing?
The IAVG pin on the LTC3861EUH-1#PBF outputs a voltage proportional to the instantaneous average current of the master phase. In multiphase operation, all IAVG pins are tied together with a 100pF capacitor to SGND; each slave phase integrates the difference between its sensed current and the IAVG voltage, adjusting its COMP input to equalize per-phase currents - achieving <±3% current mismatch across phases.
LTC3861EUH-1#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- PolyPhase®
- Package/Case:
- 32-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Output Type:
- PWM Signal
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Number of Outputs:
- 2
- Output Phases:
- 2
- Voltage - Supply (Vcc/Vdd):
- 3V ~ 5.5V
- Frequency - Switching:
- 250kHz ~ 3MHz
- Duty Cycle (Max):
- 91.5%
- Synchronous Rectifier:
- No
- Clock Sync:
- No
- Serial Interfaces:
- -
- Control Features:
- Current Limit, Enable, Frequency Control, Phase Control, Power Good, Soft Start, Tracking
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-QFN (5x5)
LTC3861EUH-1#PBF FAQ
1.How can I place an order for LTC3861EUH-1#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3861EUH-1#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3861EUH-1#PBF reliable?
The price and inventory of LTC3861EUH-1#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3861EUH-1#PBF is usually 5 days.
3.What payment methods are accepted for LTC3861EUH-1#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3861EUH-1#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3861EUH-1#PBF?
LTC3861EUH-1#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3861EUH-1#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3861EUH-1#PBF?
For technical support, including LTC3861EUH-1#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3861EUH-1#PBF requirements.
6.How does Aetrix verify that LTC3861EUH-1#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3861EUH-1#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3861EUH-1#PBF meets industry standards.
7.What is the process for return or replacement of LTC3861EUH-1#PBF?
All LTC3861EUH-1#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3861EUH-1#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3861EUH-1#PBF part is unused and in its original packaging.
Return procedure for LTC3861EUH-1#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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