Analog Devices Inc. LTC3861EUHE#PBF
- Part No.:
- LTC3861EUHE#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 36-WFQFN Exposed Pad
- Datasheet:
-
LTC3861EUHE#PBF.pdf
- Description:
- IC REG CTRLR BUCK 36QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC3861EUHE#PBF from Analog Devices (formerly Linear Technology) is a dual-channel, multiphase synchronous step-down voltage mode DC/DC controller supporting up to 12-phase operation via parallel ICs, with ±0.75% 0.6V reference accuracy, 250kHz–2.25MHz programmable switching frequency, and lossless DCR current sensing for precise per-phase current sharing in high-current telecom and FPGA power supplies.
For engineers reviewing the LTC3861EUHE#PBF datasheet, LTC3861EUHE#PBF pinout, LTC3861EUHE#PBF application, or LTC3861EUHE#PBF equivalent, key selection criteria include remote differential output voltage sensing per channel, independent soft-start/tracking on both channels, VCC range of 3V–5.5V, VIN support from 3V–24V, and compatibility with DrMOS, power blocks, or discrete gate drivers.
Technical Context
The LTC3861EUHE#PBF implements constant-frequency voltage mode control with two independent high-bandwidth error amplifiers (40MHz unity-gain bandwidth, 75dB open-loop gain), each paired with a dedicated differential remote sense amplifier (±0.75mV offset over –40°C to 125°C) and programmable current limit via ILIM pins sourcing 20µA.
Its multiphase architecture supports master-slave configurations using IAVG averaging (100pF typical capacitor), phase alignment via PHSMD pin (120°/180°/240° options), and external clock synchronization (CLKIN, 250kHz–2.25MHz) or resistor-programmed frequency (RFREQ), enabling scalable high-current solutions without loop instability.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Range | 3V to 24V - supports wide-input industrial and telecom rails without pre-regulation |
| VOUT Range | 0.6V to VCC – 0.5V - enables sub-1V core supplies for modern FPGAs and ASICs |
| Switching Frequency | 250kHz to 2.25MHz - selectable via FREQ pin resistor or external CLKIN for EMI optimization |
| Reference Accuracy | ±0.75% at 0.6V - ensures tight output regulation across temperature and line variations |
| Current Sensing | Lossless DCR or precision sense resistor - eliminates shunt power loss while maintaining ±1.25mV input-referred offset |
| Operating Temp | –40°C to 125°C junction - qualified for industrial and extended-temperature embedded systems |
| Package | 36-pin 5mm × 6mm QFN (UHE) - exposed pad for thermal management in high-power density layouts |
Pinout & Package
36-pin 5mm × 6mm plastic QFN (UHE package) with exposed SGND pad (Pin 37) requiring PCB soldering for thermal performance and signal integrity. Pin functions validated per Linear Technology LTC3861 datasheet Rev. FB.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| FB1, FB2 (Pins 1, 10) | Error amplifier inverting input | Connects to VSNSOUTx for remote feedback; tying to VCC disables respective channel's error amp |
| VSNSP1/VSNSN1, VSNSP2/VSNSN2 (Pins 3–4, 7–8) | Differential remote sense inputs | VSNSP connects to output divider midpoint; VSNSN to load ground - cancels ground path errors |
| ISNS1P/ISNS1N, ISNS2P/ISNS2N (Pins 22, 24–25, 23) | Current sense amplifier inputs | Supports DCR sensing or external resistor; ±1.25mV offset ensures accurate per-phase current measurement |
| ILIM1, ILIM2 (Pins 20, 27) | Overcurrent threshold set | 20µA current source - resistor to SGND sets OC trip point (e.g., 1.2V = 24mV sense threshold) |
| RUN1, RUN2 (Pins 19, 28) | Channel enable control | 2.25V threshold with 1.5µA pull-up - allows independent channel sequencing and fault shutdown |
| TRACK/SS1, TRACK/SS2 (Pins 11, 35) | Soft-start and tracking input | 2.5µA internal current source - capacitor sets ramp time; resistor divider enables ratiometric or coincident output tracking |
| IAVG (Pin 32) | Average current bus | Outputs voltage proportional to master phase current - must be tied together across paralleled ICs for current sharing |
| PHSMD (Pin 15) | Phase relationship control | Selects 120°/180°/240° between CH1–CH2 and CH1–CLKOUT - enables optimal interleaving in >2-phase systems |
Key Features
| Feature | Design Value |
|---|---|
| Dual differential remote sense amplifiers | Each channel independently regulates output voltage at load point, eliminating PCB trace IR drop errors |
| Programmable current limit per phase | Resistor-set threshold with 20µA source enables precise overcurrent protection matching MOSFET SOA |
| Prebiased load startup | Inductor current reversal disabled during soft-start - prevents reverse current flow into precharged outputs |
| Line feedforward compensation | VINSNS pin modulates PWM ramp in real time - reduces line transient overshoot by >50% vs. standard voltage mode |
| 128-cycle overcurrent lockout | Three-states PWM after sustained fault, then auto-retries after 32768 cycles - prevents thermal runaway during shorts |
Applications
| Telecom Base Station Power | FPGA Core Supply |
|---|---|
Use Scenario: 48V intermediate bus converted to 1.2V/60A for multi-die FPGA in 5G radio unit. IC Role / Device Role / Timing Role: Dual-phase controller managing two 30A phases with current sharing, synchronized to system clock via CLKIN. Use Value: Achieves <1% output deviation under 30A step load (50µs response) and 94% peak efficiency at 12VIN, leveraging DCR sensing to eliminate 2W+ shunt losses. | Use Scenario: Sequenced 0.85V/40A core and 1.8V/15A auxiliary rails for Xilinx Versal ACAP with ratiometric tracking. IC Role / Device Role / Timing Role: LTC3861EUHE#PBF controls core rail; TRACK/SS2 driven by resistor-divided 1.8V rail to enforce 0.85V/1.8V startup ratio. Use Value: Ensures safe power-on sequencing without external supervisors; ±0.75% reference holds 0.85V within ±6.4mV across temperature. |
| Data Center ASIC Supply | Industrial Motor Control Logic |
Use Scenario: 12V input stepped down to 0.65V/80A for AI accelerator ASIC using six paralleled LTC3861 controllers (12-phase). IC Role / Device Role / Timing Role: Master-slave configuration with shared IAVG bus and PHSMD-aligned 30° phase offsets across all 12 phases. Use Value: Reduces input/output ripple by 85% vs. single-phase, enabling smaller bulk capacitors and meeting strict 10mV pk-pk noise spec. | Use Scenario: 24V industrial bus powering 3.3V/2A logic and isolated 15V gate drive for IGBT modules. IC Role / Device Role / Timing Role: Independent dual-channel operation: Channel 1 regulates 3.3V logic rail; Channel 2 powers isolated DC/DC bias supply. Use Value: Eliminates need for separate controllers; RUN1/RUN2 allow staggered startup to limit inrush, while PGOOD1/PGOOD2 provide independent fault signaling. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel multiphase controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP2940AGQ-DC | Integrated MOSFET drivers; no external gate driver required; fixed 600kHz–1.2MHz frequency range | Targeted at space-constrained consumer applications; lacks dual differential remote sense and IAVG current sharing bus | Select MP2940AGQ-DC when board area is critical and external drivers are undesirable, but accept reduced flexibility in current sharing and sensing topology |
| LTC3883IUH#PBF | Digital PMBus interface; integrated ADCs and EEPROM; supports closed-loop margining and telemetry | Requires PMBus host and firmware integration; higher BOM cost; not pin-compatible | Select LTC3883IUH#PBF when digital monitoring, fault logging, or dynamic voltage scaling are required - not for analog-only designs |
Compared with MP2940AGQ-DC and LTC3883IUH#PBF, the LTC3861EUHE#PBF delivers superior analog precision (±0.75% reference, 40MHz EA bandwidth) and hardware-based current sharing without software overhead, making it optimal for high-reliability industrial and telecom systems where deterministic analog control is prioritized over digital configurability.
Availability
LTC3861EUHE#PBF is available at Aetrix Electronics and suitable for telecom base station power, FPGA core supplies, data center ASIC rails, and industrial motor control logic requiring stable component supply and long-term lifecycle support.
Supply support for LTC3861EUHE#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its high-performance power management portfolio with rigorous automotive and industrial qualification standards.
The LTC3861EUHE#PBF belongs to Linear's PolyPhase® controller family, engineered specifically for high-current, low-voltage DC/DC conversion in distributed power architectures where phase interleaving, current balance, and fast transient response are critical.
FAQ
What is the maximum number of phases supported by the LTC3861EUHE#PBF?
The LTC3861EUHE#PBF itself is a dual-phase controller, but up to six LTC3861EUHE#PBF ICs can be paralleled to achieve 1-, 2-, 3-, 4-, 6-, or 12-phase operation. Phase alignment is controlled via the PHSMD pin and CLKOUT daisy-chaining, enabling precise interleaving without external timing circuitry. This scalability makes the LTC3861EUHE#PBF suitable for high-current applications like AI accelerators and 5G baseband units.
How does the LTC3861EUHE#PBF handle prebiased output conditions during startup?
The LTC3861EUHE#PBF disables inductor current reversal during soft-start by default, allowing safe startup into precharged outputs without reverse current flow. This behavior is inherent to the controller's architecture and requires no external components. The TRACK/SS pins control the soft-start ramp, and the internal 2.5µA current source charges the external capacitor to linearly ramp the reference voltage, ensuring monotonic output rise even with significant prebias.
Can the LTC3861EUHE#PBF operate with only one channel active?
Yes, the LTC3861EUHE#PBF supports independent single-channel operation. To disable Channel 2, tie FB2 to VCC - this three-states COMP2 and disables its error amplifier and PWM outputs. RUN2 can be held low to fully shut down the second channel. The remaining Channel 1 operates identically to a single-phase controller, retaining full functionality including remote sensing, current limiting, and soft-start. This flexibility simplifies design reuse across varying power requirements.
What is the purpose of the IAVG pin on the LTC3861EUHE#PBF, and how must it be configured in multiphase systems?
The IAVG pin on the LTC3861EUHE#PBF outputs a voltage proportional to the instantaneous average current of the master phase. In multiphase systems, all IAVG pins from paralleled LTC3861EUHE#PBF ICs must be tied together with a total capacitance of 47pF–220pF (100pF typical) to SGND. This shared bus enables the current sharing loop: each slave phase compares its sensed current to the master's average and adjusts duty cycle accordingly. If channels operate independently, IAVG must be tied to SGND to prevent interference.
Does the LTC3861EUHE#PBF support external clock synchronization, and what are the valid frequency ranges?
Yes, the LTC3861EUHE#PBF supports external clock synchronization via the CLKIN pin, accepting input frequencies from 250kHz to 2.25MHz. The rising edge of CLKIN aligns with the rising edge of PWM1 in closed-loop operation. When CLKIN is active, the internal oscillator is disabled, and the switching frequency locks precisely to the external clock. This capability enables EMI reduction through frequency dithering or synchronization to system clocks in multi-rail power domains.
LTC3861EUHE#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- PolyPhase®
- Package/Case:
- 36-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Output Type:
- PWM Signal
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Number of Outputs:
- 2
- Output Phases:
- 2
- Voltage - Supply (Vcc/Vdd):
- 3V ~ 5.5V
- Frequency - Switching:
- 250kHz ~ 3MHz
- Duty Cycle (Max):
- 91.5%
- Synchronous Rectifier:
- No
- Clock Sync:
- No
- Serial Interfaces:
- -
- Control Features:
- Current Limit, Enable, Frequency Control, Phase Control, Power Good, Soft Start, Tracking
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 36-QFN (5x6)
LTC3861EUHE#PBF FAQ
1.How can I place an order for LTC3861EUHE#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3861EUHE#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3861EUHE#PBF reliable?
The price and inventory of LTC3861EUHE#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3861EUHE#PBF is usually 5 days.
3.What payment methods are accepted for LTC3861EUHE#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3861EUHE#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3861EUHE#PBF?
LTC3861EUHE#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3861EUHE#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3861EUHE#PBF?
For technical support, including LTC3861EUHE#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3861EUHE#PBF requirements.
6.How does Aetrix verify that LTC3861EUHE#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3861EUHE#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3861EUHE#PBF meets industry standards.
7.What is the process for return or replacement of LTC3861EUHE#PBF?
All LTC3861EUHE#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3861EUHE#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3861EUHE#PBF part is unused and in its original packaging.
Return procedure for LTC3861EUHE#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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