Analog Devices Inc. LTC3862EUH-2#PBF

Overview

LTC3862EUH-2#PBF from Analog Devices (formerly Linear Technology) is a two-phase, constant-frequency, peak current mode boost/SEPIC DC/DC controller driving external N-channel MOSFETs for high-voltage step-up conversion. It operates from 5.5V to 36V input, delivers up to 80V output, supports 75kHz–500kHz programmable switching frequency, and features 180° phase-shifted dual channels to reduce input/output ripple. It is used in telecom power supplies requiring high efficiency and low EMI at 7A output current.

For engineers reviewing the LTC3862EUH-2#PBF datasheet, LTC3862EUH-2#PBF pinout, LTC3862EUH-2#PBF application, or LTC3862EUH-2#PBF equivalent, key selection criteria include its 24-pin 5mm × 5mm QFN package with exposed PGND pad, ±1% reference accuracy, 96% max duty cycle, internal 10V/3.8V dual LDOs, and multi-phase synchronization via SYNC/CLKOUT/PHASEMODE pins.

Technical Context

The LTC3862EUH-2#PBF implements fixed-frequency peak current mode control with two independent, 180° out-of-phase channels - each using an internal current comparator referenced to ITH voltage and slope-compensated via SLOPE pin. Its dual cascaded LDO architecture powers gate drivers (INTVCC = 10V) and analog/digital circuitry (3V8 = 3.8V), with UVLO thresholds of 4.4V (rising) and 3.9V (falling) on INTVCC.

Phase relationships are programmable via PHASEMODE (0V/float/3V8 sets CH1–CH2 at 180°/180°/120° and CH1–CLKOUT at 90°/60°/240°), while DMAX pin selects max duty cycle (96%/84%/75%). The internal PLL enables synchronization to external clocks from 50kHz to 650kHz, and FREQ pin sets oscillator frequency with a single resistor.

Key Specifications

Pinout & Package

Package: 24-pin (5mm × 5mm) plastic QFN (UH), thermally enhanced with exposed PGND pad (Pin 25) soldered to PCB ground for electrical and thermal performance. θJA = 44°C/W.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar boost/SEPIC controller applications.

Compared with LTC3862IGU-2#PBF, the LTC3862EUH-2#PBF offers identical electrical performance at lower cost and smaller footprint but lacks extended temperature rating; compared with LT8330EDD#PBF, it provides higher power scalability, superior EMI control via interleaving, and flexible external MOSFET selection - essential for >30W telecom or industrial designs.

Availability

LTC3862EUH-2#PBF is available at Aetrix Electronics and suitable for telecom power supplies, industrial high-voltage bias generators, and automotive ADAS camera modules requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for LTC3862EUH-2#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and power management semiconductors, serving precision instrumentation, communications, and industrial markets.

The LTC3862 product line was designed specifically for high-efficiency, multi-phase step-up DC/DC conversion in space- and thermal-constrained telecom and industrial systems - emphasizing low quiescent current, precise current sensing, and robust synchronization.

FAQ

What is the maximum output voltage achievable with the LTC3862EUH-2#PBF in boost configuration?

The LTC3862EUH-2#PBF itself does not impose a hard upper limit on output voltage; instead, it depends on external component ratings. In typical published applications, the LTC3862EUH-2#PBF achieves stable 80V output with appropriate MOSFETs (e.g., 100V+ VDS), diodes, and output capacitors. The controller's 96% max duty cycle and 36V max VIN enable high step-up ratios - for example, 12V input to 80V output - provided layout, thermal, and component derating guidelines are followed.

Does the LTC3862EUH-2#PBF support SEPIC topology, and what modifications are required?

Yes, the LTC3862EUH-2#PBF supports SEPIC operation using the same two-phase current-mode architecture. No IC-level modification is needed - only changes to the external power stage: replace the boost diode with a coupling capacitor, add a second inductor, and configure both channels in SEPIC mode with shared output. The datasheet provides a verified 12V-to-24V SEPIC reference design (LTC38622 TA01a), confirming full compatibility and stable regulation under varying load and line conditions.

How does the PHASEMODE pin affect timing relationships in multi-phase systems using the LTC3862EUH-2#PBF?

The PHASEMODE pin on the LTC3862EUH-2#PBF directly configures phase alignment: at 0V or float, CH1 and CH2 operate 180° apart with CH1–CLKOUT at 90°; at 3V8, CH1–CH2 shifts to 120° and CH1–CLKOUT to 240°. This enables seamless scaling from 2-phase (two ICs) to 12-phase (six ICs) by daisy-chaining CLKOUT→SYNC, with each subsequent IC offset by the programmed phase angle - ensuring balanced current sharing and minimized input ripple without external timing controllers.

What is the purpose of the 3V8 pin on the LTC3862EUH-2#PBF, and can it power external circuitry?

The 3V8 pin on the LTC3862EUH-2#PBF is the output of an internal 3.8V LDO powered from INTVCC, dedicated exclusively to powering the IC's internal analog and digital blocks (error amplifier, comparators, logic). It must be bypassed with a 1nF ceramic capacitor to SGND. It is not rated for external loads - attempting to draw current risks reference instability, increased noise, and degraded regulation accuracy. External circuits requiring 3.3V or 3.8V should use a separate regulator.

Can the LTC3862EUH-2#PBF be synchronized to an external clock, and what is the valid frequency range?

Yes, the LTC3862EUH-2#PBF supports external synchronization via its SYNC pin, accepting TTL/CMOS-compatible clock signals from 50kHz to 650kHz. The internal PLL locks to the external clock's rising edge, aligning GATE1's switching edge precisely. This enables EMI reduction through frequency spreading, coordinated switching in multi-rail systems, and deterministic timing in time-sensitive applications - all without modifying the FREQ resistor or affecting internal loop stability.