Analog Devices Inc. LTC3865IFE#TRPBF
- Part No.:
- LTC3865IFE#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 38-TFSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
LTC3865IFE#TRPBF.pdf
- Description:
- IC REG CTRLR BUCK 38TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC3865IFE#TRPBF from Analog Devices (formerly Linear Technology) is a dual, 2-phase synchronous step-down DC/DC controller driving all-N-channel MOSFET stages. It delivers precise dual-output regulation (e.g., 1.5V/15A and 1.2V/15A), supports 4.5V–38V input, operates up to 770kHz with phase-lock capability, and features independent track/soft-start, OPTI-LOOP® compensation, and RSENSE/DCR current sensing - used in high-efficiency server and telecom power distribution systems.
For engineers reviewing the LTC3865IFE#TRPBF datasheet, LTC3865IFE#TRPBF pinout, LTC3865IFE#TRPBF application, or LTC3865IFE#TRPBF equivalent, key selection criteria include dual 180° phased operation, VID-programmable output voltages (0.6V–5V), adjustable current limit via ILIM pin, burst/continuous/pulse-skip mode selection, and thermal performance in the 38-lead TSSOP package with exposed pad.
Technical Context
The LTC3865IFE#TRPBF implements a constant-frequency current-mode control architecture with two independent 180° out-of-phase channels, enabling interleaved operation that reduces input/output ripple and improves thermal distribution. Each channel uses an error amplifier (EA) with transconductance gm = 2.2 mmho and ITH-based peak current control, supporting both RSENSE and DCR sensing with programmable sense thresholds (22–84 mV).
It integrates OPTI-LOOP® compensation for stable transient response across wide output capacitance/ESR ranges, selectable operating modes (Burst Mode®, pulse-skipping, forced continuous) via MODE/PLLIN, and independent soft-start/tracking via TK/SS1/TK/SS2 pins with 1.3 μA internal charge current. The device includes output overvoltage protection, reverse current limiting, and dual PGOOD outputs with ±10% trip threshold.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5V to 38V - supports wide industrial and telecom input rails without external pre-regulation. |
| Output Voltage Range | 0.6V to 5.0V - set precisely via 2-pin VID strapping or external resistors per channel. |
| Switching Frequency | 250kHz to 770kHz - adjustable via FREQ pin current (7.5μA) and external resistor; phase-lockable. |
| Current Sense Threshold | 22–84 mV (I-grade) - selectable via ILIM pin (GND/FLOAT/INTVCC) to match MOSFET RDS(on) or sense resistor. |
| Efficiency | Up to 95% - achieved via dual N-MOSFET synchronous drive, low-loss gate drivers (TG RUP = 2.6Ω, BG RDOWN = 1.4Ω), and optimized light-load modes. |
| Operating Temperature | –40°C to +125°C - fully specified for industrial and embedded applications with thermal derating guidance. |
| Package | 38-lead TSSOP with exposed pad - θJA = 25°C/W; requires soldered SGND pad for thermal and signal integrity. |
Pinout & Package
Package: 38-lead plastic TSSOP (FE) with exposed thermal pad (Pin 39 = SGND), rated for –40°C to +125°C junction temperature and θJA = 25°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RUN1, RUN2 (Pins 1, 17) | Independent enable inputs | Each channel disabled when voltage <1.22V; internal 1μA pull-up enables startup; supports sequencing. |
| TK/SS1, TK/SS2 (Pins 6, 12) | Soft-start and tracking inputs | Internal 1.3μA current ramps external capacitor; enables voltage ramp or master-slave tracking. |
| VID11, VID12, VID21, VID22 (Pins 9, 10, 18, 37) | Output voltage programming inputs | Set VOUT1/VOUT2 to 9 standard levels (0.6V–5.0V) by tying to GND, INTVCC, or floating. |
| ILIM (Pin 19) | Current limit range select | Selects max sense threshold: 22mV (GND), 50mV (FLOAT), or 84mV (INTVCC) - critical for MOSFET SOA. |
| PGOOD1, PGOOD2 (Pins 21, 20) | Dual open-drain power-good indicators | Assert low when respective VOUT deviates >±10%; 20μs blanking prevents false triggers during transients. |
| MODE/PLLIN (Pin 36) | Mode selection & sync input | SGND = forced continuous; INTVCC = pulse-skip; float = Burst Mode®; external clock = PLL sync. |
| FREQ (Pin 38) | Oscillator frequency set | 7.5μA sink current; external resistor sets fSW from 250kHz to 770kHz with ±10% tolerance. |
| SENSE1+/SENSE1−, SENSE2+/SENSE2− (Pins 2,3,15,16) | Differential current sense inputs | Accept DCR network or sense resistor signals; ±1μA input bias enables accurate low-side sensing. |
Key Features
| Feature | Design Value |
|---|---|
| Dual 180° phased controllers | Reduces input RMS current by ~30% and output voltage ripple amplitude by ~70% vs single-phase design. |
| OPTI-LOOP® compensation | Enables stable loop response with ceramic output capacitors (10–1000μF) and ESR from 0.5mΩ to 50mΩ. |
| Independent track/soft-start | Supports staggered startup or precise voltage ramping (e.g., FPGA core/I/O rail sequencing) without external circuitry. |
| Adjustable current foldback | Prevents MOSFET thermal runaway during short-circuit by reducing peak current as VOUT drops below regulation. |
| Output overvoltage protection | Shuts down top MOSFET if VOSENSE exceeds regulated value by >+12.5%, protecting downstream loads. |
Applications
| Server VRM Power Delivery | Telecom Line Card Supplies |
|---|---|
Use Scenario: Dual-rail power for CPU/GPU cores (e.g., 1.2V/15A) and memory I/O (e.g., 1.5V/15A) on dense server motherboards. IC Role / Device Role / Timing Role: Dual-phase synchronous buck controller managing interleaved switching, current sharing, and precise voltage regulation. Use Value: Achieves >94% efficiency at full load while minimizing input capacitor count and PCB area via 180° phase shift. | Use Scenario: Distributed 3.3V and 1.8V supplies on telecom line cards with strict EMI and thermal constraints. IC Role / Device Role / Timing Role: Primary DC/DC controller providing isolated, sequenced, and monitored outputs with PGOOD signaling to system management ASIC. Use Value: Enables compliance with EN55022 Class B EMI limits through fixed-frequency operation and controlled slew rates (25ns TG/BG transitions). |
| Industrial PLC CPU Modules | FPGA Power Management |
Use Scenario: High-reliability 5V and 3.3V rails powering ARM-based PLC processors and real-time I/O interfaces. IC Role / Device Role / Timing Role: Dual-output controller with independent RUN/TK-SS pins enabling safe power-up/down sequencing and fault isolation. Use Value: Supports extended temperature operation (–40°C to +125°C) and withstands 38V transients per MIL-STD-1275E. | Use Scenario: Core (0.85V) and auxiliary (1.2V) supplies for Xilinx Kintex Ultrascale+ FPGAs requiring tight voltage accuracy and fast transient response. IC Role / Device Role / Timing Role: Precision voltage regulator using VID strapping and OPTI-LOOP® to maintain ±0.5% regulation under 10A/μs load steps. Use Value: Delivers sub-100mV droop during 10A load steps via fast current-mode control and 770kHz switching. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-phase synchronous buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP8770GL-10-Z (Monolithic Power) | Integrated power stage (MOSFETs + driver); lower max input (28V); no VID programming; single PGOOD. | Best for space-constrained designs where board area > efficiency optimization; lacks dual independent PGOOD. | Select when simplifying layout is prioritized over maximum flexibility in voltage programming and fault monitoring. |
| TPS546D24RQFT (Texas Instruments) | Single-chip PMBus-enabled controller; supports 0.5V–3.3V outputs; higher integration (internal LDO, ADC); 40-pin QFN only. | Required where digital telemetry, margining, or dynamic voltage scaling via PMBus is needed - not supported by LTC3865IFE#TRPBF. | Choose when system-level power management and firmware-controlled configuration outweigh analog simplicity and wide VIN range. |
Compared with MP8770GL-10-Z and TPS546D24RQFT, the LTC3865IFE#TRPBF offers superior input voltage range (4.5–38V), discrete MOSFET flexibility, VID-based analog voltage selection, and dual independent PGOOD outputs - making it optimal for high-reliability, thermally demanding, and analog-sequencing-focused designs.
Availability
LTC3865IFE#TRPBF is available at Aetrix Electronics and suitable for server VRM power delivery, telecom line card supplies, and industrial PLC CPU modules requiring stable component supply, long-term lifecycle support, and guaranteed industrial temperature grade (–40°C to +125°C).
Supply support for LTC3865IFE#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and power management semiconductors.
The LTC3865IFE#TRPBF belongs to Linear's high-efficiency DC/DC controller product line, designed specifically for demanding multi-rail, high-current power conversion in datacenter, telecom, and industrial infrastructure equipment.
FAQ
What is the maximum switching frequency supported by the LTC3865IFE#TRPBF?
The LTC3865IFE#TRPBF supports a phase-lockable switching frequency up to 770kHz, set via the FREQ pin's 7.5μA sink current and an external resistor. At RFREQ = 0Ω, minimum frequency is 250kHz; at RFREQ ≥ 325kΩ, maximum is 770kHz. This range enables optimization of efficiency, size, and EMI in high-density power designs.
Does the LTC3865IFE#TRPBF support both RSENSE and DCR current sensing?
Yes, the LTC3865IFE#TRPBF supports both RSENSE and DCR current sensing through its differential SENSE1+/SENSE1− and SENSE2+/SENSE2− inputs. Input bias current is ±1μA, enabling accurate low-side sensing with minimal offset. The ILIM pin further allows threshold adjustment (22–84 mV) to match either sensing method's signal level.
How does the LTC3865IFE#TRPBF implement output voltage tracking during startup?
The LTC3865IFE#TRPBF implements output voltage tracking via the TK/SS1 and TK/SS2 pins. When configured as slave, a resistor divider from a master supply is applied to the slave's TK/SS pin, causing its output to ramp proportionally. An internal 1.3μA current charges external soft-start capacitors for linear ramping - enabling precise FPGA or processor core/I/O rail sequencing without external ICs.
What is the function of the ILIM pin on the LTC3865IFE#TRPBF?
The ILIM pin on the LTC3865IFE#TRPBF selects the maximum current sense threshold for each channel: tied to GND = 22mV, FLOAT = 50mV, or INTVCC = 84mV (I-grade). This directly scales the peak inductor current limit, allowing optimization for MOSFET RDS(on), sense resistor value, and short-circuit protection behavior - critical for SOA compliance.
Can the LTC3865IFE#TRPBF operate with only one channel enabled?
Yes, the LTC3865IFE#TRPBF supports independent channel control via RUN1 and RUN2 pins. Pulling RUN1 low disables Channel 1 while Channel 2 remains active, and vice versa. Both channels can be sequenced, fault-isolated, or operated asymmetrically - useful for partial-load operation or staged power-up in multi-rail systems.
LTC3865IFE#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 38-TFSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Number of Outputs:
- 2
- Output Phases:
- 2
- Voltage - Supply (Vcc/Vdd):
- 4.5V ~ 38V
- Frequency - Switching:
- 250kHz ~ 770kHz
- Duty Cycle (Max):
- 95%
- Synchronous Rectifier:
- Yes
- Clock Sync:
- No
- Serial Interfaces:
- -
- Control Features:
- Current Limit, Enable, Frequency Control, Power Good, Soft Start, Tracking
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 38-TSSOP-EP
LTC3865IFE#TRPBF FAQ
1.How can I place an order for LTC3865IFE#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3865IFE#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3865IFE#TRPBF reliable?
The price and inventory of LTC3865IFE#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3865IFE#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC3865IFE#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3865IFE#TRPBF transactions.
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4.How is shipping managed for LTC3865IFE#TRPBF?
LTC3865IFE#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3865IFE#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3865IFE#TRPBF?
For technical support, including LTC3865IFE#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3865IFE#TRPBF requirements.
6.How does Aetrix verify that LTC3865IFE#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC3865IFE#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3865IFE#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC3865IFE#TRPBF?
All LTC3865IFE#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3865IFE#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3865IFE#TRPBF part is unused and in its original packaging.
Return procedure for LTC3865IFE#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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