Analog Devices Inc. LTC3870IUF-1#PBF

Overview

LTC3870IUF-1#PBF from Analog Devices (formerly Linear Technology) is a PolyPhase® step-down slave controller designed for multiphase DC/DC conversion with the LTC3887-1 master controller. It delivers precise per-phase current regulation, supports 2-phase to 6-phase cascaded operation, operates across 4.5V–60V input, provides 0.5V–14V output voltage control via master feedback, and enables accurate inter-chip current sharing in high-current telecom and industrial power supplies.

For engineers reviewing the LTC3870IUF-1#PBF datasheet, LTC3870IUF-1#PBF pinout, LTC3870IUF-1#PBF application, or LTC3870IUF-1#PBF equivalent, key selection criteria include its dual-channel peak current mode architecture, programmable CCM/DCM operation via MODE pins, phase-shift control via PHASMD, ILIM-selectable current sense thresholds (50mV/75mV), and seamless synchronization with LTC3887-1 over 100kHz–1MHz SYNC range.

Technical Context

The LTC3870IUF-1#PBF implements a constant-frequency, peak current mode control architecture with two independent PWM channels (PWM0/PWM1), each driven by dedicated current comparators (ICMP) referenced to ITH0/ITH1 voltages supplied by the master controller. It does not regulate output voltage directly-voltage loop closure and setpoint are handled exclusively by the LTC3887-1 master.

Its internal PLL synchronizes switching to an external SYNC signal (100kHz–1MHz), while PHASMD sets relative channel phase offsets (0°–300° in 60° increments). Current limit range (low/high) is selected via ILIM pin voltage (GND/INTVCC/1/3/2/3 INTVCC), and MODE0/MODE1 pins configure forced CCM or DCM per channel with internal 500kΩ pull-downs.

Key Specifications

Pinout & Package

Package: 24-lead (4mm × 4mm) plastic QFN with exposed pad (Pin 25), rated for –40°C to +125°C operating junction temperature. Exposed pad must be soldered to PCB ground for thermal and electrical integrity.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar multiphase slave controller applications.

Compared with ISL68220IRAZ-T7A and TPS53679RSAT, the LTC3870IUF-1#PBF uniquely preserves analog ITH-based current mirroring with the LTC3887-1, offers four-phase offset states via PHASMD, and supports EXTVCC for thermal optimization-making it the only drop-in slave for existing Linear/Analog multiphase designs requiring pin-level compatibility and analog interoperability.

Availability

LTC3870IUF-1#PBF is available at Aetrix Electronics and suitable for telecom base station power, industrial PLC CPU core supplies, and high-density server VR13/VR14 compliance applications requiring stable component supply across extended temperature and long production lifecycles.

Supply support for LTC3870IUF-1#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices acquired Linear Technology in 2017 and maintains full product support, documentation, and manufacturing continuity for all Linear-branded power ICs.

The LTC3870IUF-1#PBF belongs to the PolyPhase® multiphase controller family, engineered specifically to extend digital power system management architectures by adding synchronized, current-mirrored slave channels without compromising analog control fidelity or thermal efficiency.

FAQ

What is the primary function of the LTC3870IUF-1#PBF in a power system?

The LTC3870IUF-1#PBF functions exclusively as a slave controller in multiphase DC/DC converters, working in tandem with the LTC3887-1 master. It does not regulate output voltage directly; instead, it precisely mirrors the master's ITH voltage to enforce per-phase current sharing across multiple power stages. Its role is current balancing-not voltage regulation-making it essential for high-current, low-voltage applications like CPU and ASIC core supplies where thermal and layout symmetry are critical.

How does the PHASMD pin affect timing in the LTC3870IUF-1#PBF?

The PHASMD pin on the LTC3870IUF-1#PBF selects one of four discrete phase relationships between the SYNC clock's falling edge and the rising edges of PWM0/PWM1. With PHASMD tied to GND, PWM0 leads by 180° and PWM1 aligns with SYNC (0°); at INTVCC, PWM0 leads by 90° and PWM1 by 270°. This programmable offset reduces input capacitor RMS current and improves thermal distribution-critical for achieving >93% efficiency in 4-phase 12V-input systems using the LTC3870IUF-1#PBF.

Can the LTC3870IUF-1#PBF operate without an LTC3887-1 master controller?

No-the LTC3870IUF-1#PBF cannot operate autonomously. It lacks voltage feedback, error amplification, and PWM frequency generation circuitry. All critical control signals-including ITH0/ITH1 (current threshold), RUN0/RUN1 (enable), FAULT0/FAULT1 (fault response), and SYNC (clock)-must be driven by a compatible master such as the LTC3887-1. Attempting standalone operation results in undefined behavior, unregulated output, and potential damage due to uncontrolled gate drive.

What are the consequences of mismatching ILIM settings between LTC3870IUF-1#PBF and LTC3887-1?

Mismatched ILIM settings between the LTC3870IUF-1#PBF and LTC3887-1 cause asymmetric current limiting: if the slave is set to high range (75mV) while the master uses low range (50mV), the slave will allow higher peak currents before tripping, leading to overcurrent stress on slave MOSFETs and degraded current sharing accuracy. The LTC3870IUF-1#PBF datasheet explicitly requires ILIM voltage to match bit 7 of the MFR_PWM_MODE_3887-1 register to ensure coordinated protection and ±2% inter-phase current balance.

Why is EXTVCC recommended for VIN >15V in the LTC3870IUF-1#PBF?

When VIN exceeds 15V, powering INTVCC directly from VIN causes excessive power dissipation in the internal PMOS LDO, raising junction temperature and risking thermal shutdown. The LTC3870IUF-1#PBF's EXTVCC pin enables an alternate 5V LDO path-activated when EXTVCC >4.8V and VIN >6.5V-which draws bias power from a more efficient system rail (e.g., +5V or +12V). This reduces die temperature by up to 22°C in 48V-input telecom applications, preserving reliability and enabling full 125°C operation.