Analog Devices Inc. LTC3884ERHE#PBF
- Part No.:
- LTC3884ERHE#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 48-WFQFN Exposed Pad
- Datasheet:
-
LTC3884ERHE#PBF.pdf
- Description:
- IC REG CTRLR BUCK PMBUS 48QFN
- Quantity:
- Payment:

- Shipping:

Inventory:104
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC3884ERHE#PBF from Analog Devices is a dual-output PolyPhase synchronous step-down DC/DC controller with PMBus-compliant digital power system management, integrated N-channel MOSFET gate drivers, sub-milliohm DCR current sensing, ±0.5% output voltage accuracy over temperature, and 4.5V to 38V input range - deployed in telecom point-of-load and industrial power systems requiring precise telemetry and sequencing.
For engineers reviewing the LTC3884ERHE#PBF datasheet, LTC3884ERHE#PBF pinout, LTC3884ERHE#PBF application, or LTC3884ERHE#PBF equivalent, this page delivers verified package mapping (48-lead 5mm × 6mm GQFN), confirmed pin functions including ITH0/ITH1 for loop compensation, VSENSE0+/VSENSE1− for precision voltage feedback, and FAULT0/FAULT1 for independent fault reporting - all validated against Rev. G datasheet and Analog Devices official documentation.
Technical Context
The LTC3884ERHE#PBF implements a constant-frequency current-mode control architecture optimized for sub-milliohm DCR sensing via dedicated ISENSE0±/ISENSE1± inputs and programmable gain amplifiers. It supports up to six-phase PolyPhase® current sharing using SHARE_CLK synchronization and includes internal EEPROM with ECC for fault logging and configuration storage.
Digital loop compensation is implemented through MFR_PWM_COMP register programming (5-bit RTH and 3-bit gm resolution), enabling real-time tuning without external components. The device features dual independent PWM channels with integrated gate drivers (TG0/TG1, BG0/BG1), each supporting minimum on-time of 60ns and 30ns rise/fall times into 3300pF loads.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5V to 38V - supports wide-input industrial and telecom rails without external pre-regulation |
| Output Voltage Accuracy | ±0.5% over –40°C to +125°C - enables tight regulation for FPGA and ASIC core supplies |
| DCR Sensing Threshold | Sub-milliohm capable - allows use of low-resistance inductors (e.g., 0.32mΩ) for high-efficiency, high-current designs |
| Gate Driver RDS(ON) | TG high-side: 2.6Ω, BG low-side: 1.1Ω - drives standard N-channel MOSFETs with minimal conduction loss |
| PMBus Interface | Compliant with SMBus 2.0 and PMBus 1.3 - enables telemetry read-back of VIN, IIN, VOUT, IOUT, temperature, and faults |
| EEPROM Retention | 10 years at TJ < 125°C with ECC - ensures reliable storage of configuration, margining, and fault logs across product lifetime |
| Minimum On-Time | 60ns - supports high switching frequencies (up to 1MHz) and high VIN/VOUT ratios (e.g., 12V → 1.8V) |
Pinout & Package
Package: 48-lead (5mm × 6mm) plastic GQFN with exposed SGND pad (Pin 49), θJA = 31°C/W, rated for –40°C to +125°C junction temperature.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PGOOD0 / PGOOD1 | Open-drain power-good indicator | Asserts low when respective output is within ±7.5% of programmed VOUT - enables safe sequencing and system enable logic |
| VSENSE0+ / VSENSE0− VSENSE1+ / VSENSE1− | Differential output voltage sense inputs | High-impedance (50kΩ) Kelvin sensing path with ±0.5% accuracy - rejects PCB trace IR drop for precision regulation |
| ISENSE0+ / ISENSE0− ISENSE1+ / ISENSE1− | Differential current sense inputs | Supports sub-milliohm DCR sensing with programmable gain; zero-code offset ±50µV ensures accuracy at light load |
| TG0 / TG1 BG0 / BG1 | Integrated gate drivers | Drive external N-channel MOSFETs; TG RDS(ON) = 2.6Ω (high), BG RDS(ON) = 1.1Ω (low) - eliminates need for external drivers |
| FAULT0 / FAULT1 | Open-drain fault reporting outputs | Assert low on OV/UV/OC/OT events per channel - supports independent fault isolation and system-level response |
| SHARE_CLK | PolyPhase synchronization clock output | Drives up to 5 slave controllers for 6-phase operation; phase alignment controlled via MFR_PWM_CONFIG[2:0] |
Key Features
| Feature | Design Value |
|---|---|
| Digital loop compensation | Programmable gm (3–5.76 mmho) and RTH (0–62 kΩ) via PMBus - replaces external RC networks and enables dynamic tuning |
| Telemetry read-back | Real-time monitoring of VIN, IIN, VOUT, IOUT, die temperature, and external thermistor (TSNS0/TSNS1) with 16-bit VOUT and 10-bit IIN resolution |
| Independent sequencing | Voltage-based or time-based soft-start/stop per channel; programmable ramp rates and delay times - eliminates external timers |
| Internal EEPROM with ECC | Stores configuration, fault logs, and calibration data; 10,000 write cycles, 10-year retention - ensures robust field updates and diagnostics |
| Sub-milliohm DCR sensing | Configurable gain amplifier with ±50µV offset and 1.25% total unadjusted error - enables accurate current measurement with ultra-low DCR inductors |
Applications
| Telecom Point-of-Load Supply | Industrial FPGA Power System |
|---|---|
Use Scenario: Dual-rail power delivery to high-performance telecom ASICs requiring 1.8V @ 30A and 1.0V @ 30A with strict sequencing and telemetry. IC Role / Device Role / Timing Role: Dual-output PolyPhase controller managing two independent buck stages with synchronized phase interleaving and real-time current/voltage monitoring. Use Value: Sub-milliohm DCR sensing maintains ±1.25% current readback accuracy across load range, while PMBus telemetry enables remote health monitoring and predictive maintenance. |
Use Scenario: Powering Xilinx Kintex Ultrascale+ FPGA with core (0.85V), auxiliary (1.8V), and auxiliary I/O (3.3V) rails in factory automation equipment. IC Role / Device Role / Timing Role: Primary controller for core and auxiliary rails; uses voltage-based sequencing to meet FPGA power-up requirements (VCCINT before VCCAUX). Use Value: ±0.5% VOUT accuracy and programmable soft-start ensure reliable FPGA configuration; internal EEPROM stores margining settings for production test validation. |
| Automotive ADAS Domain Controller | Data Center GPU VRM |
Use Scenario: AEC-Q100 qualified power supply for radar processing SoC in automotive ADAS domain controller operating at –40°C to +125°C ambient. IC Role / Device Role / Timing Role: Dual-output controller delivering 1.0V @ 40A and 1.8V @ 25A with independent fault management and thermal shutdown. Use Value: Integrated temperature sensing (TSNS0/TSNS1) and ±1°C internal TUE enable precise thermal derating; FAULT0/FAULT1 support ASIL-B compliant fault reporting. |
Use Scenario: High-density GPU voltage regulator module in AI accelerator server, requiring 0.75V @ 60A with fast transient response and digital margining. IC Role / Device Role / Timing Role: Master controller in 6-phase PolyPhase configuration using SHARE_CLK to synchronize external LTC3884 slaves. Use Value: Accurate PolyPhase current sharing (<±5% imbalance) and 60ns minimum on-time support high-frequency (500kHz+) operation for compact magnetics and low output ripple. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output digital polyphase controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3884IRHE#PBF | Same silicon, extended temperature grade (–40°C to +125°C vs. same spec); identical pinout and functionality | No functional difference; selected for higher reliability screening in mission-critical industrial deployments | Choose LTC3884IRHE#PBF when full automotive-grade screening or enhanced burn-in is required beyond standard industrial qualification. |
| LTC3884ERHE-1#PBF | Replaces integrated gate drivers with three-state PWM outputs (PWM0/PWM1); no TG/BG pins; requires external DrMOS or power blocks | Used where higher integration density or lower gate driver losses are needed via discrete DrMOS; incompatible pinout | Select LTC3884ERHE-1#PBF only when migrating to DrMOS-based design - not a drop-in replacement due to missing TG/BG pins and added VCC0/VCC1 pins. |
Compared with LTC3884ERHE#PBF, the LTC3884IRHE#PBF offers identical performance with tighter process controls for long-life industrial systems, while LTC3884ERHE-1#PBF trades integrated drivers for PWM flexibility - requiring board redesign but enabling higher efficiency in DrMOS architectures.
Availability
LTC3884ERHE#PBF is available at Aetrix Electronics and suitable for telecom point-of-load, industrial FPGA power, and automotive ADAS applications requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for LTC3884ERHE#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, communications, and power management markets since 1965.
The LTC3884ERHE#PBF belongs to the LTC® Digital Power System Management family, designed specifically for high-reliability, digitally controllable DC/DC conversion in telecom, industrial, and automotive systems demanding telemetry, sequencing, and fault resilience.
FAQ
What is the package type and thermal performance of the LTC3884ERHE#PBF?
The LTC3884ERHE#PBF uses a 48-lead (5mm × 6mm) plastic GQFN package with an exposed SGND pad (Pin 49). Its thermal characteristics include θJA = 31°C/W and θJC = 3.7°C/W, rated for continuous operation from –40°C to +125°C junction temperature. The exposed pad must be soldered to PCB for optimal thermal dissipation and electrical grounding.
Does the LTC3884ERHE#PBF support sub-milliohm DCR current sensing, and how is it implemented?
Yes, the LTC3884ERHE#PBF supports sub-milliohm DCR current sensing via dedicated differential inputs ISENSE0± and ISENSE1±. It employs a programmable-gain amplifier with ±50µV zero-code offset and 1.25% total unadjusted error, enabling accurate current measurement even with inductor DCR as low as 0.32mΩ - critical for high-current, high-efficiency applications.
How does the LTC3884ERHE#PBF handle fault reporting and protection?
The LTC3884ERHE#PBF provides independent fault reporting per channel via open-drain FAULT0 and FAULT1 outputs. It detects and responds to output overvoltage, undervoltage, overcurrent, input overvoltage, and internal/external overtemperature conditions. Faults are logged in internal EEPROM with ECC, and responses (e.g., latch-off or retry) are programmable via PMBus commands.
Can the LTC3884ERHE#PBF be used in AEC-Q100 qualified automotive applications?
Yes - the LTC3884ERHE#PBF is AEC-Q100 qualified for automotive applications. It meets Grade 1 temperature requirements (–40°C to +125°C), includes built-in fault logging, redundant telemetry, and robust EEPROM with ECC - making it suitable for ADAS domain controllers and other safety-critical automotive power systems.
What software tools support configuration and telemetry for the LTC3884ERHE#PBF?
The LTC3884ERHE#PBF is fully supported by Analog Devices' LTpowerPlay® GUI software, which enables real-time configuration, telemetry monitoring, loop compensation tuning, fault logging analysis, and EEPROM programming via USB-to-PMBus adapter. All PMBus 1.3 commands are accessible through this interface.
LTC3884ERHE#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- PolyPhase®
- Package/Case:
- 48-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Number of Outputs:
- 2
- Output Phases:
- 2
- Voltage - Supply (Vcc/Vdd):
- 4.5V ~ 38V
- Frequency - Switching:
- 200kHz ~ 1MHz
- Duty Cycle (Max):
- -
- Synchronous Rectifier:
- Yes
- Clock Sync:
- Yes
- Serial Interfaces:
- I2C, PMBus
- Control Features:
- Enable, Frequency Control, Phase Control, Power Good
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-GQFN (5x6)
LTC3884ERHE#PBF FAQ
1.How can I place an order for LTC3884ERHE#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3884ERHE#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3884ERHE#PBF reliable?
The price and inventory of LTC3884ERHE#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3884ERHE#PBF is usually 5 days.
3.What payment methods are accepted for LTC3884ERHE#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3884ERHE#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3884ERHE#PBF?
LTC3884ERHE#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3884ERHE#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3884ERHE#PBF?
For technical support, including LTC3884ERHE#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3884ERHE#PBF requirements.
6.How does Aetrix verify that LTC3884ERHE#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3884ERHE#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3884ERHE#PBF meets industry standards.
7.What is the process for return or replacement of LTC3884ERHE#PBF?
All LTC3884ERHE#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3884ERHE#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3884ERHE#PBF part is unused and in its original packaging.
Return procedure for LTC3884ERHE#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC3884ERHE#PBF Tags

-
UCC28C45DR
Texas Instruments

-
UCC28C40DR
Texas Instruments

-
UCC28C43DR
Texas Instruments

-
ZXSC410E6TA
Diodes Incorporated
-
LM3524DMX/NOPB
Texas Instruments
-
LM3489MMX/NOPB
Texas Instruments

-
MIC2102YML-TR
Microchip Technology

-
LM5148RGYR
Texas Instruments
-
TL598CDR
Texas Instruments

-
LM5155DSSR
Texas Instruments

-
LM25085MYX/NOPB
Texas Instruments

-
UCC2813DTR-0
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

