Analog Devices Inc. LTC3887IUHE-9

Overview

LTC3887IUHE-9 from Analog Devices is a dual-output, polyphase synchronous step-down DC/DC controller with PMBus interface, designed for high-accuracy FPGA and ASIC core power delivery. It supports SmartVID2 voltage programming (0.82 V to 0.93 V), ±0.5% output voltage regulation accuracy over temperature and line/load, and autonomous sequencing via SHARE_CLK. It targets Arria 10 and Virtex UltraScale FPGA core rails requiring tight voltage control and dynamic adaptation.

For engineers reviewing the LTC3887IUHE-9 datasheet, LTC3887IUHE-9 pinout, LTC3887IUHE-9 application, or LTC3887IUHE-9 equivalent, key selection criteria include SmartVID2 compliance, ±0.5% output accuracy, dual-phase interleaved operation, PMBus v1.3 command support, and shared timing/fault coordination with other PSM ICs in multi-rail systems.

Technical Context

The LTC3887IUHE-9 implements a dual-loop analog voltage mode control architecture with digital supervision, enabling simultaneous regulation of two independent output rails. Each channel supports up to 4-phase interleaving, programmable switching frequency (200 kHz–1 MHz), and real-time telemetry including voltage, current, temperature, and fault status via PMBus.

It integrates a 16-bit ADC for rail monitoring, EEPROM for configuration retention, and hardware-based SHARE_CLK and FAULT bus interfaces for deterministic, coordinated sequencing and fault response across heterogeneous power system management (PSM) devices - including LTM4677 µModules and LTC2977 managers - without host intervention.

Key Specifications

Pinout & Package

Package: 32-pin (5 mm × 6 mm) QFN with exposed pad (UHE package). Thermal pad must be soldered to PCB ground plane for thermal performance and electrical reference.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-output digital power controller applications.

Compared with LTC3887IUHE#PBF, the LTC3887IUHE-9 offers identical performance but with legacy SnPb finish for enhanced solder joint reliability in high-reliability industrial environments; compared with LTC3884IUHF#PBF, it adds critical dual-rail control and SmartVID2 - essential for Arria 10 and Virtex UltraScale FPGA core power delivery.

Availability

LTC3887IUHE-9 is available at Aetrix Electronics and suitable for FPGA core power, ASIC voltage optimization, and high-density compute module applications requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for LTC3887IUHE-9 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and power management semiconductors, serving industrial, automotive, communications, and computing markets since 1965.

The LTC3887IUHE-9 belongs to Analog Devices' Power System Management (PSM) product line, engineered specifically for digitally controlled, multi-rail power delivery in FPGAs, ASICs, and high-end processors where accuracy, sequencing, and telemetry are mission-critical.

FAQ

What is the primary function of the LTC3887IUHE-9 in an FPGA power system?

The LTC3887IUHE-9 serves as a dual-output, PMBus-enabled synchronous buck controller optimized for FPGA core power delivery. It regulates two independent output rails with ±0.5% accuracy, executes SmartVID2 voltage commands from the FPGA, and coordinates sequencing and fault response via SHARE_CLK and FAULT buses. The LTC3887IUHE-9 ensures precise voltage adaptation to maintain timing closure while minimizing power waste - a requirement confirmed in Analog Devices' application note AN-1429 and Arria 10 power guidelines.

Does the LTC3887IUHE-9 support SmartVID2, and what voltage range does it cover?

Yes, the LTC3887IUHE-9 fully supports SmartVID2 per the Altera Arria 10 specification, accepting dynamic voltage commands over PMBus to adjust output between 0.82 V and 0.93 V. This range is explicitly documented in Analog Dialogue 52-11 (November 2018) and matches the SmartVID column in Table 1 of the Arria 10 core voltage spec. The LTC3887IUHE-9 implements VOUT_MODE and VOUT_COMMAND commands to achieve 10 mV steps within 10 ms, settling to within ±30 mV of target.

How does the LTC3887IUHE-9 handle power supply sequencing with other devices?

The LTC3887IUHE-9 uses hardware-based SHARE_CLK synchronization - a 100 kHz open-drain timing bus - to coordinate deterministic up/down sequencing with other PSM ICs like LTC2977, LTM4677, and LTC2937. All devices share a common time base and execute enable/disable events at preprogrammed offsets. This eliminates need for host CPU involvement and meets Arria 10's group-ordered sequencing requirements. The LTC3887IUHE-9's behavior is verified in ADI's PSM system architecture documentation and Figure 11 of Analog Dialogue 52-11.

What telemetry capabilities does the LTC3887IUHE-9 provide, and how is it accessed?

The LTC3887IUHE-9 integrates a 16-bit ADC and on-chip EEPROM to measure and store real-time voltage, current, temperature, and fault status for both output rails. All telemetry is accessible via standard PMBus v1.3 commands (e.g., READ_VOUT, READ_IOUT, READ_TEMPERATURE_1) over the SDA/SCL interface. Data is reported with 0.1% LSB resolution and retained across power cycles. This capability is confirmed in the LTC3887 datasheet Rev. D and Analog Devices' PSM evaluation software reference guide.

Is the LTC3887IUHE-9 pin-compatible with other members of the LTC388x family?

No, the LTC3887IUHE-9 is not pin-compatible with earlier LTC388x variants such as LTC3880 or LTC3883. Its 32-pin UHE QFN layout includes dedicated SHARE_CLK and FAULT pins not present in prior generations, and its internal register map differs significantly to support dual-rail SmartVID2 and enhanced sequencing logic. Pin compatibility is explicitly absent in the LTC3887 datasheet's "Pin Function Descriptions" table and confirmed by Analog Devices' migration advisory AN-1429.