My Inquiry
My Account
Analog Devices Inc. LTC3890IGN-1#PBF
- Part No.:
- LTC3890IGN-1#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 28-SSOP (0.154", 3.90mm Width)
- Datasheet:
-
LTC3890IGN-1#PBF.pdf
- Description:
- IC REG CTRLR BUCK 28SSOP
- Quantity:
- Payment:
- Shipping:
Inventory:3,850
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC3890IGN-1#PBF from Analog Devices (formerly Linear Technology) is a dual, 2-phase synchronous step-down DC/DC controller driving all-N-channel MOSFET stages. It supports 4V–60V input, delivers two independent outputs (e.g., 3.3V/5A and 8.5V/3A), operates with 50µA quiescent current in single-channel sleep mode, and features out-of-phase operation to reduce input capacitance and supply noise - ideal for automotive always-on systems and battery-powered digital devices.
For engineers reviewing the LTC3890IGN-1#PBF datasheet, LTC3890IGN-1#PBF pinout, LTC3890IGN-1#PBF application, or LTC3890IGN-1#PBF equivalent, key selection criteria include its 28-pin SSOP package, dual-channel phase-lockable frequency (75–850kHz), RSENSE/DCR current sensing, selectable light-load modes (Burst/Pulse-Skipping/Continuous), and integrated 5.1V INTVCC LDO powered from VIN or EXTVCC.
Technical Context
The LTC3890IGN-1#PBF implements a constant-frequency current-mode architecture with two independent controllers operating 180° out-of-phase to minimize input ripple and EMI. Each channel uses an error amplifier (EA) comparing VFB to a 0.800V reference, with ITH voltage setting peak inductor current via differential current sensing at SENSE+ and SENSE− pins.
Its OPTI-LOOP® compensation enables stable loop response across wide output capacitance and ESR ranges. The device integrates dual gate drivers (TG/BG) with 2.5Ω pull-up and 1.5Ω pull-down on TG, 2.4Ω/1.1Ω on BG, and supports dropout operation up to 99% duty cycle via internal dropout detection and bootstrap capacitor recharge management.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Range | 4V to 60V - supports 12V/24V/48V industrial buses and wide-range battery chemistries (e.g., 12S Li-ion). |
| IQ (One Channel Sleep) | 50µA - extends runtime in always-on automotive modules where one rail remains active during standby. |
| VOUT Range | 0.8V to 24V - enables flexible generation of logic, analog, and interface rails from a single controller. |
| Switching Frequency | 75kHz to 850kHz (phase-lockable) - allows EMI tuning and optimization of magnetics size vs. efficiency trade-off. |
| Current Sensing | RSENSE or DCR - supports high-accuracy lossless sensing using PCB traces or low-value resistors without added power loss. |
| PGOOD Output | Open-drain PGOOD1 - provides system-level power-good signaling for sequenced startup or fault monitoring of Channel 1 only. |
| Shutdown IQ | <14µA - ensures ultra-low leakage during full system hibernation, critical for long-term battery survival. |
Pinout & Package
Package: 28-lead plastic SSOP (GN), –40°C to 125°C operating junction temperature, 90°C/W θJA.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| ITH1, ITH2 | Error amplifier output / compensation node | Controls peak inductor current per channel; connects to RC network for loop stability and transient response tuning. |
| VFB1, VFB2 | Feedback input | Monitors regulated output via external resistor divider; referenced to precise 0.800V internal bandgap. |
| SENSE1+, SENSE1− SENSE2+, SENSE2− | Differential current sense inputs | Enable accurate current limiting and cycle-by-cycle protection using either shunt resistor or DCR sensing networks. |
| PLLIN/MODE | Light-load mode select & sync input | Selects Burst Mode (ground), Pulse-Skipping (1.2–3.8V), or Forced Continuous (INTVCC); accepts external clock for synchronization. |
| RUN1, RUN2 | Independent enable inputs | Digital control: <1.15V disables respective channel; both <0.7V forces full shutdown with 14µA IQ. |
| TG1, TG2 / BG1, BG2 | Top/bottom N-MOSFET gate drivers | High-current drivers (2.5Ω/1.5Ω TG, 2.4Ω/1.1Ω BG) support fast switching and robust gate drive into large FETs. |
| TRACK/SS1, TRACK/SS2 | Soft-start & tracking input | Internal 1µA pull-up enables linear soft-start with external capacitor; also supports output voltage tracking of another supply. |
Key Features
| Feature | Design Value |
|---|---|
| Out-of-phase dual control | Reduces RMS input current by ~30%, cutting required bulk capacitance and lowering conducted EMI at input stage. |
| OPTI-LOOP® compensation | Allows stable closed-loop operation across ±50% variation in output capacitor ESR and 10× capacitance range without re-tuning. |
| Programmable light-load behavior | Three selectable modes (Burst/Pulse-Skipping/Continuous) let designers optimize efficiency, ripple, or audio compatibility per application. |
| Bootstrap capacitor recharge in dropout | Prevents gate drive collapse during 99% duty cycle operation by forcing periodic bottom-FET turn-on to refresh BOOST voltage. |
| Independent tracking/soft-start | Enables controlled power-up sequencing between multiple rails or synchronized startup with external supplies - critical for FPGA/CPU core logic. |
Applications
| Automotive Infotainment Power Supply | Industrial PLC I/O Module |
|---|---|
Use Scenario: Powering 3.3V microcontroller, 8.5V display backlight, and 5V USB interface in a vehicle head unit with cold-crank (4.5V) and load-dump (60V) transients. IC Role / Device Role / Timing Role: Dual-output synchronous buck controller managing two independent regulated rails while rejecting input noise via out-of-phase switching. Use Value: 50µA sleep current preserves battery during ignition-off; 60V absolute max input withstands load dump without external TVS clamping. | Use Scenario: Generating isolated 3.3V logic and 8.5V analog sensor bias in a DIN-rail mounted programmable logic controller with wide ambient temperature range. IC Role / Device Role / Timing Role: High-reliability dual DC/DC controller delivering stable outputs across –40°C to 125°C junction temperature with no derating. Use Value: RSENSE/DCR flexibility allows cost-effective current sensing; PGOOD1 enables safe startup sequencing before enabling downstream field I/O drivers. |
| Battery-Powered Test Equipment | Distributed Telecom Power System |
Use Scenario: Portable oscilloscope requiring ultra-low standby power, clean 3.3V digital rail, and low-noise 8.5V analog front-end supply from a 12V LiFePO₄ pack. IC Role / Device Role / Timing Role: Dual-phase controller minimizing input ripple and enabling Burst Mode for >90% efficiency at µA loads. Use Value: 14µA shutdown current prevents battery drain over weeks of storage; adjustable soft-start avoids inrush into large output caps. | Use Scenario: Intermediate bus converter in a 48V telecom shelf supplying 3.3V FPGA core and 8.5V SerDes auxiliary rail with strict EMI limits. IC Role / Device Role / Timing Role: Phase-lockable dual controller synchronized to system clock to avoid beat frequencies and meet CISPR-32 Class B emissions. Use Value: 75–850kHz programmable frequency enables optimal magnetic design; EXTVCC input allows efficient self-bias from secondary output. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual synchronous buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3890EGN-1#PBF | Same silicon, commercial-grade (–40°C to 125°C), identical pinout and electrical specs. | Lower temperature rating; not qualified for extended automotive or industrial environments. | Select when full industrial temp range is unnecessary and cost sensitivity is higher. |
| MP2918GL-Z | Single-chip dual controller with integrated MOSFET drivers but no EXTVCC option; 4.5–60V input; 55µA IQ; fixed 600kHz frequency. | Lacks programmable frequency, phase-lock, and independent TRACK/SS; no PGOOD1 output. | Choose for space-constrained designs where integration outweighs configurability needs. |
Compared with LTC3890EGN-1#PBF, the LTC3890IGN-1#PBF offers identical functionality with guaranteed performance across –40°C to 125°C, making it suitable for harsher environments; versus MP2918GL-Z, it provides superior flexibility in frequency control, light-load optimization, and power sequencing - at the cost of external FETs and slightly larger layout area.
Availability
LTC3890IGN-1#PBF is available at Aetrix Electronics and suitable for automotive infotainment systems, industrial PLC modules, and battery-powered test equipment requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LTC3890IGN-1#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full product support, documentation, and manufacturing continuity for the LTC portfolio.
The LTC3890IGN-1#PBF belongs to Linear's high-voltage, low-IQ DC/DC controller family, designed specifically for demanding automotive, industrial, and battery-operated applications where input voltage range, efficiency at light load, and thermal robustness are critical.
FAQ
What is the maximum input voltage rating for the LTC3890IGN-1#PBF?
The LTC3890IGN-1#PBF has an absolute maximum input supply voltage (VIN) of 65V, with a recommended operating range of 4V to 60V. This allows reliable operation under automotive load-dump conditions and across diverse battery chemistries. Exceeding 65V risks permanent damage per Absolute Maximum Ratings.
Does the LTC3890IGN-1#PBF support independent enable and soft-start for each output channel?
Yes, the LTC3890IGN-1#PBF provides fully independent RUN1/RUN2 pins for per-channel enable/disable and TRACK/SS1/TRACK/SS2 pins for individual soft-start or voltage tracking. Each TRACK/SS pin features an internal 1µA pull-up current, enabling linear ramp-up with an external capacitor - essential for FPGA or multi-rail processor sequencing.
How does the LTC3890IGN-1#PBF achieve 50µA quiescent current?
The LTC3890IGN-1#PBF achieves 50µA quiescent current in single-channel sleep mode by disabling non-essential circuitry (including one oscillator, driver stage, and error amplifier) while maintaining regulation on the active channel. This is enabled automatically when the PLLIN/MODE pin is grounded (Burst Mode) and load current drops below threshold.
Can the LTC3890IGN-1#PBF synchronize to an external clock source?
Yes, the LTC3890IGN-1#PBF supports external synchronization via the PLLIN/MODE pin. When an external clock signal (75–850kHz) is applied, the internal phase-locked loop aligns the rising edge of TG1 to the external clock's rising edge - reducing beat frequencies and easing EMI compliance in dense system layouts.
What current sensing methods does the LTC3890IGN-1#PBF support?
The LTC3890IGN-1#PBF supports both discrete RSENSE (shunt resistor) and lossless DCR (inductor winding resistance) current sensing via dedicated differential SENSE+ and SENSE− inputs per channel. This allows designers to choose between high-accuracy shunt-based sensing or cost-optimized DCR sensing without sacrificing protection or regulation fidelity.
LTC3890IGN-1#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-SSOP (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Number of Outputs:
- 2
- Output Phases:
- 2
- Voltage - Supply (Vcc/Vdd):
- 4V ~ 60V
- Frequency - Switching:
- 105kHz ~ 835kHz, 350kHz ~ 535kHz
- Duty Cycle (Max):
- 99%
- Synchronous Rectifier:
- Yes
- Clock Sync:
- No
- Serial Interfaces:
- -
- Control Features:
- Enable, Frequency Control, Power Good, Soft Start, Tracking
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-SSOP
LTC3890IGN-1#PBF FAQ
1.How can I place an order for LTC3890IGN-1#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3890IGN-1#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3890IGN-1#PBF reliable?
The price and inventory of LTC3890IGN-1#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3890IGN-1#PBF is usually 5 days.
3.What payment methods are accepted for LTC3890IGN-1#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3890IGN-1#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3890IGN-1#PBF?
LTC3890IGN-1#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3890IGN-1#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3890IGN-1#PBF?
For technical support, including LTC3890IGN-1#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3890IGN-1#PBF requirements.
6.How does Aetrix verify that LTC3890IGN-1#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3890IGN-1#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3890IGN-1#PBF meets industry standards.
7.What is the process for return or replacement of LTC3890IGN-1#PBF?
All LTC3890IGN-1#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3890IGN-1#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3890IGN-1#PBF part is unused and in its original packaging.
Return procedure for LTC3890IGN-1#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC3890IGN-1#PBF Tags
-
UCC28C45DR
Texas Instruments
-
UCC28C40DR
Texas Instruments
-
UCC28C43DR
Texas Instruments
-
ZXSC410E6TA
Diodes Incorporated
-
LM3524DMX/NOPB
Texas Instruments
-
LM3489MMX/NOPB
Texas Instruments
-
MIC2102YML-TR
Microchip Technology
-
LM5148RGYR
Texas Instruments
-
TL598CDR
Texas Instruments
-
LM5155DSSR
Texas Instruments
-
LM25085MYX/NOPB
Texas Instruments
-
UCC2813DTR-0
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
