Analog Devices Inc. LTC3896IFE#TRPBF
- Part No.:
- LTC3896IFE#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 38-TFSOP (0.173", 4.40mm Width) 31 Leads, Exposed Pad
- Datasheet:
-
LTC3896IFE#TRPBF.pdf
- Description:
- IC REG BUCK BOOST 38TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:1,666
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Product details
Overview
LTC3896IFE#TRPBF from Analog Devices (formerly Linear Technology) is a high-voltage synchronous inverting DC/DC controller that drives all-N-channel MOSFETs to generate regulated negative output voltages as low as –60V from inputs up to 140V (VIN + |VOUT–|), featuring 40μA no-load quiescent current, ground-referenced RUN/PGOOD/PLLIN pins, and OPTI-LOOP® compensation. It enables high-efficiency –48V/2A telecom power supplies with phase-lockable switching up to 850kHz.
For engineers reviewing the LTC3896IFE#TRPBF datasheet, LTC3896IFE#TRPBF pinout, LTC3896IFE#TRPBF application, or LTC3896IFE#TRPBF equivalent, key selection criteria include its 38-lead TSSOP package with exposed VOUT– pad, –60V to –0.8V output range, 75–850kHz synchronizable frequency, true ground-referenced interface pins, and support for Burst Mode®, pulse-skipping, or forced continuous operation at light loads.
Technical Context
The LTC3896IFE#TRPBF implements a constant-frequency current-mode control architecture with integrated top- and bottom-gate drivers (TG/BG), bootstrap supply (BOOST), and dual LDO options for DRVCC-via internal VIN, external NMOS (NDRV), or EXTVCC sources. Its error amplifier (ITH) controls peak current sensing through SENSE+/SENSE– with programmable clamp via MODE pin.
It supports three distinct light-load operating modes selected by MODE pin voltage: Burst Mode® (clamp adjustable 10–60% of VSENSE(MAX)), pulse-skipping (MODE >1.4V), or forced continuous (MODE = INTVCC). The PLLIN input accepts true ground-referenced clocks (2.8V high, 0.5V low) to synchronize TG rising edge without level shifting.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Range | VIN + |VOUT–| from 4V to 140V (150V abs max); enables wide-input industrial/telecom supplies without pre-regulation |
| Output Range | Regulated –60V to –0.8V; supports legacy –48V telecom, –24V industrial, and precision low-negative rails |
| Quiescent Current | 40μA (no load, pulse-skipping/continuous mode); extends battery runtime in always-on remote systems |
| Switching Frequency | Programmable 50–900kHz fixed or 75–850kHz phase-lockable; allows EMI optimization and multi-phase synchronization |
| Feedback Reference | Precision 0.8V (±1% over temp); enables accurate output regulation with minimal external resistor tolerance impact |
| Gate Drive Voltage | Adjustable 5–10V via DRVSET pin; optimizes RDS(on) vs. switching loss trade-off for diverse N-MOSFETs |
| UVLO Thresholds | Selectable DRVCC UVLO (4.2V/7.8V) via DRVUV pin; prevents erratic startup during brownout or cold-cranking |
Pinout & Package
Package: 38-lead plastic TSSOP (FE) with exposed pad (Pin 39) soldered to PCB for thermal and electrical performance; rated for –40°C to +125°C junction temperature (I-grade).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| OVLO (1) | Overvoltage lockout input | Disables switching if >1.2V above VOUT–; resets soft-start and maintains DRVCC/INTVCC regulation during fault |
| VPRG (2) | Output voltage programming select | Floating → adjustable –0.8V to –60V; tied to INTVCC → –5V fixed; tied to VOUT– → –3.3V fixed |
| SENSE+ (3), SENSE– (4) | Differential current sense inputs | Measure MOSFET current via external sense resistor; SENSE– powers comparator when >INTVCC |
| SS (5) | Soft-start and shutdown control | Internal 10μA pull-up ramps VFB; REGSD feature enables controlled shutdown via SS pull-down |
| VFB (6) | Feedback input | Compares against 0.8V reference; connects to GND when VPRG sets fixed –5V/–3.3V outputs |
| ITH (7) | Error amplifier output | Directly sets current limit threshold; used for loop compensation with external RC network |
| MODE (8) | Light-load operation mode select | Voltage-selectable: VOUT– → Burst Mode®; 0.5–1.0V → adjustable burst clamp; INTVCC → forced continuous |
| VOUT– (9,10,15,39) | Negative output return / virtual ground | Reference for most internal circuits; exposed pad (39) must be soldered for thermal derating and EMI control |
| CLKOUT (11) | Synchronization clock output | Swings INTVCC-to-VOUT–; daisy-chains to other controllers for multi-phase interleaving |
| GND (12) | True system ground reference | Reference for RUN, PLLIN, PGOOD; enables direct interface with ground-referenced logic without level shifters |
| PLLIN (13) | External sync clock input | Accepts ground-referenced clock (0.5–2.8V); locks TG rising edge to external source with no level translation |
| PGOOD (14) | Power-good open-drain output | Pulled to GND if VFB deviates >±10%; referenced to GND for direct MCU interrupt or enable signaling |
| FREQ (17) | Frequency programming input | Resistor-to-VOUT– sets 50–900kHz; tied to VOUT– → 350kHz; tied to INTVCC → 535kHz |
| DRVSET (18) | DRVCC regulation setpoint | Resistor-to-VOUT– programs 5–10V DRVCC; ties to VOUT– → 6V; ties to INTVCC → 10V |
| DRVUV (19) | DRVCC UVLO/EXTVCC switchover select | Tied to VOUT– → lower thresholds (4.2V/4.7V); tied to INTVCC → higher thresholds (7.8V/7.7V) |
| TG (20) | Top-gate driver output | Floating high-side driver; swing = DRVCC superimposed on SW node; drives N-MOSFET gate |
| SW (21) | Switch node connection | Connects to inductor center tap; voltage swings from VOUT– to VIN during operation |
| BOOST (22) | Bootstrap supply for TG driver | Capacitor between BOOST and SW provides floating bias for top-gate drive; swing ≈ DRVCC to (VIN + DRVCC) |
| BG (24) | Bottom-gate driver output | Ground-referenced driver; swing = VOUT– to DRVCC; drives synchronous N-MOSFET source-to-VOUT– |
| DRVCC (26) | Gate driver supply output | Powered by internal VIN LDO, external NDRV NMOS LDO, or EXTVCC LDO; decoupled with ≥4.7µF ceramic |
| NDRV (28) | External NMOS pass device driver | Drives gate of external NFET for high-current DRVCC LDO; tie to DRVCC to disable |
| VIN (30) | Main input supply | Accepts 4–140V (VIN + |VOUT–|); bypassed to GND and VOUT– for noise suppression |
| EXTVCC (32) | External DRVCC supply input | Enables switchover to external 7–13V source for improved efficiency; clamped to ≤14V relative to VOUT– |
| RUN (34) | Enable/shutdown control | Ground-referenced: <1.12V → shutdown; <0.7V → ultra-low IQ (10μA); tie to VIN for always-on |
| PHASMD (36) | CLKOUT phase select | Tied to VOUT– → CLKOUT 90° out-of-phase with TG; tied to INTVCC → in-phase |
Key Features
| Feature | Design Value |
|---|---|
| True ground-referenced RUN/PLLIN/PGOOD | Eliminates external level shifters in mixed-polarity systems, reducing BOM count and layout complexity |
| OPTI-LOOP® compensation | Allows stable loop response across wide output capacitor ESR ranges (e.g., polymer vs. ceramic), simplifying design reuse |
| Integrated bootstrap diode | Reduces external component count in BOOST circuit; enables reliable high-side gate drive without discrete diode |
| Selectable light-load modes | Engineer chooses Burst Mode® (highest light-load efficiency), pulse-skipping (low ripple), or forced continuous (lowest noise) |
| Programmable DRVCC (5–10V) | Optimizes gate drive strength for specific MOSFET Qg/RDS(on), balancing conduction loss vs. switching loss |
| Three independent DRVCC LDO sources | Supports flexible power architecture: internal VIN LDO, external NMOS (NDRV), or EXTVCC-enabling optimal efficiency across input range |
Applications
| Telecom –48V Distributed Power | Industrial –24V Sensor Bias |
|---|---|
Use Scenario: Generating –48V @ 2A from 36–72V backplane in telecom shelf systems with strict efficiency and EMI requirements. IC Role / Device Role / Timing Role: Primary inverting controller managing synchronous N-MOSFETs, regulating output via VFB feedback, and synchronizing to system clock via PLLIN. Use Value: 90%+ efficiency at full load, 40μA quiescent current preserves standby power budget, and ground-referenced PGOOD enables direct FPGA monitoring. | Use Scenario: Providing isolated –24V bias for precision analog sensors in factory automation PLC modules with wide input voltage variation. IC Role / Device Role / Timing Role: Inverting regulator converting 12–48V field bus to stable –24V rail; uses VPRG = FLOAT and resistor divider for exact –24V setting. Use Value: Wide 4–140V input range accommodates 12V/24V/48V field buses; OPTI-LOOP® ensures stability with long sensor cable capacitance. |
| Automotive Infotainment Display Supply | Test Equipment Negative Rail Generator |
Use Scenario: Generating –12V for LCD bias in automotive head units where cold-crank (4.5V) and load-dump (140V) transients occur. IC Role / Device Role / Timing Role: High-voltage inverting controller with programmable OVLO and DRVUV-selectable UVLO to survive automotive transients. Use Value: 150V absolute max rating withstands load dump; selectable UVLO thresholds prevent false shutdown during cold crank. | Use Scenario: Programmable negative rail in bench power supplies requiring precise –0.8V to –60V outputs with low-noise, low-ripple operation. IC Role / Device Role / Timing Role: Configurable inverter using FREQ resistor and MODE pin to deliver fixed or variable output with selectable light-load behavior. Use Value: VPRG pin enables fixed –5V/–3.3V or adjustable output; Burst Mode® delivers <10mVpp ripple at microamp loads for sensitive DUTs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar inverting DC/DC controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3895IFE#TRPBF | Single-output non-synchronous inverting controller; lacks bottom-gate driver (BG) and synchronous rectification capability | Lower efficiency at high load due to external Schottky catch diode; suitable only where <90% efficiency is acceptable | Select LTC3895IFE#TRPBF only if cost sensitivity outweighs efficiency needs and synchronous MOSFETs are not required |
| LTC7804EFE#TRPBF | Non-inverting step-down controller with integrated bootstrap circuit; cannot generate negative output without external inverter stage | Requires additional inverting topology (e.g., Ćuk or inverting buck-boost) to achieve negative rail, increasing component count and footprint | Choose LTC7804EFE#TRPBF only for positive-output applications; not a functional substitute for negative rail generation |
Compared with LTC3895IFE#TRPBF, the LTC3896IFE#TRPBF delivers up to 5% higher full-load efficiency via synchronous rectification, while LTC7804EFE#TRPBF cannot natively produce negative voltage-requiring added magnetics and complexity to replicate LTC3896IFE#TRPBF's core function.
Availability
LTC3896IFE#TRPBF is available at Aetrix Electronics and suitable for telecom power supplies, industrial sensor biasing, automotive infotainment displays, and test equipment requiring stable component supply with guaranteed long-term availability.
Supply support for LTC3896IFE#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full product support, documentation, and manufacturing continuity for the LTC portfolio.
The LTC3896 belongs to Linear's high-voltage DC/DC controller family, designed specifically for robust, efficient negative rail generation in harsh environments including telecom, industrial, and automotive applications.
FAQ
What is the maximum absolute input voltage rating for the LTC3896IFE#TRPBF?
The LTC3896IFE#TRPBF has an absolute maximum input supply voltage (VIN) rating of 150V with respect to VOUT–. This applies to VIN, BOOST, and SW pins. Exceeding this voltage risks permanent damage, per Absolute Maximum Ratings table in the datasheet.
How does the LTC3896IFE#TRPBF achieve ground-referenced interface pins like RUN and PGOOD?
The LTC3896IFE#TRPBF internally references RUN, PLLIN, and PGOOD to the GND pin-not VOUT–-enabling direct connection to standard 0–5V logic without external level shifters. This architecture simplifies system integration in mixed-polarity designs where GND is the common reference.
Can the LTC3896IFE#TRPBF generate a fixed –5V output without external resistors?
Yes. Tying the VPRG pin (Pin 2) to INTVCC configures the LTC3896IFE#TRPBF for fixed –5V output. In this mode, VFB must be connected to GND (the positive terminal of the –5V output), and no external feedback divider is required.
What is the purpose of the exposed pad (Pin 39) on the LTC3896IFE#TRPBF TSSOP package?
The exposed pad (Pin 39) on the LTC3896IFE#TRPBF is electrically and thermally connected to VOUT–. It must be soldered to a PCB copper pour to ensure rated electrical performance (e.g., noise immunity) and thermal dissipation-θJA = 28°C/W assumes full pad soldering.
Does the LTC3896IFE#TRPBF support synchronization to an external clock, and what voltage levels are required?
Yes. The LTC3896IFE#TRPBF accepts external synchronization via PLLIN (Pin 13), which is ground-referenced. Valid input levels are 0.5V (low) and 2.8V (high) with respect to GND, enabling direct interface with standard logic families without level translation circuitry.
LTC3896IFE#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 38-TFSOP (0.173", 4.40mm Width) 31 Leads, Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Up/Step-Down
- Output Configuration:
- Negative
- Topology:
- Buck-Boost
- Number of Outputs:
- 1
- Output Phases:
- 1
- Voltage - Supply (Vcc/Vdd):
- 4V ~ 140V
- Frequency - Switching:
- 50kHz ~ 900kHz
- Duty Cycle (Max):
- 99%
- Synchronous Rectifier:
- No
- Clock Sync:
- No
- Serial Interfaces:
- -
- Control Features:
- Current Limit, Enable, Frequency Control, Phase Control, Power Good, Soft Start
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 38-TSSOP-EP
LTC3896IFE#TRPBF FAQ
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6.How does Aetrix verify that LTC3896IFE#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC3896IFE#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3896IFE#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC3896IFE#TRPBF?
All LTC3896IFE#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3896IFE#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3896IFE#TRPBF part is unused and in its original packaging.
Return procedure for LTC3896IFE#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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