Analog Devices Inc. LTC3899IFE#PBF
- Part No.:
- LTC3899IFE#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 38-TFSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
LTC3899IFE#PBF.pdf
- Description:
- IC REG CTRLR BCK/BCK-BST 38TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:218
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC3899IFE#PBF from Analog Devices (formerly Linear Technology) is a high-performance triple-output synchronous buck/buck/boost DC/DC controller driving all-N-channel MOSFET stages, operating from 4.5V to 60V input with 29μA sleep-mode quiescent current and phase-lockable 75kHz–850kHz switching frequency. It supports automotive cold-crank operation down to 2.2V after startup and delivers regulated outputs up to 60V in battery-powered and distributed power systems.
For engineers reviewing the LTC3899IFE#PBF datasheet, LTC3899IFE#PBF pinout, LTC3899IFE#PBF application, or LTC3899IFE#PBF equivalent, key selection criteria include its triple-output topology, wide-input capability, OPTI-LOOP® compensation, programmable gate drive (5V–10V), and TSSOP-38 package compatibility with automotive AEC-Q100–qualified variants.
Technical Context
The LTC3899IFE#PBF implements constant-frequency current-mode control across three independent channels: two synchronous buck controllers (Channels 1 & 2) and one synchronous boost controller (Channel 3). Each channel features independent RUN pins, ITH error amplifiers, and SENSE+/- current sensing with ±1µA bias current for buck and 170µA for boost.
Its architecture integrates dual LDOs - a 5V INTVCC regulator for analog/digital circuitry and a programmable DRVCC regulator (5V–10V) for gate drivers - with automatic EXTVCC switchover at 4.7V/7.7V thresholds. The PLLIN/MODE pin enables external synchronization, burst mode, pulse-skipping, or forced continuous conduction based on voltage level or external clock injection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5V to 60V main supply; operates down to 2.2V after startup when biased from boost output or auxiliary rail. |
| Output Topology | Triple-output: two synchronous buck channels + one synchronous boost channel, all driving N-channel MOSFETs. |
| Quiescent Current | 29μA in sleep mode (one channel active), enabling extended battery runtime in always-on automotive systems. |
| Switching Frequency | Programmable 50kHz–900kHz or phase-lockable 75kHz–850kHz; supports synchronization to external clock via PLLIN/MODE pin. |
| Gate Drive Voltage | Programmable 5V–10V DRVCC output via resistor-divider on DRVSET pin, optimizing FET RDS(on) and efficiency. |
| Feedback Accuracy | Buck VFB = 0.792V–0.812V (±1%); boost VFB = 1.182V–1.218V (adjustable) or fixed 10V/12V when VPRG3 grounded/INTVCC-connected. |
| Package | 38-lead plastic TSSOP (FE package), exposed pad soldered to PCB for thermal management; θJA = 25°C/W. |
| Operating Temp | –40°C to +125°C junction temperature, qualified for automotive start-stop and industrial embedded applications. |
Pinout & Package
Package: 38-lead plastic TSSOP (FE), 5mm × 7mm footprint, exposed thermal pad (Pin 39) connected to GND.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| FREQ (Pin 1) | Oscillator frequency programming | Resistor-to-GND sets 50kHz–900kHz; GND = 350kHz, INTVCC = 535kHz; enables precise timing control. |
| PLLIN/MODE (Pin 2) | Synchronization & light-load mode control | Accepts external clock for phase-locking; selects Burst Mode (GND/floating), pulse-skipping (1.1V–INTVCC–1.3V), or forced CCM (INTVCC). |
| RUN1/RUN2/RUN3 (Pins 9,10,11) | Independent channel enable/disable | Each pin controls one regulator; <1.2V disables channel; all <0.7V shuts down entire IC to 3.6μA shutdown IQ. |
| DRVSET (Pin 16) | DRVCC output voltage programming | GND = 6V, INTVCC = 10V, resistor divider (50kΩ–100kΩ) enables 5V–10V tuning for logic-/standard-level FET optimization. |
| VPRG3 (Pin 34) | Boost output configuration | Float = adjustable via VFB3; GND = fixed 10V; INTVCC = fixed 12V - simplifies design for common boost voltages. |
| TG1/TG2/TG3 (Pins 32,18,27) | Top-gate drive outputs | Floating drivers with DRVCC swing superimposed on SW node; support 97.5%–100% duty cycle for dropout/overvoltage conditions. |
| BOOST1/BOOST2/BOOST3 (Pins 30,20,26) | Bootstrap supplies | Capacitors between BOOSTx and SWx generate floating gate drive rails; BOOST3 swings to VOUT3 + DRVCC for high-side boost FET. |
| SENSE1+/–, SENSE2+/–, SENSE3+/– (Pins 3–5,13–14,35–36) | Current sense inputs | Differential sensing for buck (±1µA bias) and boost (170µA SENSE3+ bias); supports accurate current limiting and cycle-by-cycle protection. |
Key Features
| Feature | Design Value |
|---|---|
| No external bootstrap diodes required | Integrated internal switches in top-gate drivers eliminate discrete diodes, reducing BOM count and layout area. |
| OPTI-LOOP® compensation | Allows stable loop response across wide range of output capacitance and ESR values without manual compensation redesign. |
| 100% duty cycle capability (boost) | Enables direct pass-through operation during input voltage surges or transient events, improving system reliability. |
| Very low dropout operation (99% duty cycle, bucks) | Supports ultra-low VIN–VOUT differentials in buck stages, critical for cold-crank scenarios where input drops to 2.2V. |
| Fixed or adjustable boost output voltage | VPRG3 pin selects fixed 10V/12V or adjustable mode - reduces external component count for standard boost rails. |
| Low shutdown IQ: 3.6μA | Minimizes battery drain during vehicle sleep modes, meeting stringent automotive "always-on" requirements. |
Applications
| Automotive Start-Stop Systems | Distributed DC Power Architectures |
|---|---|
Use Scenario: Powering infotainment, ADAS sensors, and body control modules during engine restart when battery voltage dips to 2.2V. IC Role / Device Role / Timing Role: Triple-output controller maintains stable 5V/8.5V/10V rails despite wide input transients; synchronizes switching to avoid EMI peaks. Use Value: Eliminates need for separate pre-regulators or LDOs; 29μA sleep IQ extends battery life between engine cycles. | Use Scenario: Generating isolated 5V, 8.5V, and 10V rails from a 24V or 48V intermediate bus in telecom or industrial equipment. IC Role / Device Role / Timing Role: Buck/buck/boost topology replaces multiple single-output controllers; phase-locking enables interleaved operation for ripple cancellation. Use Value: Reduces total solution size by 40% vs discrete controllers; programmable gate drive optimizes efficiency across load range. |
| Multioutput Industrial Control Units | Battery-Powered Test & Measurement Equipment |
Use Scenario: Supplying FPGA core (0.85V), I/O (3.3V), and analog front-end (±12V) from a single 12V–36V input in PLCs or motor drives. IC Role / Device Role / Timing Role: Two buck channels deliver tightly regulated low-voltage rails; boost channel generates positive 12V for op-amps and ADC references. Use Value: Independent RUN pins allow dynamic rail sequencing and fault isolation; OPTI-LOOP® ensures stability with ceramic and polymer capacitors. | Use Scenario: Portable oscilloscopes and multimeters requiring long runtime from Li-ion batteries (3.0V–4.2V per cell) while delivering 3.3V, 5V, and ±15V outputs. IC Role / Device Role / Timing Role: Boost channel regulates 10V rail from low VIN; buck channels step down to 3.3V/5V; Burst Mode minimizes no-load losses. Use Value: 29μA sleep IQ extends standby time beyond 30 days; 60V absolute max rating protects against inductive kickback in probe circuits. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple-output synchronous controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3898IFE#PBF | Dual-buck + single-boost architecture; lacks Channel 3 VPRG3 pin for fixed 10V/12V selection; same 38-TSSOP package and 29μA IQ. | Requires external resistive feedback for boost output; less suitable for fixed-rail designs needing minimal components. | Select LTC3898IFE#PBF only if adjustable boost voltage suffices and VPRG3 functionality is unnecessary. |
| MP2918GL-Z | Triple-output buck-only controller (no boost); 4.5V–36V input; 15μA IQ; QFN-32 package; lacks PLL synchronization and OPTI-LOOP®. | Cannot replace LTC3899IFE#PBF in boost-required applications like 12V generation from 5V input. | Choose MP2918GL-Z only for multi-rail buck-only systems where cost and footprint are prioritized over boost capability and advanced features. |
Compared with LTC3898IFE#PBF and MP2918GL-Z, the LTC3899IFE#PBF uniquely combines triple-output buck/buck/boost topology, fixed-boost voltage selection via VPRG3, and automotive-grade thermal performance in a single TSSOP package - making it irreplaceable for cold-crank–capable, multi-rail systems requiring both step-down and step-up regulation.
Availability
LTC3899IFE#PBF is available at Aetrix Electronics and suitable for automotive start-stop systems, distributed DC power architectures, and industrial control units requiring stable component supply with guaranteed long-term availability and traceable sourcing.
Supply support for LTC3899IFE#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, acquired Linear Technology in 2017 to expand its power management portfolio.
The LTC3899 product line was designed specifically for high-reliability automotive and industrial applications demanding wide-input voltage operation, ultra-low quiescent current, and flexible multi-output regulation - addressing cold-crank resilience and system-level power architecture consolidation.
FAQ
What is the minimum input voltage for LTC3899IFE#PBF after startup?
The LTC3899IFE#PBF can operate from an input supply as low as 2.2V after startup when biased from the boost converter output or another auxiliary supply. This capability is essential for automotive cold-crank scenarios where battery voltage collapses temporarily. The 4.5V to 60V nominal input range applies when powered directly from VBIAS.
How does the VPRG3 pin affect the boost output voltage of LTC3899IFE#PBF?
The VPRG3 pin on the LTC3899IFE#PBF determines the boost channel's output configuration: floating enables adjustable output via external resistors on VFB3 (regulated to 1.2V); grounding sets fixed 10V output; connecting to INTVCC sets fixed 12V output. This eliminates external feedback dividers in standard applications and simplifies design validation.
Can LTC3899IFE#PBF synchronize its switching frequency to an external clock?
Yes, the LTC3899IFE#PBF supports external synchronization via the PLLIN/MODE pin. When an external clock is applied, the phase-locked loop aligns the rising edge of TG1 with the external clock's rising edge, enabling EMI reduction through frequency alignment and supporting forced continuous conduction mode across all three channels.
What is the purpose of the DRVSET pin on LTC3899IFE#PBF?
The DRVSET pin on the LTC3899IFE#PBF programs the DRVCC gate driver supply voltage: GND yields 6V, INTVCC yields 10V, and a 50kΩ–100kΩ resistor to GND enables precise 5V–10V tuning. This allows optimization for logic-level or standard-level N-channel MOSFETs, directly impacting conduction loss and overall system efficiency.
Does LTC3899IFE#PBF support independent enable/disable of each output channel?
Yes, the LTC3899IFE#PBF provides independent RUN1, RUN2, and RUN3 pins (Pins 9, 10, 11) to enable or disable each controller. Pulling any RUN pin below 1.2V disables that channel; pulling all three below 0.7V places the entire LTC3899IFE#PBF into 3.6μA shutdown mode, supporting dynamic power sequencing and fault containment.
LTC3899IFE#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 38-TFSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck, Buck-Boost
- Number of Outputs:
- 3
- Output Phases:
- 2
- Voltage - Supply (Vcc/Vdd):
- 4.5V ~ 60V
- Frequency - Switching:
- 105kHz ~ 835kHz, 350kHz ~ 535kHz
- Duty Cycle (Max):
- 100%
- Synchronous Rectifier:
- Yes
- Clock Sync:
- No
- Serial Interfaces:
- -
- Control Features:
- Enable, Frequency Control, Soft Start, Tracking
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 38-TSSOP-EP
LTC3899IFE#PBF FAQ
1.How can I place an order for LTC3899IFE#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3899IFE#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3899IFE#PBF reliable?
The price and inventory of LTC3899IFE#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3899IFE#PBF is usually 5 days.
3.What payment methods are accepted for LTC3899IFE#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3899IFE#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3899IFE#PBF?
LTC3899IFE#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3899IFE#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3899IFE#PBF?
For technical support, including LTC3899IFE#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3899IFE#PBF requirements.
6.How does Aetrix verify that LTC3899IFE#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3899IFE#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3899IFE#PBF meets industry standards.
7.What is the process for return or replacement of LTC3899IFE#PBF?
All LTC3899IFE#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3899IFE#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3899IFE#PBF part is unused and in its original packaging.
Return procedure for LTC3899IFE#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC3899IFE#PBF Tags

-
UCC28C45DR
Texas Instruments

-
UCC28C40DR
Texas Instruments

-
UCC28C43DR
Texas Instruments

-
ZXSC410E6TA
Diodes Incorporated
-
LM3524DMX/NOPB
Texas Instruments
-
LM3489MMX/NOPB
Texas Instruments

-
MIC2102YML-TR
Microchip Technology

-
LM5148RGYR
Texas Instruments
-
TL598CDR
Texas Instruments

-
LM5155DSSR
Texas Instruments

-
LM25085MYX/NOPB
Texas Instruments

-
UCC2813DTR-0
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

