Analog Devices Inc. LTC4070IDDB#TRMPBF
- Part No.:
- LTC4070IDDB#TRMPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Battery Chargers
- Package:
- 8-WFDFN Exposed Pad
- Datasheet:
-
LTC4070IDDB#TRMPBF.pdf
- Description:
- IC BATT CHG LI-ION 8DFN
- Quantity:
- Payment:

- Shipping:

Inventory:500
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Product details
Overview
LTC4070IDDB#TRMPBF from Analog Devices is a precision shunt-mode Li-Ion/polymer battery charger IC designed for ultra-low-power energy harvesting and backup applications. It delivers 450nA quiescent current, ±1% float voltage accuracy (4.0V/4.1V/4.2V pin-selectable), and up to 50mA internal shunt current - enabling reliable charging from intermittent solar, thermal, or RF sources into thin-film or coin-cell batteries.
For engineers reviewing the LTC4070IDDB#TRMPBF datasheet, LTC4070IDDB#TRMPBF pinout, LTC4070IDDB#TRMPBF application, or LTC4070IDDB#TRMPBF equivalent, key selection criteria include NTC-qualified thermal float voltage adjustment, low-battery/high-battery status outputs (LBO/HBO), external PFET drive capability (DRV), and thermally enhanced 8-lead DFN (2mm × 3mm, 0.75mm height) packaging optimized for space-constrained embedded systems.
Technical Context
The LTC4070IDDB#TRMPBF implements a pulsed, ultralow-duty-cycle (≤0.002%) NTC monitoring architecture that samples ADJ and NTCBIAS pins every ~1.5 seconds to minimize leakage while maintaining precise temperature-dependent float voltage qualification. Its shunt regulation loop uses an internal error amplifier and reference to clamp VCC at the programmed VFLOAT with ±1% tolerance across –40°C to 125°C.
It integrates dual CMOS status outputs: HBO asserts high when VCC rises within 15–60mV of VFLOAT_EFF (with 100mV hysteresis), and LBO asserts high below 3.08–3.34V (with 220–350mV hysteresis). The DRV pin provides active-sink drive (3µA typical) to control external PFETs, boosting shunt current to 500mA while preserving sub-µA battery discharge in sleep state.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Operating Current | 450nA typical - enables >10-year battery life in memory backup without compromising charge readiness |
| Float Voltage Accuracy | ±1% over full temperature and shunt current range - ensures safe, consistent Li-ion cell voltage control without calibration |
| Internal Shunt Current | 50mA max - sufficient for low-power solar chargers; scalable to 500mA with external PFET via DRV pin |
| Pin-Selectable VFLOAT | 4.0V (ADJ=GND), 4.1V (ADJ=Float), 4.2V (ADJ=VCC) - supports diverse Li-ion chemistry requirements |
| NTC Float Adjustment | –50mV/–75mV/–100mV per 10°C above 40°C - prevents thermal runaway by dynamically lowering VFLOAT based on battery temperature |
| Package Thermal Resistance | θJA = 76°C/W (DFN) - requires minimal PCB copper area for thermal management at 50mA shunt |
| Operating Temperature | –40°C to +125°C junction - qualified for automotive under-hood, industrial sensor, and outdoor energy harvesting environments |
Pinout & Package
Package: 8-lead (2mm × 3mm) plastic DFN, 0.75mm profile, exposed pad (Pin 9) - soldered to PCB ground for optimal thermal performance (θJA = 76°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| NTCBIAS (1) | NTC bias reference | Provides pulsed, low-duty-cycle bias voltage to 10kΩ NTC thermistor; minimizes power draw during temperature sensing |
| NTC (2) | Thermistor input | Compares against internal resistor divider to detect battery temperature thresholds (40°C/50°C/60°C/70°C); triggers VFLOAT reduction |
| ADJ (3) | Float voltage select | 3-state logic input (GND/float/VCC) sets VFLOAT to 4.0V/4.1V/4.2V; sampled every 1.5s to reject board leakage errors |
| HBO (4) | High battery status output | CMOS high-active signal indicating VCC ≥ VFLOAT_EFF − VHBTH; used for system-level charge-complete signaling |
| GND (5) | Ground reference | Main power return and thermal path; exposed pad (Pin 9) must be soldered to PCB ground plane |
| LBO (6) | Low battery status output | CMOS high-active signal asserting when VCC ≤ 3.08–3.34V; disables NTC sampling to reduce ICCQ to <300nA |
| DRV (7) | External PFET gate driver | Sinks 3µA typical to pull down gate of P-channel MOSFET; enables >50mA shunt current with minimal layout sensitivity |
| VCC (8) | Battery voltage node | Regulated shunt output node; sinks up to 50mA to maintain VFLOAT; decoupled with ≥0.1µF capacitor when no battery present |
Key Features
| Feature | Design Value |
|---|---|
| Ultralow operating current | 450nA typical - extends battery life in always-on backup systems beyond 10 years |
| Pulsed NTC qualification | Duty cycle <0.002% - reduces average NTCBIAS/NTC power to <30pA, critical for µW-scale harvesters |
| Shunt architecture | No external sense resistor or inductor required - simplifies BOM and layout for single-resistor charge control |
| Thermal float voltage scaling | Fixed-step delta (50/75/100mV per 10°C) - provides predictable, monotonic VFLOAT reduction without complex compensation |
| Low-voltage load disconnect support | LBO/HBO status outputs enable direct interface to PMIC enable inputs or microcontroller GPIOs for automatic system shutdown |
| Thermally enhanced DFN | 0.75mm height, 2mm×3mm footprint - fits in space-constrained IoT nodes and wearables where MSOP is too tall |
Applications
| Energy Harvesting Systems | Solar-Powered Sensor Nodes |
|---|---|
|
Use Scenario: Charging thin-film Li-ion batteries from intermittent indoor light or thermal gradients in wireless sensor networks. IC Role / Device Role / Timing Role: Shunt regulator and thermal protector - maintains safe VFLOAT while consuming <450nA between harvest events. Use Value: Enables multi-year maintenance-free operation without overvoltage risk, even with variable source impedance and duty cycle. |
Use Scenario: Regulating battery voltage in outdoor environmental monitors powered by small photovoltaic cells. IC Role / Device Role / Timing Role: Precision float voltage controller with NTC-based thermal derating - adjusts VFLOAT downward as panel/battery heats in sunlight. Use Value: Prevents accelerated Li-ion degradation at elevated temperatures while sustaining >95% capacity retention over 500 cycles. |
| Memory Backup Power | Automotive Telematics Modules |
|
Use Scenario: Providing nonvolatile SRAM or RTC backup during main power loss in industrial controllers. IC Role / Device Role / Timing Role: Ultra-low-quiescent shunt charger - holds VCC at 4.1V with <300nA drain when LBO is asserted. Use Value: Guarantees >10-year data retention using standard CR2032 coin cells without periodic replacement. |
Use Scenario: Maintaining real-time clock and CAN bus wake-up circuitry in parked vehicle telematics units. IC Role / Device Role / Timing Role: Battery protection and status monitor - HBO signals full charge to microcontroller; LBO triggers low-power sleep mode. Use Value: Reduces parasitic drain to <500nA total system current, extending 12V battery life beyond 6 months in storage. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar shunt-mode Li-ion battery protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX1555 | Linear charger with 100mA max charge current; no NTC qualification; fixed 4.2V float; higher 25µA quiescent current | Lacks thermal float adjustment and ultra-low IQ - unsuitable for energy harvesting or long-term backup | Select LTC4070IDDB#TRMPBF when NTC-based thermal safety or <1µA standby current is required |
| BQ29700 | Li-ion protector IC only (no charger function); 3.6V–4.35V adjustable overvoltage threshold; 1.5µA IQ; no shunt regulation | Requires external charger; provides only overvoltage cutoff - no continuous float regulation or status outputs | Select LTC4070IDDB#TRMPBF when integrated shunt charging + thermal qualification + HBO/LBO status is needed in one device |
Compared with MAX1555 and BQ29700, the LTC4070IDDB#TRMPBF uniquely combines sub-µA quiescent operation, programmable thermal derating, and dual status outputs in a single shunt regulator - eliminating need for discrete protectors, external thermistors, or supplemental supervision logic.
Availability
LTC4070IDDB#TRMPBF is available at Aetrix Electronics and suitable for energy harvesting systems, solar-powered sensor nodes, and memory backup applications requiring stable component supply with guaranteed long-term availability and traceable sourcing.
Supply support for LTC4070IDDB#TRMPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.
The LTC4070 belongs to Analog Devices' precision battery management IC product line, engineered specifically for ultra-low-power, thermally aware Li-ion charging in energy-constrained environments such as IoT edge nodes and maintenance-free backup systems.
FAQ
What is the maximum shunt current capability of the LTC4070IDDB#TRMPBF?
The LTC4070IDDB#TRMPBF provides up to 50mA of internal shunt current to regulate battery voltage. When higher current is needed - such as in high-output solar or AC-line applications - the DRV pin can drive an external P-channel MOSFET to scale shunt current to 500mA. The LTC4070IDDB#TRMPBF itself remains within its 50mA limit while enabling this extended capability through controlled gate drive.
How does the NTC temperature qualification work on the LTC4070IDDB#TRMPBF?
The LTC4070IDDB#TRMPBF uses a pulsed, ratio-metric method to monitor battery temperature via an NTC thermistor connected between NTC and GND, biased by NTCBIAS. At four defined thresholds (35.5%, 29.0%, 22.8%, 17.8% of NTCBIAS), it steps VFLOAT down by fixed increments - 50mV, 75mV, or 100mV per 10°C rise above 40°C - depending on the ADJ pin state. This occurs without continuous bias current, keeping average NTC-related power below 30pA.
Can the LTC4070IDDB#TRMPBF be used for multi-cell battery stacks?
Yes - the LTC4070IDDB#TRMPBF supports stacked-cell configurations. Two or more devices can be cascaded in series: the GND of the upper device connects to the VCC of the lower device. Each LTC4070IDDB#TRMPBF regulates one cell independently, inherently balancing the stack via shunt action. Status outputs require level-shifting for top-device signals, and input voltage must exceed the sum of all cell VFLOAT values.
What is the purpose of the ADJ pin on the LTC4070IDDB#TRMPBF?
The ADJ pin on the LTC4070IDDB#TRMPBF selects the base float voltage: grounded for 4.0V, floating for 4.1V, or tied to VCC for 4.2V. It is sampled once every ~1.5 seconds using a low-impedance pulse to avoid corruption by PCB leakage currents. This 3-state configuration allows precise matching to Li-ion chemistry requirements without external resistors or DACs.
Does the LTC4070IDDB#TRMPBF provide battery charge termination?
No - the LTC4070IDDB#TRMPBF does not implement time-based or current-cutoff charge termination. Instead, its shunt architecture naturally reduces charge current to nanoamp levels as VCC approaches VFLOAT_EFF, effectively self-terminating without timers or complex state machines. This behavior is validated across Li-ion cells and eliminates risk of overcharge in low-power, intermittent-source applications.
LTC4070IDDB#TRMPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 8-WFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Battery Chemistry:
- Lithium Ion/Polymer
- Number of Cells:
- -
- Current - Charging:
- -
- Programmable Features:
- -
- Fault Protection:
- -
- Charge Current - Max:
- -
- Battery Pack Voltage:
- 4.2V
- Voltage - Supply (Max):
- -
- Interface:
- -
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-DFN (3x2)
LTC4070IDDB#TRMPBF FAQ
1.How can I place an order for LTC4070IDDB#TRMPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC4070IDDB#TRMPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC4070IDDB#TRMPBF reliable?
The price and inventory of LTC4070IDDB#TRMPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC4070IDDB#TRMPBF is usually 5 days.
3.What payment methods are accepted for LTC4070IDDB#TRMPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC4070IDDB#TRMPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC4070IDDB#TRMPBF?
LTC4070IDDB#TRMPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC4070IDDB#TRMPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC4070IDDB#TRMPBF?
For technical support, including LTC4070IDDB#TRMPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC4070IDDB#TRMPBF requirements.
6.How does Aetrix verify that LTC4070IDDB#TRMPBF is sourced from the original manufacturer or authorized distributors?
All LTC4070IDDB#TRMPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC4070IDDB#TRMPBF meets industry standards.
7.What is the process for return or replacement of LTC4070IDDB#TRMPBF?
All LTC4070IDDB#TRMPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC4070IDDB#TRMPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC4070IDDB#TRMPBF part is unused and in its original packaging.
Return procedure for LTC4070IDDB#TRMPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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