Analog Devices Inc. LTC6090IS8E-5#TRPBF

Overview

LTC6090IS8E-5#TRPBF from Analog Devices (formerly Linear Technology) is a high-voltage, precision, unity-gain-unstable op amp optimized for noise gain ≥5 configurations. It operates from ±4.75V to ±70V (140V total), delivers 12MHz gain-bandwidth product, 21V/µs slew rate, and rail-to-rail output swing capable of sourcing/sinking 50mA. It is used in high-voltage DAC buffering, piezo driver circuits, and photodiode amplification where picoamp input bias current (50pA max), low 1.25mV offset voltage, and 130dB CMRR are critical.

For engineers reviewing the LTC6090IS8E-5#TRPBF datasheet, LTC6090IS8E-5#TRPBF pinout, LTC6090IS8E-5#TRPBF application, or LTC6090IS8E-5#TRPBF equivalent, this page provides verified specifications, thermal warning (TFLAG) and output disable (OD) interface details, SOIC-8E package layout guidance, and validated alternative options for high-voltage precision signal conditioning.

Technical Context

The LTC6090IS8E-5#TRPBF employs a proprietary CMOS process enabling 140V supply operation with rail-to-rail output stage and pA-level input bias current. Its internal architecture includes differential drive generator, thermal sensor with 145°C activation threshold, open-drain TFLAG output, and active-low OD control with 2MΩ internal pull-up.

It features guarded input protection with back-to-back diodes and Zener clamps, COM pin referenced logic interface for low-voltage control, and exposed V– pad (Pin 9) for thermal management. The device supports unbalanced split supplies and includes built-in thermal shutdown at 175°C with hysteresis.

Key Specifications

Pinout & Package

Package: 8-Lead Plastic SOIC with Exposed Pad (S8E), RoHS-compliant, lead-free finish. Exposed pad (Pin 9) is electrically connected to V– and must be soldered to PCB for thermal performance (θJC = 5°C/W).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-voltage precision op amp applications.

Compared with LTC6090IS8E#TRPBF and OPA454IDDA, the LTC6090IS8E-5#TRPBF uniquely combines noise-gain-stability optimization, integrated thermal flagging, and SOIC-8E thermal performance-making it optimal for compact, self-protecting high-voltage amplifier designs where gain ≥5 is acceptable.

Availability

LTC6090IS8E-5#TRPBF is available at Aetrix Electronics and suitable for high-voltage DAC buffering, piezo actuator driving, and photodiode transimpedance amplification requiring stable component supply across industrial temperature ranges (–40°C to +85°C).

Supply support for LTC6090IS8E-5#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors.

The LTC6090 family was designed specifically for precision high-voltage signal conditioning-targeting applications demanding rail-to-rail output, picoamp input bias, and robust thermal protection in compact SOIC and TSSOP packages.

FAQ

What is the minimum noise gain required for stable operation of the LTC6090IS8E-5#TRPBF?

The LTC6090IS8E-5#TRPBF is specified for stable operation at noise gain ≥5. Attempting unity-gain or low-noise-gain configurations may cause peaking or oscillation. For AV = 1 applications, use the standard LTC6090IS8E#TRPBF variant instead. Stability is verified per Figure G15–G18 in the datasheet under varying feedback capacitance and closed-loop gain conditions.

How does the TFLAG pin function in the LTC6090IS8E-5#TRPBF, and what external components are needed?

The TFLAG pin on the LTC6090IS8E-5#TRPBF is an open-drain output that sinks 200µA when die temperature reaches 145°C. It requires an external pull-up resistor (typically 10kΩ to +3.3V or +5V) to generate a logic-high signal when inactive. When tied directly to the OD pin, it automatically disables the output stage upon thermal warning-no additional logic is needed. Voltage between TFLAG and COM must remain within –3V to +7V.

Can the LTC6090IS8E-5#TRPBF drive capacitive loads, and what is the maximum supported value?

Yes, the LTC6090IS8E-5#TRPBF is characterized to drive up to 200pF of capacitive load while maintaining stability in noise gain ≥5 configurations. For loads exceeding 100pF, add a small series resistor (e.g., 10–50Ω) between OUT and the load to isolate capacitance and preserve phase margin. Performance data is confirmed in Figures G19–G20 showing output impedance vs frequency with and without load.

What is the role of the COM pin in the LTC6090IS8E-5#TRPBF, and how should it be connected?

The COM pin on the LTC6090IS8E-5#TRPBF serves as the reference node for OD and TFLAG logic-level signaling. It must be tied to the low-voltage ground (e.g., microcontroller GND) when interfacing with digital control circuits. If left floating, its internal resistor divider pulls it to ~30% above mid-supply, risking invalid logic thresholds. Absolute voltage between COM and OD or TFLAG must stay within –3V to +7V to prevent damage.

Does the LTC6090IS8E-5#TRPBF support unbalanced split supplies, and what are the limits?

Yes, the LTC6090IS8E-5#TRPBF supports unbalanced split supplies-for example, +100V and –40V-provided the total supply voltage (V+ to V–) remains ≤140V and each rail stays within absolute maximum ratings (V+ ≤ V– + 150V). Input common-mode range remains V– +3V to V+ –3V, and PSRR performance is maintained across the full ±4.75V to ±70V range per rail as verified in Figure G03.