Analog Devices Inc. LTC6420IUDC-20#TRPBF
- Part No.:
- LTC6420IUDC-20#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Special Purpose Amplifiers
- Package:
- 20-WFQFN Exposed Pad
- Datasheet:
-
LTC6420IUDC-20#TRPBF.pdf
- Description:
- IC ADC DRIVER 20QFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,957
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC6420IUDC-20#TRPBF from Analog Devices (formerly Linear Technology) is a dual, matched, high-speed differential amplifier optimized as an ADC driver for 12–16-bit converters. It delivers fixed 20dB (10V/V) gain, 1.8GHz –3dB bandwidth, ±0.1dB gain matching and ±0.1° phase matching at 100MHz, with rail-to-rail differential output swing and adjustable 1.1V–1.6V output common mode voltage - enabling direct DC-coupled interface to precision ADCs in communications and instrumentation systems.
For engineers reviewing the LTC6420IUDC-20#TRPBF datasheet, LTC6420IUDC-20#TRPBF pinout, LTC6420IUDC-20#TRPBF application, or LTC6420IUDC-20#TRPBF equivalent, key selection criteria include channel-to-channel matching performance, VOCM-controlled common mode compatibility with ADC reference inputs, wideband IMD3 (–84dBc at 100MHz), and QFN-20 package thermal and layout constraints for high-frequency signal integrity.
Technical Context
The LTC6420IUDC-20#TRPBF integrates two fully differential amplifiers with internal 100Ω/1000Ω feedback networks setting fixed 10V/V gain and 200Ω differential input impedance. Each channel features independent VOCM pins and ENABLE control, supporting per-channel shutdown and precise output common mode biasing without external components.
Its architecture enables unconditional stability across loads, with 12.5Ω series output resistors improving robustness, and a 300MHz internal common-mode feedback loop rejecting disturbances while maintaining 15MHz VOCM control bandwidth. The device operates from 2.85V–3.5V supply, drawing 80mA per amplifier in active mode.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain | 20dB (10V/V) - fixed, eliminating external gain-setting components and ensuring consistent signal scaling into ADC front-ends. |
| –3dB Bandwidth | 1.8GHz - supports wideband IF sampling up to 300MHz baseband with flat frequency response and minimal group delay variation. |
| Gain Matching | ±0.1dB (typ) - ensures amplitude coherence between I/Q or dual-channel paths critical for diversity receivers and MIMO systems. |
| Phase Matching | ±0.1° at 100MHz - preserves signal orthogonality in quadrature applications, minimizing image rejection degradation. |
| OIP3 | 46dBm at 100MHz - enables high dynamic range operation with low intermodulation distortion when driving sensitive ADCs. |
| Noise Figure | 6.2dB - balances low-noise amplification with high linearity, suitable for weak-signal acquisition in satellite comms and test equipment. |
| Supply Current | 80mA per amplifier - provides high-speed performance within constrained power budgets typical of portable or dense PCB designs. |
| Output Swing | Rail-to-rail differential (up to 5.2VP-P) - maximizes ADC utilization without clipping, even under heavy load conditions. |
Pinout & Package
Package: 20-lead 3mm × 4mm × 0.75mm plastic QFN (UDC) with exposed V– pad (Pin 21) requiring solder connection to PCB ground plane for thermal and electrical performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| +INA, –INA | Differential Input A | High-impedance, matched pair accepting DC- or AC-coupled signals; input common mode range 1.0V–1.6V. |
| +INB, –INB | Differential Input B | Independent, matched input pair identical in specification to Channel A for dual-path signal processing. |
| +OUTA, –OUTA | Differential Output A | Low-impedance outputs (25Ω typ differential) capable of rail-to-rail swing; VOCMA sets common mode level. |
| +OUTB, –OUTB | Differential Output B | Independent output pair with VOCMB control; enables simultaneous dual ADC channel driving without crosstalk. |
| VOCMA, VOCMB | Output Common Mode Voltage Control | High-impedance inputs setting 1.1V–1.6V output common mode; bypass with 0.1μF capacitor for noise suppression. |
| ENABLEA, ENABLEB | Channel Enable/Shutdown | Active-low logic inputs disabling respective amplifier and placing outputs in high-impedance state; reduces supply current to 1–3mA per channel. |
| V+ A, V+ B | Positive Supply (per channel) | Separate supply pins for each amplifier; require local 1000pF + 0.1μF decoupling to minimize PSRR degradation. |
| V– (Pins 3,4,13,14,21) | Negative Supply / Exposed Pad | All five connections must be tied to same ground potential; exposed pad (Pin 21) is electrically V– and thermally critical. |
Key Features
| Feature | Design Value |
|---|---|
| Dual matched amplifiers | ±0.1dB gain match and ±0.1° phase match at 100MHz ensure coherent I/Q signal paths for zero-IF receivers. |
| Adjustable output common mode | VOCM pins allow direct interfacing to ADC VCM inputs (e.g., LTC2285) without transformers or coupling capacitors. |
| DC- or AC-coupled operation | Supports both baseband and IF architectures; input biasing adapts automatically for AC-coupled sources. |
| Per-channel enable control | Independent ENABLEA/ENABLEB pins permit dynamic power management in multi-channel systems with no PCB layout changes. |
| Unconditionally stable design | No external compensation required; maintains stability across 50Ω–∞ loads due to integrated 12.5Ω output series resistors. |
| Low 1.8GHz bandwidth distortion | IMD3 = –84dBc and HD3 = –88dBc at 100MHz support high-SFDR data acquisition in demanding RF applications. |
Applications
| Direct ADC Interface | I/Q Signal Conditioning |
|---|---|
|
Use Scenario: Driving dual 14-bit, 125Msps ADC (e.g., LTC2285) in a software-defined radio front-end. IC Role / Device Role / Timing Role: Differential ADC driver providing matched gain, phase, and common mode alignment between analog input and ADC reference voltage. Use Value: Eliminates need for baluns or AC-coupling caps, reducing BOM count and board area while preserving SNR and SFDR above 70dB. |
Use Scenario: Processing in-phase and quadrature baseband signals in a satellite modem transceiver. IC Role / Device Role / Timing Role: Dual-channel amplifier maintaining precise amplitude/phase relationship between I and Q paths for accurate constellation mapping. Use Value: ±0.1dB/±0.1° matching minimizes EVM degradation, enabling 256-QAM operation with <2% error vector magnitude. |
| Diversity Receiver Front-End | Broadband Test Instrumentation |
|
Use Scenario: Dual-antenna cellular base station receiver requiring independent but identically characterized signal chains. IC Role / Device Role / Timing Role: Matched dual amplifier enabling channel calibration and coherent combining of received signals. Use Value: 80dB channel separation at 100MHz prevents cross-talk-induced desensitization in adjacent-channel interference scenarios. |
Use Scenario: High-fidelity oscilloscope or spectrum analyzer input stage handling wideband signals up to 300MHz. IC Role / Device Role / Timing Role: Low-noise, low-distortion gain block conditioning signals before digitization with minimal added jitter or harmonic content. Use Value: 1nV/√Hz input-referred noise and 6.2dB noise figure preserve small-signal resolution in automated test equipment. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar differential ADC driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC6400-20#TRPBF | Single-channel, identical 20dB gain and 1.8GHz bandwidth, but lacks second amplifier and VOCM flexibility. | Suitable only for single-path systems; requires two units for dual-channel use, increasing layout area and supply current. | Select when only one high-performance ADC channel is needed and space/power allow discrete duplication. |
| LT6402-20#TRPBF | Lower 300MHz bandwidth, higher 12dB noise figure (vs. 6.2dB), and no VOCM pin - requires external common mode biasing. | Targeted at lower-frequency IF stages (<100MHz); not suitable for direct-coupled, wideband ADC interfaces. | Choose for cost-sensitive, sub-100MHz applications where matching and VOCM control are non-critical. |
Compared with LTC6400-20#TRPBF and LT6402-20#TRPBF, the LTC6420IUDC-20#TRPBF uniquely combines dual matched channels, VOCM-controlled common mode, and 1.8GHz bandwidth in a single compact QFN - making it the only option for space-constrained, wideband, dual-path ADC driver applications requiring guaranteed matching and DC coupling.
Availability
LTC6420IUDC-20#TRPBF is available at Aetrix Electronics and suitable for high-speed data acquisition, satellite communications, and test instrumentation requiring stable component supply, tight gain/phase matching, and reliable QFN thermal performance over –40°C to 85°C.
Supply support for LTC6420IUDC-20#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing ICs for precision and high-speed applications.
The LTC6420 family was designed specifically for wideband differential signal conditioning in high-resolution ADC interfaces - emphasizing channel matching, VOCM control, and transformerless operation in communications and instrumentation systems.
FAQ
What is the operating temperature range for the LTC6420IUDC-20#TRPBF?
The LTC6420IUDC-20#TRPBF is specified for continuous operation from –40°C to +85°C, with full DC and AC electrical performance guaranteed across this industrial temperature range. This makes the LTC6420IUDC-20#TRPBF suitable for outdoor infrastructure, automotive test gear, and industrial data acquisition systems where ambient conditions vary widely.
Can the LTC6420IUDC-20#TRPBF drive ADCs without external transformers or coupling capacitors?
Yes - the LTC6420IUDC-20#TRPBF supports direct DC-coupled connection to ADCs via its VOCM pins, which set the output common mode voltage from 1.1V to 1.6V. This eliminates transformers and AC-coupling capacitors, reducing component count and phase skew. The LTC6420IUDC-20#TRPBF has been validated driving LTC22xx-series ADCs with matched VCM references.
How does the ENABLE pin function on the LTC6420IUDC-20#TRPBF?
ENABLEA and ENABLEB are independent active-low control inputs: pulling either pin high (≥2.4V) disables its respective amplifier and places outputs in high-impedance state, reducing supply current to 1–3mA per channel. Pulling low (≤0.8V) enables normal operation. These pins must not be left floating and require defined logic levels for predictable behavior.
What is the differential input impedance of the LTC6420IUDC-20#TRPBF?
The LTC6420IUDC-20#TRPBF has a nominal differential input impedance of 200Ω, confirmed by internal 100Ω/1000Ω feedback resistor ratios. When interfacing with 50Ω sources, external shunt termination (e.g., 66.5Ω) or broadband baluns may be used - as documented in the LTC6420IUDC-20#TRPBF datasheet Figures 1–3 - to maintain signal integrity without degrading matching.
Is the LTC6420IUDC-20#TRPBF pin-compatible with other members of the LTC642x family?
No - the LTC6420IUDC-20#TRPBF is not pin-compatible with LTC6421-20 or other variants. While all share the UDC-20 QFN package, pin functions differ: LTC6421-20 uses different VOCM and ENABLE routing, and its internal architecture supports lower power rather than matched dual-channel operation. Substitution requires PCB redesign and validation.
LTC6420IUDC-20#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 20-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Last Time Buy
- Type:
- ADC Driver
- Applications:
- Data Acquisition
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 20-QFN (3x4)
LTC6420IUDC-20#TRPBF FAQ
1.How can I place an order for LTC6420IUDC-20#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC6420IUDC-20#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC6420IUDC-20#TRPBF reliable?
The price and inventory of LTC6420IUDC-20#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC6420IUDC-20#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC6420IUDC-20#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC6420IUDC-20#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC6420IUDC-20#TRPBF?
LTC6420IUDC-20#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC6420IUDC-20#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC6420IUDC-20#TRPBF?
For technical support, including LTC6420IUDC-20#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC6420IUDC-20#TRPBF requirements.
6.How does Aetrix verify that LTC6420IUDC-20#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC6420IUDC-20#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC6420IUDC-20#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC6420IUDC-20#TRPBF?
All LTC6420IUDC-20#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC6420IUDC-20#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC6420IUDC-20#TRPBF part is unused and in its original packaging.
Return procedure for LTC6420IUDC-20#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC6420IUDC-20#TRPBF Tags

-
TSM103WIDT
STMicroelectronics

-
LM392M/NOPB
Texas Instruments

-
MCP6S93T-E/UN
Microchip Technology

-
INA137UA/2K5
Texas Instruments

-
INA134UA/2K5
Texas Instruments

-
TS34118CS28 RDG
Taiwan Semiconductor Corporation

-
SI8920BC-IPR
Skyworks Solutions Inc.

-
ADUM3190ARQZ-RL7
Analog Devices Inc.

-
ADUM3190ARQZ
Analog Devices Inc.

-
AMC1311BDWVR
Texas Instruments

-
AMC1350DWVR
Texas Instruments

-
ADUM3190SRQZ-RL7
Analog Devices Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

