Analog Devices Inc. LTC6911CMS-2#PBF
- Part No.:
- LTC6911CMS-2#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
LTC6911CMS-2#PBF.pdf
- Description:
- IC OPAMP PGA 2 CIRCUIT 10MSOP
- Quantity:
- Payment:

- Shipping:

Inventory:235
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC6911CMS-2#PBF from Analog Devices (formerly Linear Technology) is a dual-channel, digitally programmable gain amplifier (PGA) with inverting architecture and 3-bit parallel gain control. It delivers precise inverting gains of 0, 1, 2, 4, 8, 16, 32, and 64 V/V across both channels, features rail-to-rail input and output swing, operates from 2.7V to 10.5V total supply, and achieves 11MHz gain-bandwidth product. It is used in precision data acquisition systems requiring dynamic gain adjustment and channel-matched signal conditioning.
For engineers reviewing the LTC6911CMS-2#PBF datasheet, LTC6911CMS-2#PBF pinout, LTC6911CMS-2#PBF application, or LTC6911CMS-2#PBF equivalent, key selection considerations include its matched dual-channel topology, guaranteed 0.1dB channel-to-channel gain matching over temperature, low 10nV/√Hz input voltage noise at unity gain, 120dB system dynamic range, and MSOP-10 package compatibility with space-constrained industrial sensor interfaces.
Technical Context
The LTC6911CMS-2#PBF implements two fully independent, laser-trimmed inverting amplifiers sharing a common 3-bit digital interface (G0–G2) to select discrete gain states. Each channel uses MOS-input op amps with digitally switched resistor networks for gain setting, enabling stable, low-drift performance without external components.
Its internal AGND pin generates a precise mid-supply reference for single-supply operation, while rail-to-rail input capability supports full-scale signal acquisition even at unity gain. The device maintains tight channel-to-channel gain match (≤0.1dB) and isolation (>93dB at 200kHz), making it suitable for differential or interleaved sampling architectures where inter-channel coherence is critical.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain Options | Inverting gains of 0, 1, 2, 4, 8, 16, 32, 64 V/V - enables precise signal scaling without external resistors |
| Gain Bandwidth Product | 11 MHz - supports high-speed acquisition up to ~170ksps at G=64 with ≤0.1dB gain flatness |
| Input Voltage Noise | 10 nV/√Hz at G=1 - preserves SNR in low-level sensor front-ends (e.g., strain gauges, thermopiles) |
| Rail-to-Rail I/O | Full input range (V– to V+) and output swing (within 20mV of rails) - maximizes dynamic range in 3.3V or 5V systems |
| Supply Range | 2.7V to 10.5V total - supports single 3.3V/5V or dual ±2.5V/±5V operation without level-shifting |
| Channel Matching | ≤0.1 dB gain mismatch over –40°C to 85°C - eliminates calibration overhead in dual-path measurement systems |
| Total Dynamic Range | 120 dB - enables 20-bit-equivalent resolution in DC-coupled precision applications |
Pinout & Package
Package: 10-Lead MSOP (3mm × 3mm, 0.5mm pitch), RoHS-compliant, moisture-sensitive level 1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (INA) | Channel A analog input | Inverting input node; input resistance varies with gain (10kΩ at G=1, 1.25kΩ at G=64) |
| 2 (AGND) | Analog ground reference | Internally generated mid-supply bias; serves as DC reference for both inputs and outputs |
| 3 (INB) | Channel B analog input | Independent inverting input; matched to INA for gain and offset tracking |
| 4 (G0) | Digital gain control bit 0 | LSB of 3-bit parallel interface; TTL/CMOS-compatible logic input (VIL ≤ 0.5V, VIH ≥ 4.5V @ 5V) |
| 5 (G1) | Digital gain control bit 1 | Mid-bit of gain select bus; synchronous with G0/G2 for deterministic gain transitions |
| 6 (G2) | Digital gain control bit 2 | MSB of gain select bus; all three bits latched on power-up or after supply stabilization |
| 7 (OUTA) | Channel A amplified output | Inverted, buffered output; drives 500Ω loads with ≤190mV headroom from rails @ ±5V |
| 8 (OUTB) | Channel B amplified output | Matched output stage; ≤0.1dB gain difference vs OUTA ensures coherent dual-channel response |
| 9 (V–) | Negative supply rail | Connect to ground (single supply) or negative rail (dual supply); current sink for both amplifiers |
| 10 (V+) | Positive supply rail | Supplies both channels; draws 2.5mA per channel @ 5V, enabling low-power portable designs |
Key Features
| Feature | Design Value |
|---|---|
| Dual matched PGA architecture | Eliminates need for separate gain-setting components and manual matching in differential or multiplexed systems |
| Zero-gain disable mode (G0=G1=G2=0) | Disconnects inputs and forces outputs to AGND - enables clean channel muting without external switches |
| Single-supply operation with internal AGND | Removes requirement for external reference ICs or resistor dividers in battery-powered DAQ systems |
| Low gain temperature coefficient | ≤2 ppm/°C at G=1 ensures <0.002dB drift over 85°C - critical for unattended industrial monitoring |
| High channel isolation | ≥93 dB at 200kHz prevents crosstalk between channels during simultaneous sampling or multiplexed readouts |
Applications
| Industrial Sensor Signal Conditioning | Medical Instrumentation Front-End |
|---|---|
Use Scenario: Amplifying low-level mV-range outputs from load cells, RTDs, or pressure transducers in PLC analog input modules. IC Role / Device Role / Timing Role: Dual-channel PGA provides programmable gain staging before ADC sampling; AGND enables true single-supply 24-bit sigma-delta conversion. Use Value: Eliminates manual gain-switching relays and reduces calibration points by supporting auto-ranging across ±10mV to ±10V inputs with <0.1dB inter-channel error. | Use Scenario: Conditioning ECG electrode signals with adaptive gain to handle varying patient impedance and motion artifacts. IC Role / Device Role / Timing Role: Simultaneous amplification of lead I and lead II signals using matched channels; zero-gain mode suppresses leads during lead-off detection. Use Value: Maintains phase coherence and amplitude accuracy between differential limb leads, improving common-mode rejection ratio (CMRR) by >10dB versus discrete solutions. |
| Automated Test Equipment (ATE) Channel Expansion | Portable Data Loggers |
Use Scenario: Adding synchronized, software-configurable gain stages to multi-channel DMM or waveform digitizer backplanes. IC Role / Device Role / Timing Role: Two independent PGAs per IC replace four discrete op amp + DAC combos; 3-bit interface integrates directly with FPGA GPIO. Use Value: Reduces board area by 65% and component count by 50% while guaranteeing ≤0.1dB gain tracking across temperature for metrology-grade accuracy. | Use Scenario: Battery-operated environmental monitors acquiring thermocouple, humidity, and gas sensor outputs with variable sensitivity. IC Role / Device Role / Timing Role: Single-supply operation (2.7V–5.5V) with rail-to-rail I/O maximizes usable ADC range from coin-cell or Li-ion sources. Use Value: Extends battery life via 2.5mA/channel quiescent current and enables 120dB dynamic range without external rail-splitting or gain-switching circuitry. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar programmable gain amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD8253ARMZ | Single-channel, SPI interface, G = 1/2/4/8/16/32/64/128; higher 25nV/√Hz noise; 10MHz GBW | Requires external sequencing for dual-channel use; lacks integrated AGND reference | Preferred when SPI control and higher max gain (128×) outweigh need for dual-channel matching |
| LTC6915IMS#PBF | Dual-channel, same MSOP-10 package, but G = 1/2/4/8/16/32/64/128; 12MHz GBW; 12nV/√Hz noise | Higher max gain and bandwidth; identical pinout and AGND architecture | Drop-in upgrade path when 128× gain or extended bandwidth is required without layout change |
Compared with AD8253ARMZ and LTC6915IMS#PBF, the LTC6911CMS-2#PBF offers superior channel matching (0.1dB vs ≥0.3dB), lower noise (10nV/√Hz vs 12–25nV/√Hz), and proven stability in single-supply sensor front-ends - making it optimal for precision dual-path measurement where inter-channel coherence is non-negotiable.
Availability
LTC6911CMS-2#PBF is available at Aetrix Electronics and suitable for industrial sensor interfaces, medical instrumentation front-ends, and automated test equipment requiring stable component supply, long-term lifecycle support, and guaranteed traceability.
Supply support for LTC6911CMS-2#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and healthcare markets.
The LTC6911 family was designed specifically for precision, low-noise, dual-channel programmable gain applications in data acquisition systems where channel matching, wide supply range, and rail-to-rail operation are essential.
FAQ
What gain settings does the LTC6911CMS-2#PBF support?
The LTC6911CMS-2#PBF supports eight discrete inverting voltage gains: 0 (mute), 1, 2, 4, 8, 16, 32, and 64 V/V, selected via its 3-bit parallel digital interface (G0–G2). These values are fixed and factory-trimmed - no external resistors or calibration are needed to achieve specified accuracy across temperature.
Does the LTC6911CMS-2#PBF require external components for basic operation?
No, the LTC6911CMS-2#PBF operates autonomously with only supply decoupling capacitors (≥0.1µF ceramic on V+ and V–). Its internal AGND pin eliminates the need for external reference dividers, and the matched resistor arrays are fully integrated - enabling functional operation with zero external passive components beyond bypassing.
How does the LTC6911CMS-2#PBF handle single-supply operation?
The LTC6911CMS-2#PBF generates an accurate mid-supply reference at the AGND pin internally, which serves as the DC common-mode point for both inputs and outputs. This allows true rail-to-rail input and output swing from a single 2.7V–10.5V supply - no external bias network or level-shifting circuitry is required.
What is the maximum operating temperature for the LTC6911CMS-2#PBF?
The LTC6911CMS-2#PBF is rated for operation from –40°C to 85°C (C/I grade). Its electrical specifications - including 0.1dB channel-to-channel gain match and 11MHz gain-bandwidth product - are guaranteed across this full industrial temperature range, not just at 25°C.
Can the LTC6911CMS-2#PBF drive a 500Ω load effectively?
Yes, the LTC6911CMS-2#PBF delivers rail-to-rail output swing into 500Ω loads: at ±5V supplies, output swing is within 190mV of each rail; at 5V single supply, swing is within 170mV of V+ and 125mV of V–. This ensures >4.6Vpp linear output range - sufficient for driving SAR or sigma-delta ADC drivers without external buffering.
LTC6911CMS-2#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Amplifier Type:
- Programmable Gain
- Number of Circuits:
- 2
- Output Type:
- Rail-to-Rail
- Slew Rate:
- 16V/µs
- Gain Bandwidth Product:
- 11 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- -
- Voltage - Input Offset:
- 2 mV
- Current - Supply:
- 3.1mA (x2 Channels)
- Current - Output / Channel:
- 35 mA
- Voltage - Supply Span (Min):
- 2.7 V
- Voltage - Supply Span (Max):
- 10.5 V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-MSOP
LTC6911CMS-2#PBF FAQ
1.How can I place an order for LTC6911CMS-2#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC6911CMS-2#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC6911CMS-2#PBF reliable?
The price and inventory of LTC6911CMS-2#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC6911CMS-2#PBF is usually 5 days.
3.What payment methods are accepted for LTC6911CMS-2#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC6911CMS-2#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC6911CMS-2#PBF?
LTC6911CMS-2#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC6911CMS-2#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC6911CMS-2#PBF?
For technical support, including LTC6911CMS-2#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC6911CMS-2#PBF requirements.
6.How does Aetrix verify that LTC6911CMS-2#PBF is sourced from the original manufacturer or authorized distributors?
All LTC6911CMS-2#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC6911CMS-2#PBF meets industry standards.
7.What is the process for return or replacement of LTC6911CMS-2#PBF?
All LTC6911CMS-2#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC6911CMS-2#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC6911CMS-2#PBF part is unused and in its original packaging.
Return procedure for LTC6911CMS-2#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC6911CMS-2#PBF Tags

-
LM358DT
STMicroelectronics

-
LM358DR
Texas Instruments

-
LM2904DR
Texas Instruments

-
LM358ADR
Texas Instruments
-
LM2904DGKR
Texas Instruments
-
LM324DR
Texas Instruments

-
MCP6006T-E/OT
Microchip Technology

-
MCP6006UT-E/OT
Microchip Technology

-
LM324PWR
Texas Instruments

-
LM2902PWR
Texas Instruments
-
LM2902DR
Texas Instruments

-
LM358P
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

