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Analog Devices Inc. LTC6912CDE-2#TRPBF

Part No.:
LTC6912CDE-2#TRPBF
Manufacturer:
Analog Devices Inc.
Category:
Special Purpose Amplifiers
Package:
12-WFDFN Exposed Pad
Datasheet:
AetrixLTC6912CDE-2#TRPBF.pdf
Description:
IC OPAMP PGA 2 CIRCUIT 12DFN
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Payment
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Inventory:2,023

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Product details

Overview

LTC6912CDE-2#TRPBF from Analog Devices (formerly Linear Technology) is a dual-channel, digitally programmable gain amplifier (PGA) with independent 3-wire SPI-controlled gain settings of 0, 1, 2, 4, 8, 16, 32, and 64 V/V per channel, rail-to-rail input/output operation, 12.6 nV/√Hz input voltage noise at 50 kHz, and 115 dB total system dynamic range - deployed in precision data acquisition systems for automatic gain control and dynamic signal ranging.

For engineers reviewing the LTC6912CDE-2#TRPBF datasheet, LTC6912CDE-2#TRPBF pinout, LTC6912CDE-2#TRPBF application, or LTC6912CDE-2#TRPBF equivalent, key selection criteria include verified channel-to-channel gain matching (≤0.1 dB), hardware shutdown capability (2 µA max at 2.7 V), DFN-12 package compatibility, and guaranteed –40°C to 85°C operation for industrial embedded designs.

Technical Context

The LTC6912CDE-2#TRPBF implements two matched, inverting amplifiers with internal AGND reference generation for single-supply operation, supporting supply voltages from 2.7 V to 10.5 V total. Its 3-wire SPI interface enables independent digital gain configuration per channel without external components.

Each channel features software-selectable low-power shutdown (state 1000), wired-OR output capability enabling analog multiplexing, and DC-coupled rail-to-rail I/O with ≤2 mV offset voltage over temperature. Gain bandwidth product reaches 30 MHz at G = 64, with THD of –84 dB at 10 kHz and 1 VRMS output.

Key Specifications

ParameterValue and Actual Design Meaning
Gain Range0, 1, 2, 4, 8, 16, 32, 64 V/V per channel - supports automatic ranging without external resistors or switches
Input Voltage Noise12.6 nV/√Hz at 50 kHz - enables high-resolution signal conditioning in sensor front-ends
Channel Matching≤0.1 dB gain mismatch - ensures consistent signal path scaling across dual channels in differential or interleaved systems
Supply Range2.7 V to 10.5 V total - operates from single 3.3 V or 5 V, or split ±2.5 V supplies
Dynamic Range115 dB system-level - achieved via low noise, low distortion (–84 dB THD), and rail-to-rail swing
Shutdown Current2 µA max (hardware), 200–325 µA (software) at 5 V - reduces power in idle states without losing configuration
Operating Temp–40°C to +85°C - qualified for industrial environments without derating

Pinout & Package

Package: 12-lead (4 mm × 3 mm) plastic DFN with exposed pad connected to V– (Pin 13); requires PCB soldering for thermal and electrical integrity.

Pin/TerminalCircuit RoleDesign Meaning
1 (OUTA)Channel A outputInverting amplified output; supports wired-OR with OUTB for analog MUX function
2 (V–)Negative supplyReference for exposed pad; must be connected to ground or negative rail
3 (OUTB)Channel B outputInverting amplified output; matches OUTA gain/phase characteristics
4 (V+)Positive supplyAccepts 2.7–10.5 V total supply; powers both amplifiers and SPI interface
5 (DGND)Digital groundSeparate ground return for SPI signals to minimize digital noise coupling
6 (DOUT)SPI serial outputReads back register status or diagnostic data; open-drain compatible
7 (INA)Channel A inverting inputHigh-impedance input (10 kΩ at G=1); accepts rail-to-rail common-mode signals
8 (AGND)Analog referenceInternally generated half-supply reference; enables single-supply operation
9 (INB)Channel B inverting inputMatched to INA; supports independent gain programming and signal routing
10 (CS/LD)SPI chip select / loadActive-low command latch; initiates gain update on rising edge after data transfer
11 (DIN)SPI serial inputAccepts 8-bit gain commands per channel (Q7–Q0); MSB-first protocol
12 (CLK)SPI clockSupports up to 10 MHz clock rate; timing validated down to 30 ns setup/hold

Key Features

FeatureDesign Value
Independent dual-channel SPI controlEnables asynchronous gain updates per channel without cross-talk or reconfiguration delay
Rail-to-rail input/output swingMaximizes dynamic range in low-voltage systems (e.g., 3.3 V ADC interfaces) without level-shifting
Hardware shutdown (SHDN not present in DFN)Not applicable - LTC6912CDE-2#TRPBF uses DFN-12 package; only software shutdown (state 1000) is available
Internal AGND referenceEliminates need for external resistor divider; simplifies single-supply design and improves PSRR
Wired-OR output capabilityAllows OUTA and OUTB to drive same node - enables 2:1 analog multiplexing without external diodes or switches

Applications

Medical InstrumentationIndustrial Data Acquisition

Use Scenario: Amplifying low-level biopotential signals (ECG, EEG) with variable gain to accommodate patient-specific amplitude ranges.

IC Role / Device Role / Timing Role: Dual PGA provides matched, low-noise, digitally adjustable gain per lead before ADC sampling.

Use Value: 12.6 nV/√Hz noise and 115 dB dynamic range preserve microvolt-level signal fidelity while enabling automatic gain switching between leads.

Use Scenario: Conditioning sensor outputs (strain gauges, RTDs) in PLC analog input modules with varying full-scale ranges.

IC Role / Device Role / Timing Role: Digitally reconfigurable gain stage adapts to different sensor sensitivities and excitation levels without hardware changes.

Use Value: ≤0.1 dB channel-to-channel gain match ensures accurate differential measurements; rail-to-rail I/O supports 0–5 V or 0–10 V system compliance.

Automated Test EquipmentCommunications Signal Chain

Use Scenario: Dynamic range extension in multi-channel ATE digitizers where input signal amplitudes vary widely across test fixtures.

IC Role / Device Role / Timing Role: Dual PGA acts as programmable front-end attenuator/amplifier, synchronized with ADC trigger for real-time gain optimization.

Use Value: SPI-controlled gain switching in <1 µs enables per-sample gain adaptation; 30 MHz GBW supports >10 MSPS sampling rates at G=64.

Use Scenario: IF signal conditioning in software-defined radio receivers requiring precise gain control across multiple frequency bands.

IC Role / Device Role / Timing Role: Low-distortion, low-noise PGA adjusts baseband signal level prior to ADC, maintaining SNR across modulation schemes.

Use Value: –84 dB THD at 10 kHz and 1 VRMS output preserves EVM in QAM-64/256; channel isolation >92 dB prevents inter-channel crosstalk.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual programmable gain amplifier applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
LTC6912IDE-2#TRPBFIdentical functionality and pinout; rated for –40°C to 85°C industrial grade with tighter initial offset spec (0.25 mV vs. 0.125 mV typical)Preferred for higher-precision calibration-critical systems where offset drift matters more than costSelect when guaranteed performance across full temperature range is required; same layout and firmware
AD8253ARMZSingle-channel, 10 MHz GBW, G = 1/10/100/1000; SPI interface; no hardware shutdown; 10-lead MSOP packageUsed where unidirectional high-gain scaling suffices and space allows separate channelsChoose for ultra-high gain (1000×) or lower cost per channel; requires two units for dual-channel operation

Compared with LTC6912IDE-2#TRPBF and AD8253ARMZ, the LTC6912CDE-2#TRPBF offers optimal balance of dual-channel integration, 64× maximum gain, DFN-12 compactness, and industrial-grade temperature qualification - making it ideal for space-constrained, multi-sensor data loggers and portable instrumentation.

Availability

LTC6912CDE-2#TRPBF is available at Aetrix Electronics and suitable for medical instrumentation, industrial data acquisition, and automated test equipment requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for LTC6912CDE-2#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors.

The LTC6912 family was designed specifically for precision, low-noise, digitally controlled analog signal conditioning in space- and power-constrained industrial and instrumentation systems - emphasizing gain accuracy, channel matching, and seamless SPI integration.

FAQ

What gain settings does the LTC6912CDE-2#TRPBF support?

The LTC6912CDE-2#TRPBF supports eight discrete gain settings per channel: 0, 1, 2, 4, 8, 16, 32, and 64 V/V, programmed independently via its 3-wire SPI interface. Gain state 0 provides >120 dB attenuation (effectively signal blocking), while all gains are inverting. The LTC6912CDE-2#TRPBF is the -2 variant, distinguishing it from the -1 variant (which offers 0, 1, 2, 5, 10, 20, 50, 100 V/V).

Does the LTC6912CDE-2#TRPBF support hardware shutdown?

No, the LTC6912CDE-2#TRPBF does not support hardware shutdown. That feature is exclusive to the GN-16 (SSOP) package variant (e.g., LTC6912CGN-2). The LTC6912CDE-2#TRPBF uses the DFN-12 package, which omits the SHDN pin. However, it fully supports software shutdown via SPI command state 1000, reducing per-channel current to 200–325 µA at 5 V.

What is the purpose of the AGND pin on the LTC6912CDE-2#TRPBF?

The AGND pin on the LTC6912CDE-2#TRPBF provides an internally generated half-supply reference voltage (e.g., 2.5 V with 5 V supply), enabling true rail-to-rail input operation in single-supply configurations without external bias networks. This eliminates external resistive dividers, improves PSRR, and simplifies system-level analog front-end design - a core feature confirmed in the LTC6912CDE-2#TRPBF datasheet Figure 1 and Applications section.

Can the LTC6912CDE-2#TRPBF outputs be wired-OR'd together?

Yes, the LTC6912CDE-2#TRPBF supports wired-OR output operation: OUTA and OUTB can be connected to a common node to implement a 2:1 analog multiplexer function. This is explicitly enabled by the device's open-loop output stage design and rail-to-rail swing capability. The LTC6912CDE-2#TRPBF datasheet confirms this in the FEATURES list and Typical Application diagram (TA01a), noting "Wired-OR Outputs Possible (2:1 Analog MUX Function)."

What is the maximum operating supply voltage for the LTC6912CDE-2#TRPBF?

The LTC6912CDE-2#TRPBF has a maximum total supply voltage of 10.5 V, defined as the potential difference between V+ and V– pins. It operates across a wide range: 2.7 V to 10.5 V total, supporting single supplies (e.g., 3.3 V, 5 V) or split supplies (e.g., ±2.5 V, ±5 V). Exceeding 10.5 V violates Absolute Maximum Ratings and risks permanent damage - a limit strictly enforced in all LTC6912CDE-2#TRPBF characterization and qualification testing.

LTC6912CDE-2#TRPBF Specifications

Product attributes
Attribute value
Manufacturer:
Analog Devices Inc.
Series:
-
Package/Case:
12-WFDFN Exposed Pad
Packaging:
Tape & Reel (TR)
Product Status:
Active
Type:
Programmable Gain
Applications:
Data Acquisition
Mounting Type:
Surface Mount
Grade:
-
Qualification:
-
Supplier Device Package:
12-DFN (4x3)

LTC6912CDE-2#TRPBF FAQ

1.How can I place an order for LTC6912CDE-2#TRPBF through Aetrix?

Please submit a Request for Quotation (RFQ) for LTC6912CDE-2#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for LTC6912CDE-2#TRPBF reliable?

The price and inventory of LTC6912CDE-2#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC6912CDE-2#TRPBF is usually 5 days.

3.What payment methods are accepted for LTC6912CDE-2#TRPBF?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC6912CDE-2#TRPBF transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for LTC6912CDE-2#TRPBF?

LTC6912CDE-2#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your LTC6912CDE-2#TRPBF order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for LTC6912CDE-2#TRPBF?

For technical support, including LTC6912CDE-2#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC6912CDE-2#TRPBF requirements.

6.How does Aetrix verify that LTC6912CDE-2#TRPBF is sourced from the original manufacturer or authorized distributors?

All LTC6912CDE-2#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC6912CDE-2#TRPBF meets industry standards.

7.What is the process for return or replacement of LTC6912CDE-2#TRPBF?

All LTC6912CDE-2#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC6912CDE-2#TRPBF, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The LTC6912CDE-2#TRPBF part is unused and in its original packaging.

Return procedure for LTC6912CDE-2#TRPBF:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

LTC6912CDE-2#TRPBF Tags

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