Analog Devices Inc. LTC6915IGN#PBF
- Part No.:
- LTC6915IGN#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 16-SSOP (0.154", 3.90mm Width)
- Datasheet:
-
LTC6915IGN#PBF.pdf
- Description:
- IC INST AMP 1 CIRCUIT 16SSOP
- Quantity:
- Payment:

- Shipping:

Inventory:681
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Product details
Overview
LTC6915IGN#PBF from Analog Devices (formerly Linear Technology) is a zero-drift, precision instrumentation amplifier with digitally programmable gain of 0, 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, or 4096 via parallel or SPI interface. It delivers 125dB CMRR at any gain, <10µV max input offset voltage, and rail-to-rail input/output operation on single 2.7V–6V or dual ±5.5V supplies - ideal for high-accuracy bridge sensor conditioning in industrial weighing systems.
For engineers reviewing the LTC6915IGN#PBF datasheet, LTC6915IGN#PBF pinout, LTC6915IGN#PBF application, or LTC6915IGN#PBF equivalent, key selection criteria include guaranteed 50nV/°C max offset drift over –40°C to 85°C, 0.1% typical gain accuracy at AV=1, 2.5µVP-P (0.01Hz–10Hz) input noise, and compatibility with both serial (SPI) and parallel gain control modes.
Technical Context
The LTC6915IGN#PBF employs charge-balanced sampled-data architecture with a 3kHz internal sampling frequency, converting differential inputs to single-ended signals before amplification by a zero-drift op amp. Its resistor-array-based gain switching ensures monotonicity and low nonlinearity (≤15ppm at AV=1).
It supports two digital interfaces: parallel mode (4-bit D0–D3 latched via HOLD_THRU) and serial SPI mode (8-bit shift register, MSB-first, daisy-chain capable). The GN package includes SHDN and SENSE pins for hardware shutdown and remote sensing; the IGN variant uses the 16-lead SSOP package rated for –40°C to 85°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Programmable Gain Range | 0, 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096 - enables precise signal scaling without external resistors or re-layout. |
| CMRR (AV = 1024) | 125dB (typ), 95dB (min, –40°C to 85°C) - maintains high rejection of common-mode interference in noisy industrial environments. |
| Input Offset Voltage | ±10µV (max, –40°C to 85°C) - ensures minimal DC error in low-level sensor outputs like strain gauges. |
| Offset Drift | ±50nV/°C (max, –40°C to 85°C) - guarantees stable baseline over wide temperature excursions without recalibration. |
| Supply Range | 2.7V to ±5.5V - supports battery-powered portable instruments and standard industrial rails. |
| Input/Output Swing | Rail-to-rail - maximizes dynamic range and simplifies level-shifting in single-supply systems. |
| Interface | SPI (CS/DIN/CLK/DOUT) or 4-bit parallel (D0–D3 + HOLD_THRU) - offers flexible microcontroller integration options. |
Pinout & Package
The LTC6915IGN#PBF is housed in a 16-lead narrow plastic SSOP (GN) package with exposed pad not present; thermal resistance θJA = 135°C/W. Pin 13 is REF (voltage reference), Pin 14 is SENSE (for remote load sensing), and Pin 1 is IN–.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 | IN– | Inverting analog input - connects to negative side of bridge or differential sensor. |
| 2 | IN+ | Noninverting analog input - connects to positive side of bridge or differential sensor. |
| 3 | V– | Negative supply - must be connected to system ground or negative rail; also ties exposed pad in DFN variants (not applicable here). |
| 4 | CS(D0) | Chip select (serial) / LSB gain code (parallel) - active-low SPI enable or gain bit 0. |
| 5 | HOLD_THRU | Parallel latch control - high enables 4-bit latch; low allows direct D0–D3 control (not available in DFN). |
| 6 | DIN(D1) | Serial data input / gain bit 1 - accepts SPI data or parallel gain code bit 1. |
| 7 | CLK(D2) | Serial clock / gain bit 2 - synchronizes SPI transfers or provides parallel gain code bit 2. |
| 8 | DOUT(D3) | Serial data output / gain bit 3 (MSB) - bidirectional in parallel mode; requires current-limiting resistor if driven above V+. |
| 9 | PARALLEL_SERIAL | Interface select - tied to V+ for parallel mode, V– for serial mode. |
| 10 | REF | Output reference voltage - sets DC level of OUT; typically connected to mid-supply or sensor excitation reference. |
| 11 | OUT | Amplified single-ended output - drives ADC inputs or downstream signal chains with rail-to-rail swing. |
| 12 | V+ | Positive supply - powers analog and digital sections; bypass capacitor required near pin. |
| 13 | SENSE | Remote sense input - improves gain accuracy when driving low-impedance loads with trace resistance. |
| 14 | SHDN | Hardware shutdown - pulls device into µA-level sleep when driven high; internal pull-down when floating. |
| 15 | DGND | Digital ground - separate from analog ground to minimize noise coupling into gain control logic. |
| 16 | NC | No connect - unused pin; must remain unconnected per datasheet. |
Key Features
| Feature | Design Value |
|---|---|
| Zero-drift architecture | Eliminates 1/f noise and enables sub-µV offset stability over time and temperature. |
| 14 discrete gain settings | Provides exact scaling ratios (e.g., 512× for thermocouple mV-to-V conversion) without trimming or calibration. |
| 125dB CMRR independent of gain | Maintains high common-mode rejection across full gain range - critical for EMI-prone industrial sensors. |
| Rail-to-rail I/O on 2.7V supply | Enables full-scale signal utilization in low-voltage battery-powered equipment. |
| Internal 3kHz sampling clock | Defines aliasing limit at 1.5kHz; simplifies anti-alias filtering for DC-coupled sensor applications. |
Applications
| Thermocouple Amplifiers | Electronic Scales |
|---|---|
Use Scenario: Amplifying µV-level thermocouple outputs (e.g., Type K, −200°C to +1350°C) with cold-junction compensation. IC Role / Device Role / Timing Role: Precision instrumentation amplifier with programmable gain and zero-drift offset correction. Use Value: Enables direct connection to 16-bit ADCs with ≤0.1°C resolution, leveraging 10µV max offset and 50nV/°C drift. | Use Scenario: Conditioning mV-output Wheatstone bridge signals from load cells in commercial/industrial scales. IC Role / Device Role / Timing Role: Differential-to-single-ended converter with selectable gain (e.g., 128× or 512×) and rail-to-rail output. Use Value: Delivers 125dB CMRR to reject power-line interference and 0.1% gain accuracy for NTEP-certified weight measurement. |
| Medical Instrumentation | Strain Gauge Amplifier |
Use Scenario: Biopotential signal acquisition (ECG, EEG) requiring ultra-low noise and high CMRR in compact wearable devices. IC Role / Device Role / Timing Role: Front-end amplifier with programmable gain and 2.5µVP-P (0.01Hz–10Hz) input noise. Use Value: Supports high-resolution digitization of sub-mV physiological waveforms without additional filtering stages. | Use Scenario: High-precision structural monitoring using bonded foil or semiconductor strain gauges in test benches or civil infrastructure. IC Role / Device Role / Timing Role: Low-drift, high-gain amplifier for quarter/half/full-bridge configurations with remote SENSE capability. Use Value: Compensates for PCB trace resistance between amplifier and load, preserving gain accuracy down to 0.01%. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar instrumentation amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD8420ARMZ | Fixed gain (10, 100, 500); no digital programming; 130dB CMRR; 50nV/°C drift; SOIC-8 package. | Requires external gain-setting resistors or multiple BOM variants; lacks SPI/parallel interface flexibility. | Select when fixed-gain simplicity and smaller footprint outweigh programmability needs. |
| LTC6916IG#PBF | Same family, but 8-pin SOIC; gain range 1–128 only; no zero-drift architecture; 60µV max offset; 120dB CMRR. | Lower precision and narrower gain range; suitable for cost-sensitive, lower-accuracy applications. | Choose for space-constrained designs where 125dB CMRR and sub-10µV offset are not required. |
Compared with AD8420ARMZ and LTC6916IG#PBF, the LTC6915IGN#PBF uniquely combines 14-step programmable gain, zero-drift performance, and rail-to-rail operation in a single 16-pin SSOP - enabling adaptive sensor scaling and long-term DC stability without hardware changes.
Availability
LTC6915IGN#PBF is available at Aetrix Electronics and suitable for electronic scales, medical instrumentation, thermocouple measurement, and strain gauge amplification requiring stable component supply across extended temperature ranges.
Supply support for LTC6915IGN#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and healthcare markets.
The LTC6915IGN#PBF belongs to ADI's precision instrumentation amplifier product line, designed specifically for high-accuracy, low-drift sensor signal conditioning in demanding industrial and medical applications.
FAQ
What is the operating temperature range of the LTC6915IGN#PBF?
The LTC6915IGN#PBF is specified for operation from –40°C to +85°C, matching the "I" grade industrial temperature range. This is confirmed in the Order Information table and Absolute Maximum Ratings section of the datasheet, where the IGN suffix explicitly denotes this extended range.
Does the LTC6915IGN#PBF support both SPI and parallel gain control?
Yes, the LTC6915IGN#PBF supports both interfaces. The PARALLEL_SERIAL pin selects mode: tied to V+ enables 4-bit parallel control (D0–D3), while tied to V– enables SPI (CS/DIN/CLK/DOUT). HOLD_THRU enables latching in parallel mode. This dual-interface capability is documented in the Block Diagrams and Operation sections.
What is the maximum input differential voltage allowed for the LTC6915IGN#PBF?
The LTC6915IGN#PBF limits the input differential voltage by the equation V– ≤ (VIN+ – VIN–) + VREF ≤ V+ – 1.3V. For example, with V+ = 5V, V– = 0V, and VREF = 0.2V, the maximum differential input is 3.5V. This constraint prevents internal node saturation and is specified in the "Input Voltage Range" subsection of the Operation chapter.
Can the LTC6915IGN#PBF be used with a single 3V supply?
Yes, the LTC6915IGN#PBF operates down to 2.7V single supply (V+ = 3V, V– = 0V). It maintains rail-to-rail input/output swing, 125dB CMRR, and <10µV offset under these conditions - verified in Electrical Characteristics tables for V+ = 3V, V– = 0V, VREF = 200mV.
What is the purpose of the SENSE pin on the LTC6915IGN#PBF?
The SENSE pin (Pin 14) on the LTC6915IGN#PBF enables remote sensing of the output load to compensate for voltage drop across PCB traces. When connected directly to the load, it improves gain accuracy for low-impedance loads - a feature unique to the GN-package variants like LTC6915IGN#PBF and explicitly described in the Pin Functions section.
LTC6915IGN#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-SSOP (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Amplifier Type:
- Instrumentation
- Number of Circuits:
- 1
- Output Type:
- Rail-to-Rail
- Slew Rate:
- 0.2V/µs
- Gain Bandwidth Product:
- 200 kHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 4 nA
- Voltage - Input Offset:
- 5 µV
- Current - Supply:
- 1.73mA
- Current - Output / Channel:
- -
- Voltage - Supply Span (Min):
- 2.7 V
- Voltage - Supply Span (Max):
- 11 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SSOP
LTC6915IGN#PBF FAQ
1.How can I place an order for LTC6915IGN#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC6915IGN#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC6915IGN#PBF reliable?
The price and inventory of LTC6915IGN#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC6915IGN#PBF is usually 5 days.
3.What payment methods are accepted for LTC6915IGN#PBF?
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4.How is shipping managed for LTC6915IGN#PBF?
LTC6915IGN#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC6915IGN#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC6915IGN#PBF?
For technical support, including LTC6915IGN#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC6915IGN#PBF requirements.
6.How does Aetrix verify that LTC6915IGN#PBF is sourced from the original manufacturer or authorized distributors?
All LTC6915IGN#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC6915IGN#PBF meets industry standards.
7.What is the process for return or replacement of LTC6915IGN#PBF?
All LTC6915IGN#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC6915IGN#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC6915IGN#PBF part is unused and in its original packaging.
Return procedure for LTC6915IGN#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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