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Analog Devices Inc. LTC691CSW#PBF
- Part No.:
- LTC691CSW#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
LTC691CSW#PBF.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 16SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:3,155
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Product details
Overview
LTC691CSW#PBF from Analog Devices (formerly Linear Technology) is a 16-pin microprocessor supervisory IC with integrated battery backup switching, power-fail warning, watchdog timer, and RAM write-protection gating. It features a 4.65V precision reset threshold, guaranteed RESET assertion down to VCC = 1V, 50ms typical reset active time, 1.5mA max supply current, and supports CMOS RAM backup via VOUT with 50mA output capability. It is used in embedded systems requiring reliable power monitoring and nonvolatile memory protection during brownouts.
For engineers reviewing the LTC691CSW#PBF datasheet, LTC691CSW#PBF pinout, LTC691CSW#PBF application, or LTC691CSW#PBF equivalent, key selection criteria include guaranteed low-VCC reset behavior, adjustable reset timing via OSC SEL/OSC IN, dual reset outputs (RESET and RESET), and conditional CE OUT gating for write-protecting battery-backed RAM - all in a wide SO-16 package rated for 0°C to 70°C operation.
Technical Context
The LTC691CSW#PBF integrates five core subsystems: (1) a precision 4.65V bandgap-based voltage monitor with 40mV hysteresis and 10µs response; (2) a charge-pumped NMOS VOUT switch (5Ω typical RDS(on)) delivering up to 50mA from VCC, plus a 125Ω PMOS backup path from VBATT; (3) a dual-mode watchdog timer with internal oscillator (100ms/1.6s timeout) or external clock input; (4) a power-fail comparator (1.3V reference, ±25nA input bias) driving PFO; and (5) a CE IN/CE OUT gating circuit with 20ns propagation delay and forced-high CE OUT during reset.
Its 16-pin SW package enables full feature set vs. 8-pin variants: dedicated BATT ON, LOWLINE, OSC SEL, OSC IN, WDI, PFI, PFO, and dual RESET outputs. The device operates across VCC = 4.75–5.5V and VBATT = 2.0–4.25V, with thermal shutdown at ~155°C and short-circuit protection on VOUT. Battery switchover occurs at VCC–VBATT = +70mV (power-up) and –50mV (power-down), with 20mV hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reset Threshold | 4.65V typical; ensures µP reset before VCC drops below 4.75V (5% tolerance), with 40mV hysteresis to reject noise. |
| Reset Active Time | 50ms typical (adjustable via OSC SEL/OSC IN); holds µP in reset long enough for power & CPU stabilization after power-up. |
| VOUT Output Capability | 50mA from VCC (5Ω RDS(on)), 250µA from VBATT (125Ω RDS(on)); powers CMOS RAM during main supply loss. |
| Supply Current | 1.5mA max (active), 1µA max (battery-backup mode); minimizes primary supply loading and extends backup runtime. |
| Watchdog Timeout | 100ms (short) or 1.6s (long) with internal oscillator; detects firmware hangs by requiring WDI toggling within timeout window. |
| Power-Fail Detection | 1.3V reference comparator (PFI/PFO); triggers early warning when input voltage falls below user-defined threshold. |
| Operating Temp Range | 0°C to 70°C; validated for commercial industrial control, instrumentation, and computing applications. |
Pinout & Package
Package: 16-lead wide plastic SO (SW), 7.5mm × 10.3mm body, 1.27mm pitch, RoHS-compliant lead-free finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 VBATT | Battery backup input | Accepts 2.0–4.25V auxiliary supply; internally switches VOUT to VBATT when VCC drops below VBATT –50mV. |
| 2 VOUT | Backed-up memory power output | Delivers up to 50mA from VCC (NMOS switch) or 250µA from VBATT (PMOS switch); bypass with ≥0.1µF capacitor. |
| 3 VCC | Main 5V supply input | Monitored for reset; powers internal circuitry; requires 0.1µF local bypass capacitor. |
| 4 GND | Ground reference | Common return for all analog/digital functions; must be low-impedance connection. |
| 5 BATT ON | Battery-on status output | Active-low open-drain signal indicating VOUT is sourced from VBATT; sinks 35mA to drive external PNP transistor base. |
| 6 LOWLINE | Low-line detection output | Active-low logic output mirroring VCC comparator C1; goes low when VCC < 4.65V and returns high immediately upon recovery. |
| 7 OSC IN | Oscillator input | Accepts external clock or capacitor (47pF typical) to adjust reset/watchdog timing; disabled when OSC SEL = high. |
| 8 OSC SEL | Oscillator selection input | High/floating = internal oscillator (fixed 50ms reset); low = external clock/capacitor mode (adjustable timing). |
| 9 RESET | Active-low µP reset output | Guaranteed logic low down to VCC = 1V; minimum 35ms pulse width; asserted on VCC drop, watchdog timeout, or pushbutton. |
| 10 RESET | Active-high µP reset output | Inverse of RESET; open-drain with weak 3µA pull-up; used where active-high reset is required. |
| 11 WDO | Watchdog timeout output | Active-low signal indicating watchdog expiration; resets on WDI transition or LOWLINE low; disabled if WDI floating. |
| 12 CE IN | Chip-enable input | Logic input (0.8V/2.0V thresholds) from µP address decoder; gated through CE OUT during reset. |
| 13 CE OUT | Gated chip-enable output | Buffered CE IN during normal operation; forced high during reset to disable RAM writes and protect data integrity. |
| 14 WDI | Watchdog input | Three-level input (low/high/floating); transitions reset watchdog timer; floating disables watchdog function. |
| 15 PFO | Power-fail output | Active-low comparator output; goes low when PFI < 1.3V; forced low during battery-backup mode. |
| 16 PFI | Power-fail input | Non-inverting input to 1.3V reference comparator; accepts voltage divider from unregulated/regulator output for early warning. |
Key Features
| Feature | Design Value |
|---|---|
| Guaranteed reset at VCC = 1V | Ensures µP remains held in valid reset state even during severe brownout, preventing undefined execution. |
| Dual reset outputs (RESET/RESET) | Supports both active-low and active-high µP reset requirements without external inverters, reducing BOM count. |
| Conditional CE OUT gating | Forces RAM chip-enable high during reset or low-VCC events, eliminating need for external logic to prevent corrupted writes. |
| Adjustable reset/watchdog timing | OSC SEL and OSC IN pins allow precise tuning of reset duration and watchdog timeout using external components or clock source. |
| Low-quiescent-current battery backup | 1µA max standby current in battery mode extends shelf life of coin-cell or supercapacitor backup sources. |
| Thermal shutdown protection | ~155°C trip point with 10°C hysteresis prevents damage during sustained overload or poor PCB heatsinking. |
Applications
| Industrial Control PLCs | Medical Diagnostic Instruments |
|---|---|
Use Scenario: Power monitoring in programmable logic controllers operating in factory environments with fluctuating 24VDC supplies converted to 5V. IC Role / Device Role / Timing Role: Supervisory IC providing brownout reset, early power-fail warning (PFO), and RAM write-protection (CE OUT) during line dips. Use Value: Prevents spurious I/O state changes and preserves configuration memory integrity during 5V rail sags below 4.65V. |
Use Scenario: Battery-backed data logging in portable ultrasound or ECG devices requiring >10-year nonvolatile storage retention. IC Role / Device Role / Timing Role: Dual-role supervisor: monitors main 5V supply (RESET), gates RAM writes (CE OUT), and switches VOUT to VBATT during AC loss. Use Value: Enables seamless transition to coin-cell backup with <1µA standby draw, preserving patient data without interruption. |
| Automotive Infotainment Head Units | Test & Measurement Equipment |
Use Scenario: Reset coordination and memory protection in automotive head units powered from vehicle battery (9–16V) with 5V LDO regulation. IC Role / Device Role / Timing Role: Monitors 5V rail for ignition-cycle transients; asserts RESET on cranking-induced dips; uses WDI to detect firmware lockups. Use Value: Eliminates boot failures during engine start by guaranteeing 35ms+ reset hold time even as VCC drops to 1V. |
Use Scenario: Power supervision in benchtop oscilloscopes and spectrum analyzers with FPGA-based control and SRAM buffers. IC Role / Device Role / Timing Role: Provides watchdog supervision (WDI/WDO), power-fail interrupt (PFO), and protected RAM access (CE OUT) during AC mains interruptions. Use Value: Allows graceful save-to-flash of acquisition data before shutdown, avoiding loss of critical measurement sessions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microprocessor supervisory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX691ACSE+ | 8-pin SO package; no CE IN/CE OUT, no LOWLINE, no OSC SEL/OSC IN; fixed 200ms reset time; no adjustable watchdog. | Lacks RAM write-protection gating and timing flexibility; suitable only for basic reset-only use cases. | Select when footprint and cost are prioritized over memory protection and configurable timing. |
| TPS3823MPW | TI part with 3.08V reset threshold, no battery backup, no watchdog, no CE gating; 5-pin SOT-23 package. | Designed for simple voltage monitoring only; cannot replace LTC691CSW#PBF in battery-backed RAM systems. | Choose only for non-backup applications requiring ultra-small size and single-voltage threshold monitoring. |
Compared with MAX691ACSE+ and TPS3823MPW, the LTC691CSW#PBF uniquely combines guaranteed 1V-reset operation, dual reset outputs, CE OUT write-protection, and adjustable timing - making it irreplaceable in systems requiring robust memory integrity during power transitions.
Availability
LTC691CSW#PBF is available at Aetrix Electronics and suitable for industrial control systems, medical diagnostic instruments, and automotive infotainment head units requiring stable component supply with long-term lifecycle support.
Supply support for LTC691CSW#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors.
The LTC691CSW#PBF belongs to the LTC690 family of microprocessor supervisory circuits, designed specifically for critical power monitoring, battery-backed memory protection, and system-level reliability in commercial and industrial embedded systems.
FAQ
What is the guaranteed minimum VCC level at which LTC691CSW#PBF asserts RESET?
The LTC691CSW#PBF guarantees RESET remains logic low down to VCC = 1V, ensuring the microprocessor stays in a defined reset state even during deep brownouts. This specification is verified across temperature and process corners, and is independent of the 4.65V nominal reset threshold - it reflects the internal output stage's ability to sink current at ultra-low supply voltages. This behavior is critical for preventing erratic µP operation in failing power conditions.
How does the CE OUT pin protect CMOS RAM in the LTC691CSW#PBF?
The CE OUT pin of the LTC691CSW#PBF acts as a gated version of CE IN: during normal operation (VCC ≥ 4.65V), it replicates CE IN with 20ns propagation delay; when VCC drops below the reset threshold or during watchdog timeout, CE OUT is forced high to disable RAM writes. This prevents corruption of battery-backed memory during power instability. Unlike using RESET alone, CE OUT provides precise, fast write-inhibition synchronized to the supply fault condition.
Can the reset active time of LTC691CSW#PBF be adjusted, and how?
Yes, the reset active time of LTC691CSW#PBF is adjustable via the OSC SEL and OSC IN pins. When OSC SEL is pulled low, an external capacitor (e.g., 47pF) between OSC IN and GND sets the reset duration per the formula in the datasheet; alternatively, an external clock applied to OSC IN allows precise timing control. With OSC SEL high or floating, the internal oscillator fixes reset time at 50ms typical. This flexibility enables optimization for specific µP startup requirements without changing hardware.
What is the function of the BATT ON pin on the LTC691CSW#PBF?
The BATT ON pin on the LTC691CSW#PBF is an open-drain logic output that goes low when VOUT is sourced from VCC and high when VOUT is switched to VBATT. It sinks up to 35mA and is intended to drive the base of an external PNP transistor, enabling higher-current backup power delivery beyond the 50mA limit of the internal VOUT switch. This extends the device's utility in systems requiring >50mA RAM backup current while maintaining low quiescent draw.
Does LTC691CSW#PBF support watchdog functionality, and what are its timeout options?
Yes, the LTC691CSW#PBF includes a configurable watchdog timer with two timeout modes: short period (~100ms) and long period (~1.6s), selected via the OSC SEL pin. The timer resets on every WDI pin transition (rising or falling edge) and asserts RESET and WDO if no transition occurs within the timeout window. WDI can be left floating to disable the watchdog. This provides flexible firmware hang detection without requiring external timing components.
LTC691CSW#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 4.65V
- Output:
- Open Drain or Open Collector
- Reset:
- Active High/Active Low
- Reset Timeout:
- 35ms Minimum
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SO
LTC691CSW#PBF FAQ
1.How can I place an order for LTC691CSW#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC691CSW#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC691CSW#PBF reliable?
The price and inventory of LTC691CSW#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC691CSW#PBF is usually 5 days.
3.What payment methods are accepted for LTC691CSW#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC691CSW#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC691CSW#PBF?
LTC691CSW#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC691CSW#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC691CSW#PBF?
For technical support, including LTC691CSW#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC691CSW#PBF requirements.
6.How does Aetrix verify that LTC691CSW#PBF is sourced from the original manufacturer or authorized distributors?
All LTC691CSW#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC691CSW#PBF meets industry standards.
7.What is the process for return or replacement of LTC691CSW#PBF?
All LTC691CSW#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC691CSW#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC691CSW#PBF part is unused and in its original packaging.
Return procedure for LTC691CSW#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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