Analog Devices Inc. LTC691IN#PBF
- Part No.:
- LTC691IN#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 16-DIP (0.300", 7.62mm)
- Datasheet:
-
LTC691IN#PBF.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 16DIP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC691IN#PBF from Analog Devices (formerly Linear Technology) is a 16-pin microprocessor supervisory IC with integrated battery backup switching, power-fail warning, watchdog timer, and RAM write-protection gating. It features a 4.65V precision reset threshold, guaranteed RESET assertion down to VCC = 1V, 35ms minimum reset active time (adjustable), 1.5mA max supply current, and operates over –40°C to +85°C. It is used in battery-backed embedded controllers requiring reliable power monitoring and memory integrity during brownouts.
For engineers reviewing the LTC691IN#PBF datasheet, LTC691IN#PBF pinout, LTC691IN#PBF application, or LTC691IN#PBF equivalent, this page delivers verified functional identity, validated pin roles, confirmed temperature-grade performance specs, real-world use cases for RAM protection and early power-fail warning, and two technically documented alternative parts with explicit differences in reset timing and feature set.
Technical Context
The LTC691IN#PBF integrates five core subsystems: a precision 4.65V bandgap-based voltage monitor with 40mV hysteresis and 10µs response; a charge-pumped NMOS VOUT switch (5Ω typical RDS(on), 50mA max) plus PMOS battery switchover (125Ω, 250µA max standby); a dual-mode watchdog timer (internal oscillator or external clock input); a power-fail comparator referenced to 1.3V with <2µs response; and a CE IN/CE OUT chip-enable gating circuit with 20ns propagation delay and forced-high fail-safe behavior.
Its 16-pin SO/Wide Plastic SO package supports full functionality including dual reset outputs (RESET and RESET), LOWLINE, BATT ON, PFO, WDO, OSC SEL, and OSC IN - enabling adjustable reset timing, external clock synchronization, and high-current auxiliary drive via external PNP transistor. The device remains fully operational across its specified industrial temperature range without derating.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reset Voltage Threshold | 4.65V typical; ensures µP reset activation before 5V rail drops below 4.75V (5% tolerance), preventing unstable operation. |
| Reset Active Time (min) | 35ms at VCC = 5V; guarantees sufficient hold time for µP power-up stabilization; adjustable via OSC IN/OSC SEL configuration. |
| VOUT Output Capability | 50mA max from VCC via NMOS switch (5Ω RDS(on)); supplies backed-up CMOS RAM with low dropout and fast transient response. |
| Battery Standby Current | 1µA maximum; minimizes drain on backup battery or supercapacitor during extended VCC loss. |
| Supply Current (active) | 1.5mA maximum; enables integration into low-power systems without significant overhead. |
| Operating Temperature | –40°C to +85°C; qualified for industrial and automotive under-hood environments without thermal derating. |
| Power-Fail Input Threshold | 1.3V internal reference; allows configurable early-warning detection of supply decay using external resistor divider. |
Pinout & Package
Package: 16-Lead Wide Plastic SO (SW package), RoHS-compliant, JEDEC MS-013AC, 10.3mm × 7.6mm body, 1.27mm pitch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VBATT | Battery input | Accepts 2.0V–4.25V auxiliary supply; triggers automatic switchover to VOUT when VCC falls below VBATT −50mV. |
| VCC | Main 5V supply input | Primary power source; monitored for reset assertion and used to drive VOUT via NMOS switch. |
| VOUT | Backed-up memory output | Delivers regulated 5V-equivalent to RAM; sourced from VCC (NMOS) or VBATT (PMOS) depending on switchover state. |
| GND | Ground reference | Common return for all analog and digital functions; requires low-inductance 0.1µF bypassing. |
| BATT ON | Battery-on logic output | Active-low signal indicating VOUT is sourced from VBATT; sinks 35mA to drive external PNP base. |
| LOWLINE | Low-line indicator | Active-low output mirroring VCC comparator status; transitions immediately on VCC crossing 4.65V threshold. |
| OSC IN | Oscillator input | Accepts external clock or capacitor (e.g., 47pF) to adjust reset/watchdog timing; disabled when OSC SEL = HIGH. |
| OSC SEL | Oscillator mode select | HIGH = internal oscillator (fixed 50ms typical reset); LOW = external timing control via OSC IN. |
| RESET | Active-low µP reset | Guaranteed logic low down to VCC = 1V; asserts for ≥35ms after power-up or watchdog timeout. |
| RESET | Active-high µP reset | Inverted replica of RESET; provides complementary interface for systems requiring active-high reset signaling. |
| WDO | Watchdog output | Active-low flag indicating watchdog timeout; resets high on any WDI transition or LOWLINE assertion. |
| CE IN | Chip-enable input | Accepts µP address/decoder signal; gated through CE OUT to protect RAM writes during brownout. |
| CE OUT | Protected chip-enable output | Buffered CE IN during normal operation; forced HIGH when VCC < 4.65V to disable RAM writes. |
| WDI | Watchdog input | Three-level input (HIGH/LOW/floating); timeout occurs if no transition within 100ms (short) or 1.6s (long) period. |
| PFI | Power-fail input | Non-inverting input to 1.3V comparator; used with external divider to trigger PFO before VCC reaches reset threshold. |
| PFO | Power-fail output | Active-low interrupt signal for µP; forced LOW when VCC < VBATT (battery-backup mode). |
Key Features
| Feature | Design Value |
|---|---|
| Guaranteed reset at VCC = 1V | Ensures µP remains held in defined reset state even during deep brownout, eliminating undefined behavior or latch-up. |
| Adjustable reset active time | Configurable via OSC IN/OSC SEL to match system-specific µP startup requirements beyond fixed 35ms/50ms defaults. |
| Charge-pumped NMOS VOUT switch | Eliminates substrate injection current into VBATT, preventing unintended lithium battery charging and enabling safe long-term backup. |
| Dual reset outputs (RESET / RESET) | Supports both active-low and active-high µP reset interfaces without external inverters, reducing BOM count and layout complexity. |
| Fail-safe CE OUT gating | Forces RAM chip-enable HIGH during undervoltage, preventing accidental writes to volatile/nonvolatile memory during power instability. |
| Integrated power-fail comparator | Provides early warning (via PFO) with <2µs response, enabling µP to execute controlled shutdown before RESET assertion. |
Applications
| Industrial Embedded Controller | Automotive Body Control Module |
|---|---|
Use Scenario: Microcontroller-based HVAC or lighting controller powered by vehicle battery with intermittent alternator output. IC Role / Device Role / Timing Role: Supervises 5V supply, asserts RESET on battery sag below 4.65V, switches VOUT to backup capacitor during cranking, and triggers PFO interrupt for graceful firmware save. Use Value: Prevents corrupted EEPROM writes and MCU lockup during engine start; 1µA standby current extends capacitor hold-up time to >24 hours. |
Use Scenario: Door module with nonvolatile RAM storing window position and mirror settings, exposed to wide ambient temperature swings. IC Role / Device Role / Timing Role: Monitors 5V rail derived from DC-DC converter; uses CE OUT to disable RAM writes during cold-cranking voltage dip; maintains data integrity across –40°C to +85°C. Use Value: Eliminates need for external level-shifting or discrete reset ICs; guaranteed 35ms reset pulse ensures reliable µP initialization after cold boot. |
| Medical Portable Monitor | Smart Energy Meter |
Use Scenario: Battery-powered patient monitor with SRAM storing real-time vitals; must retain data during AC power loss and battery swap. IC Role / Device Role / Timing Role: Provides VOUT from Li-ion battery during main power failure; uses BATT ON to enable external PNP switch for >50mA RAM supply; asserts RESET only after stable 5V recovery. Use Value: Charge-pumped NMOS architecture avoids battery overcharge risk; 1.5mA active supply current maximizes runtime between charges. |
Use Scenario: Utility meter with tamper-resistant FRAM logging energy consumption; requires write-protection during grid brownouts lasting seconds. IC Role / Device Role / Timing Role: Uses PFI/PFO to detect decaying 5V rail from backup capacitor; triggers µP interrupt 10ms before RESET to commit last kWh reading to FRAM via CE OUT gating. Use Value: Configurable reset timing aligns with FRAM write cycle duration; 40mV hysteresis prevents false resets from line noise on 230VAC-derived supply. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microprocessor supervisory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC690IN#PBF | 8-pin variant; lacks CE IN/CE OUT, RESET, LOWLINE, OSC IN, OSC SEL; fixed 35ms reset time; no adjustable timing. | Suitable only for basic reset + battery backup; cannot support RAM write protection or programmable watchdog. | Select when board space is constrained and advanced features (gating, dual reset, timing adjustment) are unnecessary. |
| MAX691ACPE+ | Pin-compatible 16-pin upgrade; identical reset threshold (4.65V) and VCC=1V guarantee; but lacks PFI/PFO, WDI/WDO, and CE gating; no battery switchover hysteresis spec. | Provides core reset/battery backup but no power-fail warning, watchdog, or memory protection - limited to legacy drop-in replacement. | Choose only for direct MAX690-family migration where existing layout must be preserved and advanced LTC691 features are unused. |
Compared with LTC690IN#PBF and MAX691ACPE+, the LTC691IN#PBF uniquely combines adjustable reset timing, dual reset polarity, fail-safe RAM write protection, and integrated power-fail warning - making it the only option among the three that supports full-featured, future-proof supervisory design in industrial and automotive applications.
Availability
LTC691IN#PBF is available at Aetrix Electronics and suitable for industrial embedded controllers, automotive body electronics, and portable medical devices requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LTC691IN#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) acquired Linear Technology in 2017 and maintains full technical and manufacturing continuity for the LTC product family, including rigorous qualification to industrial and automotive standards.
The LTC691IN#PBF belongs to the LTC690 family of microprocessor supervisory circuits, designed specifically to consolidate reset generation, battery backup switching, power-fail warning, watchdog timing, and RAM write protection into a single IC for space-constrained, high-reliability embedded systems.
FAQ
What is the guaranteed minimum reset pulse width for LTC691IN#PBF at –40°C?
The LTC691IN#PBF guarantees a minimum reset active time of 35ms over its full operating temperature range (–40°C to +85°C), as specified in the Electrical Characteristics table under "Reset Active Time (LTC690/91)" with condition "l" denoting temperature-range applicability. This ensures reliable µP initialization even in extreme cold environments without requiring external timing components.
Does LTC691IN#PBF support external adjustment of the watchdog timeout period?
Yes, the LTC691IN#PBF supports external adjustment of the watchdog timeout period via the OSC IN and OSC SEL pins. When OSC SEL is pulled low, an external clock signal or capacitor (e.g., 47pF to GND) applied to OSC IN sets the timeout - enabling short-period (≈100ms) or long-period (≈1.6s) modes independent of internal oscillator drift, as confirmed in the Electrical Characteristics table and Applications Information section.
How does LTC691IN#PBF prevent unintended battery charging in lithium-based backup systems?
The LTC691IN#PBF uses a charge-pumped NMOS power switch (M1) instead of a PNP transistor for VOUT sourcing, eliminating substrate injection current that would otherwise flow into the VBATT pin. As stated in the Applications Information section, this architecture ensures only junction leakage current (≤1µA) is collected at VBATT - preventing overcharging and degradation of lithium batteries or capacitors used for memory backup.
Can LTC691IN#PBF operate with a 3.3V main supply instead of 5V?
No, the LTC691IN#PBF is specified only for 4.75V to 5.5V VCC operation per the "Battery Back-Up Switching Operating Voltage Range" table. Its 4.65V reset threshold and internal bandgap reference are calibrated for 5V systems; applying 3.3V would prevent proper reset assertion and disable VOUT regulation, making it incompatible with 3.3V-only designs.
What is the maximum continuous output current capability of VOUT on LTC691IN#PBF when powered from VCC?
The VOUT pin of the LTC691IN#PBF delivers up to 50mA continuously when sourced from VCC, as confirmed in the "VOUT Output Voltage" Electrical Characteristics table (IOUT = 50mA condition) and the Applications Information section, which states "This power switch can deliver up to 50mA to VOUT from VCC and has a typical on resistance of 5Ω." Exceeding this current risks thermal shutdown.
LTC691IN#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 4.65V
- Output:
- Open Drain or Open Collector
- Reset:
- Active High/Active Low
- Reset Timeout:
- 35ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 16-PDIP
LTC691IN#PBF FAQ
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5.How can I obtain technical support or documentation for LTC691IN#PBF?
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6.How does Aetrix verify that LTC691IN#PBF is sourced from the original manufacturer or authorized distributors?
All LTC691IN#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC691IN#PBF meets industry standards.
7.What is the process for return or replacement of LTC691IN#PBF?
All LTC691IN#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC691IN#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC691IN#PBF part is unused and in its original packaging.
Return procedure for LTC691IN#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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