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Analog Devices Inc. LTC6945IUFD#TRPBF
- Part No.:
- LTC6945IUFD#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 28-WFQFN Exposed Pad
- Datasheet:
-
LTC6945IUFD#TRPBF.pdf
- Description:
- IC SYNTHESIZER INTEGER N 28QFN
- Quantity:
- Payment:
- Shipping:
Inventory:2,835
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Product details
Overview
LTC6945IUFD#TRPBF from Analog Devices (formerly Linear Technology) is an ultralow-noise, 0.35GHz–6GHz integer-N PLL synthesizer with integrated VCO output divider (1–6), differential RF output buffer (–6dBm to +3dBm), and low-noise reference buffer (10MHz–250MHz, 0dBm typical into 50Ω). It delivers –226dBc/Hz normalized in-band phase noise floor and –157dBc/Hz wideband output phase noise floor, targeting high-performance LO generation in microwave data links and wireless infrastructure.
For engineers reviewing the LTC6945IUFD#TRPBF datasheet, LTC6945IUFD#TRPBF pinout, LTC6945IUFD#TRPBF application, or LTC6945IUFD#TRPBF equivalent, key selection criteria include its 28-lead 4mm × 5mm QFN package, SPI-controlled configuration, charge pump current range (250µA–11.2mA), –40°C to 105°C operating junction temperature, and verified performance with Crystek CVCO55CL-0902-0928 and RFMD UMX-586-D16-G VCOs.
Technical Context
The LTC6945IUFD#TRPBF implements a fully integrated PLL architecture comprising a reference divider (R = 1–1023), phase-frequency detector with programmable lock window (3ns–90ns), 12-bit charge pump (ICP = 250µA–11.2mA), integer feedback divider (N = 32–65535), and buffered VCO output divider (O = 1–6). Its differential RF output supports 50% duty cycle and user-selectable single-ended or differential operation via external termination.
It features dual-mode reference buffering (differential REF± input, REFO square-wave output), configurable status reporting via STAT pin and SPI-accessible register, and advanced charge pump functions including high/low voltage clamps (VCLMP(HI)/VCLMP(LO)), mid-supply bias (VMID), and forced source/sink modes - all controlled through a 4-wire SPI interface compliant with standard CMOS timing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCO Input Range | 350MHz to 6000MHz - supports full-band microwave LO synthesis without band switching. |
| RF Output Power | –6dBm to +3dBm (single-ended, fRF = 900MHz, RFO[1:0] = 0–3) - enables direct drive of mixers or IF stages without external amplification. |
| Normalized In-Band Phase Noise | –226dBc/Hz - sets industry-leading spectral purity for narrowband applications like LTE/W-CDMA base stations. |
| Charge Pump Current Range | 250µA to 11.2mA (12 discrete settings) - allows precise loop filter impedance tuning to optimize phase margin and settling time. |
| Reference Input Frequency | 10MHz to 250MHz - accommodates crystal oscillators, TCXOs, and clock generators across telecom and test equipment. |
| Operating Temperature | –40°C to +105°C (junction) - qualified for industrial and outdoor wireless infrastructure deployments. |
| Supply Voltages | VREF+/VD+/VRF+/VVCO+ = 3.15V–3.45V; VCP+ = 3.15V–5.25V - supports mixed-voltage system integration with 3.3V digital and 5V analog rails. |
Pinout & Package
Package: 28-lead (4mm × 5mm) plastic QFN (UFD), exposed pad (Pin 29) soldered to PCB ground plane for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VREFO+ (1) | REFO supply rail | 3.15V–3.45V dedicated supply for reference output buffer; requires local 0.1µF bypass to GND. |
| REFO (2) | Reference output | Differential buffer output (10–250MHz, 0dBm typ into 50Ω); AC-coupled via 22nF capacitor. |
| STAT (3) | Status indicator | Configurable OR of LOCK/UNLOCK/THI/TLO flags; driven by internal status register or SPI control. |
| CS (4) | SPI chip select | Active-low CMOS input initiating serial communication bursts; must meet tCSS ≥10ns setup requirement. |
| SCLK (5) | SPI clock | Rising-edge sampled CMOS clock; minimum 25ns high/low pulse width required. |
| SDI (6) | SPI data input | CMOS serial data input; 6ns setup/hold relative to SCLK edge per timing spec. |
| SDO (7) | SPI data output | Three-state CMOS output presenting register reads; Hi-Z leakage ≤±1µA. |
| VD+ (8) | Digital supply | 3.15V–3.45V supply for SPI interface and logic; bypassed with 0.1µF ceramic capacitor. |
| MUTE (9) | RF output disable | Active-low CMOS input muting RF± outputs in <170ns; preserves internal bias for fast re-enable. |
| RF– / RF+ (11–12) | Differential RF output | Open-collector outputs with 136Ω pull-ups to VRF+; require 50Ω termination for single-ended use. |
| VRF+ (13) | RF output supply | 3.15V–3.45V supply for RF buffer; bypassed with 0.01µF ceramic capacitor near pin. |
| BB (14) | RF reference bypass | Internal bias node requiring 1.0µF ceramic capacitor to GND; no signal coupling permitted. |
| VCO– / VCO+ (15–16) | VCO input | Differential self-biased inputs (350–6000MHz); AC-coupled with 1µF caps; 121Ω single-ended input impedance. |
| VVCO+ (22) | VCO buffer supply | 3.15V–3.45V supply for VCO input amplifier; bypassed with 0.01µF ceramic capacitor. |
| VCP+ (24) | Charge pump supply | 3.15V–5.25V supply for charge pump; supports clamp voltages and mid-bias functionality. |
| CP (25) | Charge pump output | Bidirectional current output connected to external loop filter; voltage swing limited by VCLMP(HI)/VCLMP(LO). |
| VREF+ (26) | Reference input supply | 3.15V–3.45V supply for REF± buffer; bypassed with 0.1µF ceramic capacitor. |
| REF– / REF+ (27–28) | Differential reference input | High-impedance self-biased inputs (10–250MHz); require 1µF AC-coupling; BST/FILT bits configure gain/filtering. |
| GND (10,17–21,23,29) | Ground connections | Multiple dedicated ground pins plus exposed pad (Pin 29) - all must connect directly to PCB ground plane with thermal vias. |
Key Features
| Feature | Design Value |
|---|---|
| Ultralow normalized in-band phase noise | –226dBc/Hz enables sub-0.1° RMS jitter in 1GHz sample clocks for high-speed ADCs/DACs. |
| Programmable RF output power | Four selectable levels (–6dBm to +3dBm) allow optimization of mixer LO drive level without external attenuators or amplifiers. |
| Integrated reference output buffer | Delivers 0dBm square wave at 10MHz into 50Ω with –155dBc/Hz phase noise - eliminates need for external reference distribution IC. |
| Configurable charge pump clamps | VCLMP(HI) and VCLMP(LO) prevent loop filter saturation during VCO tuning voltage transients or startup. |
| SPI-compatible serial interface | 4-wire interface with status register readback supports real-time lock monitoring and dynamic reconfiguration in field-deployed systems. |
| RF output mute with fast enable/disable | 110ns mute enable and 170ns mute disable times support TDD-based protocols and burst-mode transmission. |
Applications
| Wireless Base Station LO Generation | Microwave Data Link Transceivers |
|---|---|
Use Scenario: Generating stable 2.1GHz and 3.5GHz local oscillator signals for LTE-A and 5G NR FDD/TDD radio units. IC Role / Device Role / Timing Role: Integer-N PLL synthesizer providing phase-locked RF output with –226dBc/Hz normalized in-band phase noise and <0.13° RMS integrated jitter. Use Value: Enables EVM <2.5% at 256-QAM modulation while meeting 3GPP spectral mask requirements for adjacent channel leakage ratio (ACLR). | Use Scenario: Synthesizing 5.8GHz and 24GHz carrier frequencies in point-to-point backhaul radios with 400MHz channel bandwidth. IC Role / Device Role / Timing Role: High-frequency integer-N PLL driving external VCOs (e.g., Crystek CVCO55CL-0902-0928) with ultra-low spurious content (<–102dBc). Use Value: Achieves BER <1E–12 over 10km links by maintaining –157dBc/Hz wideband phase noise floor and suppressing reference spurs. |
| Test & Measurement Signal Sources | Military Secure Radio Synthesizers |
Use Scenario: Serving as core frequency engine in portable RF signal analyzers requiring rapid frequency hopping and low phase noise across 10MHz–6GHz. IC Role / Device Role / Timing Role: Programmable PLL with 250kHz–100MHz PFD frequency range and SPI-controlled N/R/O dividers enabling sub-100ns frequency switching. Use Value: Supports <1ms frequency settling with <0.5ppm accuracy, meeting IEEE 1114 calibration standards for portable instrumentation. | Use Scenario: Providing jam-resistant, low-probability-of-intercept (LPI) LO signals in SATCOM terminals operating in contested RF environments. IC Role / Device Role / Timing Role: Secure PLL with configurable lock detection (tLWW = 3–90ns), THI/TLO monitoring, and hardware-mute capability for EMCON compliance. Use Value: Enables rapid frequency agility and deterministic lock/unlock response under electronic warfare conditions without software dependency. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar integer-N PLL synthesizer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| HMC703LP4E | Higher max fVCO (13GHz), integrated VCO, but higher phase noise floor (–219dBc/Hz normalized) and no REFO buffer. | Preferred for compact, single-chip solutions where board space > phase noise; unsuitable when external VCO selection or reference distribution is required. | Select HMC703LP4E only if integrated VCO meets frequency/stability specs and REFO functionality is unnecessary. |
| ADF4355BCPZ | Fractional-N architecture, wider frequency coverage (137MHz–6.8GHz), but higher in-band phase noise (–223dBc/Hz) and no programmable REFO output. | Better for wideband frequency agility and fine resolution; less optimal for fixed-frequency, ultra-low-jitter applications like data converter sampling clocks. | Choose ADF4355BCPZ when fractional division is needed for non-integer multiples or when wider tuning range outweighs phase noise penalty. |
Compared with HMC703LP4E and ADF4355BCPZ, the LTC6945IUFD#TRPBF offers superior normalized in-band phase noise (–226dBc/Hz), integrated reference output buffering, and lower wideband noise floor (–157dBc/Hz), making it optimal for fixed-frequency, low-jitter LO generation where spectral purity is critical.
Availability
LTC6945IUFD#TRPBF is available at Aetrix Electronics and suitable for wireless infrastructure, microwave backhaul, and test & measurement applications requiring stable component supply, extended temperature operation, and traceable sourcing.
Supply support for LTC6945IUFD#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving communications, industrial, automotive, and healthcare markets.
The LTC6945IUFD#TRPBF belongs to ADI's high-frequency PLL synthesizer product line, designed specifically for demanding RF signal generation in wireless infrastructure and precision instrumentation where ultralow phase noise and spurious performance are mandatory.
FAQ
What is the maximum VCO input frequency supported by the LTC6945IUFD#TRPBF?
The LTC6945IUFD#TRPBF supports a VCO input frequency range of 350MHz to 6000MHz, as specified in the Electrical Characteristics table under fVCO parameter. This full 6GHz range is guaranteed over the –40°C to +105°C junction temperature range with appropriate external VCO selection and loop filter design. Operation beyond 6GHz is not characterized or supported.
Does the LTC6945IUFD#TRPBF include an integrated VCO?
No, the LTC6945IUFD#TRPBF does not include an integrated VCO. It is a PLL synthesizer IC that requires an external VCO connected to the VCO+ and VCO– pins. The datasheet explicitly references external VCOs such as Crystek CVCO55CL-0902-0928 and RFMD UMX-586-D16-G for characterization, confirming its role as a VCO-agnostic PLL core.
How is the RF output power configured on the LTC6945IUFD#TRPBF?
The RF output power on the LTC6945IUFD#TRPBF is configured using the RFO[1:0] bits in the serial port register map. Four discrete output power levels are available: –6.0dBm, –3.6dBm, –0.4dBm, and +2.3dBm (all measured single-ended at 900MHz into 50Ω with LC matching network). These settings are independent of output divider selection and apply across the full 350MHz–6000MHz RF output frequency range.
What is the function of the BB pin on the LTC6945IUFD#TRPBF?
The BB (Bias Bypass) pin (Pin 14) on the LTC6945IUFD#TRPBF is an internal bias reference node requiring mandatory 1.0µF ceramic capacitor connection to GND. It must not be coupled to any other signal or left floating. This capacitor stabilizes internal reference voltages for the RF output stage and ensures consistent output power and phase noise performance across temperature and supply variations.
Can the LTC6945IUFD#TRPBF generate a 100MHz reference output?
Yes, the LTC6945IUFD#TRPBF can generate a 100MHz reference output on the REFO pin (Pin 2). The REFO buffer supports 10MHz to 250MHz output frequencies with typical output power of –0.2dBm to +3.2dBm into 50Ω at 100MHz. The output is a low-impedance square wave requiring AC coupling via a 22nF capacitor and is fully programmable via SPI register control, including power-down capability using the PDREFO bit.
LTC6945IUFD#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- -
- PLL:
- Yes
- Input:
- Clock
- Output:
- Clock
- Number of Circuits:
- 1
- Ratio - Input:Output:
- 1:1
- Differential - Input:Output:
- Yes/Yes
- Frequency - Max:
- 6GHz
- Divider/Multiplier:
- Yes/No
- Voltage - Supply:
- 3.15V ~ 5.25V
- Operating Temperature:
- -40°C ~ 105°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 28-QFN (4x5)
LTC6945IUFD#TRPBF FAQ
1.How can I place an order for LTC6945IUFD#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC6945IUFD#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC6945IUFD#TRPBF reliable?
The price and inventory of LTC6945IUFD#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC6945IUFD#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC6945IUFD#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC6945IUFD#TRPBF transactions.
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4.How is shipping managed for LTC6945IUFD#TRPBF?
LTC6945IUFD#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC6945IUFD#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC6945IUFD#TRPBF?
For technical support, including LTC6945IUFD#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC6945IUFD#TRPBF requirements.
6.How does Aetrix verify that LTC6945IUFD#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC6945IUFD#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC6945IUFD#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC6945IUFD#TRPBF?
All LTC6945IUFD#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC6945IUFD#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC6945IUFD#TRPBF part is unused and in its original packaging.
Return procedure for LTC6945IUFD#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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