Analog Devices Inc. LTC694CS8#TRPBF
- Part No.:
- LTC694CS8#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
LTC694CS8#TRPBF.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC694CS8#TRPBF from Analog Devices (formerly Linear Technology) is an 8-pin microprocessor supervisory IC integrating power-on reset, battery backup switching, power-fail warning, and watchdog timer functions. It features a 4.65V precision reset threshold, guaranteed RESET assertion down to VCC = 1V, 140ms minimum reset active time, and supports CMOS RAM write protection via CE OUT gating. It is used in battery-backed embedded controllers requiring reliable power monitoring and fail-safe memory retention.
For engineers reviewing the LTC694CS8#TRPBF datasheet, LTC694CS8#TRPBF pinout, LTC694CS8#TRPBF application, or LTC694CS8#TRPBF equivalent, key selection criteria include guaranteed low-VCC reset behavior, integrated battery switchover with 50mA VOUT drive, adjustable reset timing via OSC SEL, PFI/PFO power-fail detection, and watchdog timeout periods of 100ms/1.6s - all in an SO-8 package rated for 0°C to 70°C operation.
Technical Context
The LTC694CS8#TRPBF implements a bandgap-referenced voltage comparator (C1) for precise 4.65V ±150mV reset threshold detection with 40mV hysteresis, ensuring immunity to supply transients. Its internal charge-pumped NMOS switch delivers up to 50mA to VOUT with 5Ω typical on-resistance during main power operation.
In battery backup mode, a 125Ω PMOS switch connects VBATT to VOUT, enabling standby current as low as 1µA while maintaining VOUT regulation. The watchdog timer uses either an internal oscillator (100ms/1.6s timeout) or external clock input (OSC IN), with timeout reset triggered by WDI transitions - floating WDI disables the function.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reset Threshold | 4.65V typical; ensures µP reset before VCC drops below 4.75V, with 40mV hysteresis preventing false triggers. |
| Reset Active Time | 140ms minimum (LTC694 family); holds RESET low long enough for full µP initialization after power-up. |
| VOUT Drive Capability | 50mA max at VCC ≥ 4.75V; sufficient to power small CMOS RAM banks without external boost. |
| Battery Backup Current | ≤1µA standby; enables multi-year operation from coin-cell batteries in memory-retention applications. |
| Watchdog Timeout | 100ms (short) / 1.6s (long); configurable via OSC SEL; resets µP if firmware fails to toggle WDI. |
| Power-Fail Detection | PFI threshold = 1.3V ±50mV; allows early warning of supply decay using external resistor divider. |
| Operating Temp Range | 0°C to 70°C; suitable for commercial-grade industrial and computing systems with stable thermal environments. |
Pinout & Package
Package: 8-lead plastic SO (S8), 150 mil width, JEDEC MS-012AC compliant. Thermal resistance θJA = 180°C/W (FR4, still air).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1: VBATT | Battery backup input | Accepts 2.0V–4.25V auxiliary supply; internally switches VOUT to VBATT when VCC falls below VBATT −50mV. |
| 2: VCC | Main 5V supply input | Monitored for reset; powers internal circuitry and drives VOUT via NMOS switch; bypass with 0.1µF capacitor. |
| 3: VOUT | Backed-up memory supply output | Delivers regulated 5V−0.05V (at 1mA) or 5V−0.5V (at 50mA); connected to VBATT in backup mode. |
| 4: PFO | Power-fail output | Open-drain logic-low signal when PFI < 1.3V; used to trigger µP shutdown before RESET asserts. |
| 5: PFI | Power-fail input | Non-inverting input to comparator C3; referenced to internal 1.3V; accepts voltage divider from unregulated/regulator output. |
| 6: GND | Analog/digital ground reference | Common return for all internal circuits; must be low-impedance connection to system ground plane. |
| 7: WDI | Watchdog input | Three-level input (high/low/floating); transition resets watchdog timer; floating disables watchdog function. |
| 8: RESET | Active-low reset output | Guaranteed logic-low down to VCC = 1V; drives µP reset pin; remains asserted ≥140ms after VCC crosses threshold. |
Key Features
| Feature | Design Value |
|---|---|
| Guaranteed reset at VCC = 1V | Ensures µP remains held in reset during brownout or deep discharge, preventing undefined execution states. |
| Integrated battery switchover | Automatic NMOS/PMOS switching between VCC and VBATT eliminates need for external diodes or controllers. |
| Fast CE OUT propagation | 20ns typical delay from CE IN to CE OUT enables real-time write-protection of CMOS RAM during supply faults. |
| Low-power backup mode | 1µA max supply current with VCC = 0V enables >10-year coin-cell life for static RAM retention. |
| Configurable watchdog timing | Two timeout ranges (100ms/1.6s) selectable via OSC SEL; supports both fast-response and long-interval supervision. |
Applications
| Industrial Control PLCs | Medical Diagnostic Handhelds |
|---|---|
Use Scenario: Programmable logic controller retains configuration and I/O state during AC mains interruption. IC Role / Device Role / Timing Role: LTC694CS8#TRPBF monitors 5V rail, asserts RESET on drop, switches VOUT to backup battery, and gates RAM CE to prevent corruption. Use Value: Enables seamless recovery within 140ms after power restoration, preserving operational integrity without manual reboot. |
Use Scenario: Portable ultrasound device maintains volatile calibration data and session history during battery swap. IC Role / Device Role / Timing Role: LTC694CS8#TRPBF detects impending power loss via PFI, triggers µP save routine via PFO interrupt, then asserts RESET only after safe shutdown. Use Value: Prevents data loss during hot battery replacement by decoupling backup enable from reset assertion timing. |
| Automotive Infotainment Gateways | Smart Energy Meters |
Use Scenario: Head unit retains user preferences and network pairing across ignition cycles and transient load dumps. IC Role / Device Role / Timing Role: LTC694CS8#TRPBF provides watchdog supervision of MCU firmware and guarantees RESET during cold-cranking (VCC dip to 1V). Use Value: Eliminates boot-loop failures caused by marginal VCC during engine start, improving field reliability. |
Use Scenario: Meter continues logging kWh and tariff data during grid outage using supercapacitor backup. IC Role / Device Role / Timing Role: LTC694CS8#TRPBF monitors DC-DC output, activates VOUT-to-supercap switchover, and asserts RESET only after EEPROM commit completes. Use Value: Achieves Class 0.5 accuracy compliance by ensuring timestamped energy data is never lost or corrupted. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microprocessor supervisory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX691ACSA+ | 8-pin SO, 4.65V reset threshold, but no integrated watchdog timer or CE OUT gating; 200ms fixed reset timeout. | Lacks PFI/PFO and WDI functionality; requires external components for power-fail warning or memory write protection. | Choose MAX691ACSA+ only if watchdog and memory gating are unnecessary and legacy pin compatibility is required. |
| TPS3823-46DBVR | 6-pin SOT-23, 4.63V reset threshold, 200ms timeout, no battery backup or PFI; includes manual reset input. | No VBATT support, no VOUT switching, no power-fail comparator - limited to basic reset-only use cases. | Select TPS3823-46DBVR for space-constrained designs where only reset supervision is needed and backup is handled externally. |
Compared with MAX691ACSA+ and TPS3823-46DBVR, the LTC694CS8#TRPBF uniquely integrates battery switchover, PFI/PFO detection, watchdog timer, and CE OUT memory gating in one SO-8 package - reducing BOM count and PCB area while enabling robust, self-contained power supervision.
Availability
LTC694CS8#TRPBF is available at Aetrix Electronics and suitable for industrial control PLCs, medical handheld diagnostics, automotive infotainment gateways, smart energy meters, and battery-backed data loggers requiring stable component supply across extended production lifecycles.
Supply support for LTC694CS8#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors.
The LTC694CS8#TRPBF belongs to the LTC690/LTC694 family of microprocessor supervisory ICs, designed specifically for fail-safe power monitoring, battery-backed memory retention, and watchdog supervision in embedded computing and instrumentation systems.
FAQ
What is the guaranteed minimum reset active time for LTC694CS8#TRPBF?
The LTC694CS8#TRPBF guarantees a minimum reset active time of 140ms after VCC rises above the 4.65V threshold. This is longer than the 35ms minimum of the LTC690/LTC691 family and ensures sufficient stabilization time for modern microprocessors and peripheral ICs before release from reset. The actual typical value is 200ms at 25°C and VCC = 5V.
Can LTC694CS8#TRPBF operate with a 3.3V main supply?
No - the LTC694CS8#TRPBF is specified only for 4.75V to 5.5V VCC operation per its Absolute Maximum Ratings and Electrical Characteristics table. Its 4.65V reset threshold and internal charge pump require a nominal 5V rail. For 3.3V systems, consider the LTC690CS8-33 variant or alternative supervisors like the TPS3808G33.
How does the battery switchover work in LTC694CS8#TRPBF?
The LTC694CS8#TRPBF compares VCC and VBATT using comparator C2. When VCC exceeds VBATT by 70mV, it connects VOUT to VCC via an NMOS switch (5Ω typical RDS(on)). When VCC falls to within 50mV of VBATT, it switches VOUT to VBATT through a PMOS switch (125Ω typical). Hysteresis prevents oscillation near the switchover point.
Is the watchdog timer in LTC694CS8#TRPBF enabled by default?
No - the watchdog timer in LTC694CS8#TRPBF is disabled by default. It activates only when the WDI pin is driven high or low for longer than the selected timeout period (100ms or 1.6s). Leaving WDI floating disables the watchdog entirely, allowing use of the part in reset-only applications without firmware modification.
What is the maximum load current supported by VOUT in battery backup mode?
In battery backup mode (VCC = 0V), the LTC694CS8#TRPBF delivers up to 250µA to VOUT with ≤0.2V dropout (VBATT − 0.2V). This is sufficient for static CMOS RAM retention but not for active memory access. For higher backup currents, external circuitry such as a PNP transistor driven by BATT ON is recommended per Figure 2 in the datasheet.
LTC694CS8#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 4.65V
- Output:
- Open Drain or Open Collector
- Reset:
- Active High/Active Low
- Reset Timeout:
- 140ms Minimum
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SO
LTC694CS8#TRPBF FAQ
1.How can I place an order for LTC694CS8#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC694CS8#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
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The price and inventory of LTC694CS8#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC694CS8#TRPBF is usually 5 days.
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6.How does Aetrix verify that LTC694CS8#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC694CS8#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC694CS8#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC694CS8#TRPBF?
All LTC694CS8#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC694CS8#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC694CS8#TRPBF part is unused and in its original packaging.
Return procedure for LTC694CS8#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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