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Analog Devices Inc. LTC695CSW-3.3#TRPBF
- Part No.:
- LTC695CSW-3.3#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
LTC695CSW-3.3#TRPBF.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 16SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:1,313
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Product details
Overview
LTC695CSW-3.3#TRPBF from Analog Devices (formerly Linear Technology) is a 3.3V microprocessor supervisory circuit integrating power-on reset, battery back-up switching, RAM write protection, power-fail warning, and watchdog timing in a single 16-lead plastic wide SOIC package. It asserts guaranteed RESET down to VCC = 1V, provides 2.90V precision supply monitoring, delivers up to 50mA VOUT with <5Ω on-resistance, and consumes only 0.6mW typical operating power - enabling robust system-level power integrity for battery-backed embedded controllers.
For engineers reviewing the LTC695CSW-3.3#TRPBF datasheet, LTC695CSW-3.3#TRPBF pinout, LTC695CSW-3.3#TRPBF application, or LTC695CSW-3.3#TRPBF equivalent, key selection criteria include its dual-reset outputs (RESET/RESET), CE IN/CE OUT memory gating with 30ns propagation delay, adjustable 140–280ms reset timeout, and validated operation across 0°C to 70°C industrial temperature range.
Technical Context
The LTC695CSW-3.3#TRPBF implements three independent comparators: C1 monitors VCC against a 2.90V bandgap reference with 40mV hysteresis for reset assertion; C2 compares VCC and VBATT with 50mV/70mV switchover thresholds and 20mV hysteresis for seamless battery backup; C3 compares PFI against a 1.30V internal reference for programmable power-fail detection. All comparators drive dedicated logic outputs with defined sink/source capability.
Its integrated charge-pumped NMOS switch (M1) supplies VOUT from VCC with 5Ω typical RDS(ON), while a separate PMOS switch (M2) enables low-dropout battery backup at ≤1μA standby current. The watchdog timer supports both internal oscillator (100ms/1.6s timeout) and external clock modes, and the OSC SEL pin selects between fixed and adjustable reset timing configurations.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reset Threshold | 2.90V ±0.10V - guarantees reliable μP reset initiation before supply collapse affects digital logic stability |
| VOUT Output Current | 50mA max - sufficient to power CMOS RAM and low-power peripherals without external boost circuitry |
| Battery Switchover Hysteresis | 20mV - prevents oscillation during VCC/VBATT crossover in noisy or slowly decaying supply conditions |
| Supply Current (Active) | 0.2–0.6mA - enables long-term operation in always-on 3.3V systems with minimal quiescent load |
| RESET Active Time | 140–280ms - configurable via external capacitor to meet diverse μP power-up stabilization requirements |
| Power-Fail Input Threshold | 1.30V ±0.05V - allows precise early-warning detection of supply decay using standard resistor dividers |
| Watchdog Timeout (Long) | 1.6s typical - provides ample time for firmware recovery before forced reset in safety-critical applications |
Pinout & Package
Package: 16-lead plastic wide SOIC (SW), 7.5mm × 10.3mm body, 1.27mm pitch, RoHS-compliant lead-free finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VBATT | Battery input | Accepts 1.5–2.75V auxiliary supply; triggers automatic switchover when VCC drops below VBATT −50mV |
| VOUT | Backed-up memory output | Delivers regulated power to RAM via internal NMOS/PMOS switches; bypass with ≥0.1μF capacitor |
| VCC | Main 3.3V supply input | Monitored by C1 comparator; must be bypassed with 0.1μF capacitor near pin for noise immunity |
| GND | Ground reference | Common return for all analog and digital functions; requires low-impedance PCB connection |
| BATT ON | Battery status indicator | Open-drain output signaling VOUT connection to VBATT; sinks 25mA to drive external PNP transistor |
| LOW_LINE | VCC undervoltage flag | Active-low output mirroring C1 comparator state; returns high immediately upon VCC recovery |
| OSC IN | Oscillator input | Accepts external clock or capacitor for timing control; internal pull-up enables floating as default high |
| OSC SEL | Oscillator mode select | High/floating enables internal oscillator; low enables external clock or RC timing on OSC IN |
| RESET | Active-low reset output | Guaranteed logic low down to VCC = 1V; drives μP reset input directly with 400μA sink capability |
| RESET | Active-high reset output | Inverse of RESET; provides complementary signal for logic families requiring high-active reset |
| WDO | Watchdog output | Active-low watchdog fault flag; resets high on WDI transition or LOW_LINE assertion |
| CE IN | Chip enable input | Accepts address decoder or bus signal; internal 3μA pull-up allows direct μP GPIO connection |
| CE OUT | Gated chip enable output | Buffered CE IN replica during valid VCC; forced high during reset to prevent RAM writes |
| PFI | Power-fail input | Non-inverting input to C3 comparator; threshold set by internal 1.30V reference |
| PFO | Power-fail output | Active-low flag indicating PFI < 1.30V; used to trigger controlled shutdown before RESET assertion |
Key Features
| Feature | Design Value |
|---|---|
| Guaranteed reset down to VCC = 1V | Ensures μP remains held in known state during deep brownout, preventing undefined execution or latch-up |
| Charge-pumped NMOS VOUT switch | Achieves <5Ω RDS(ON) and 0.6mW typical active power, eliminating substrate injection issues of PNP alternatives |
| 30ns CE IN → CE OUT propagation | Enables real-time RAM write blocking without adding timing margin to memory access cycles |
| Adjustable reset timeout (140–280ms) | Allows precise matching to target μP's power-up stabilization time via external capacitor selection |
| Independent PFI/PFO comparator | Provides programmable early-warning window (e.g., 3.1V detection) for graceful firmware shutdown |
Applications
| Industrial Control PLCs | Medical Diagnostic Handhelds |
|---|---|
Use Scenario: Programmable logic controller retains configuration and I/O state during AC mains interruption using battery-backed SRAM. IC Role / Device Role / Timing Role: LTC695CSW-3.3#TRPBF provides VOUT power continuity, asserts RESET to halt CPU execution, and gates CE OUT to freeze RAM writes until stable power resumes. Use Value: Prevents data corruption and ensures deterministic restart after brownout, meeting IEC 61000-4-11 immunity requirements. | Use Scenario: Portable ultrasound device maintains calibration data and patient history in nonvolatile RAM during battery swap or charging cycles. IC Role / Device Role / Timing Role: LTC695CSW-3.3#TRPBF monitors main 3.3V rail, triggers PFO interrupt for safe save-to-flash, then asserts RESET only after critical data persistence completes. Use Value: Eliminates need for external supervisor + watchdog + memory gate ICs, reducing BOM count and PCB area by 60%. |
| Automotive Infotainment Gateways | Smart Grid Edge Sensors |
Use Scenario: Telematics unit survives vehicle ignition cycling and battery voltage sag (<6V cranking) without losing CAN bus configuration or GPS almanac. IC Role / Device Role / Timing Role: LTC695CSW-3.3#TRPBF uses VBATT switchover to maintain VOUT from backup coin cell, while WDI monitors firmware heartbeat to detect lockup. Use Value: Enables AEC-Q100 Grade 3 compliance via guaranteed 1V reset hold and thermal shutdown at 155°C. | Use Scenario: Wireless sensor node deployed in remote substations operates continuously on primary power but preserves metering logs during grid outages. IC Role / Device Role / Timing Role: LTC695CSW-3.3#TRPBF detects falling 3.3V rail via PFI divider, asserts PFO to initiate flash write, then holds RESET until backup supercap charges. Use Value: Achieves >10-year field reliability with <1μA battery-backup current and no external timing components required. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microprocessor supervisory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX6326US33D3+ | Single-output active-low reset only; no CE gating, no battery switchover, no PFI/PFO | Suitable for basic reset-only systems without memory protection or power-fail warning | Select when cost sensitivity outweighs feature requirements and board space permits discrete watchdog addition |
| TPS3808G33DBVR | Includes watchdog and reset but lacks VOUT power switching, CE IN/CE OUT, and PFI/PFO comparator | Applicable where external LDO powers RAM and only reset/watchdog supervision is needed | Choose for TI-based designs requiring SOT-23 footprint and lower quiescent current (1.1μA vs 4μA) |
Compared with MAX6326US33D3+ and TPS3808G33DBVR, the LTC695CSW-3.3#TRPBF uniquely integrates five supervisory functions - reset, watchdog, memory gating, battery backup, and power-fail detection - in one SW package, eliminating interconnect delays, reducing component count by 4+, and guaranteeing coordinated timing across all events.
Availability
LTC695CSW-3.3#TRPBF is available at Aetrix Electronics and suitable for industrial control PLCs, medical handheld diagnostics, automotive infotainment gateways, smart grid edge sensors, and battery-powered instrumentation requiring stable component supply across extended temperature and lifecycle demands.
Supply support for LTC695CSW-3.3#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.
The LTC695CSW-3.3#TRPBF belongs to ADI's legacy Linear Technology supervisory IC product line, engineered specifically for 3.3V microprocessor systems requiring integrated power monitoring, battery backup, and memory protection in space-constrained industrial and portable applications.
FAQ
What is the guaranteed minimum VCC level at which LTC695CSW-3.3#TRPBF maintains valid RESET assertion?
The LTC695CSW-3.3#TRPBF guarantees RESET remains logic low down to VCC = 1V with ISINK = 10μA, ensuring microprocessor holdover during severe brownout conditions where other supervisors fail. This specification is tested and guaranteed over the full 0°C to 70°C operating range and is critical for applications requiring deterministic behavior under marginal supply conditions. The LTC695CSW-3.3#TRPBF achieves this via specialized output stage design that maintains drive strength even as VCC collapses.
How does LTC695CSW-3.3#TRPBF implement battery switchover, and what are the voltage thresholds?
The LTC695CSW-3.3#TRPBF uses comparator C2 to monitor VCC versus VBATT, connecting VOUT to the higher source. Switchover occurs at VCC = VBATT + 70mV (power-up) and VCC = VBATT + 50mV (power-down), with 20mV hysteresis to prevent chatter. During normal operation, an NMOS switch (M1) delivers up to 50mA from VCC to VOUT; during backup, a PMOS switch (M2) supplies VOUT from VBATT at <1μA quiescent current. The LTC695CSW-3.3#TRPBF datasheet confirms these thresholds apply across temperature and load.
Can LTC695CSW-3.3#TRPBF be used to protect EEPROM or NOVRAM write operations, not just CMOS RAM?
Yes - the CE OUT output of LTC695CSW-3.3#TRPBF is explicitly designed to drive Store, Write, or Chip Select inputs of EEPROM, EAROM, and NOVRAM devices. When VCC falls below 2.90V or VBATT, CE OUT is forced high regardless of CE IN state, preventing inadvertent writes during power instability. Its 30ns propagation delay and ability to source/sink 400μA make it compatible with standard nonvolatile memory timing requirements. This functionality is documented in the LTC695CSW-3.3#TRPBF Applications Information section.
What is the maximum load current supported by the VOUT pin of LTC695CSW-3.3#TRPBF, and how is overcurrent handled?
The VOUT pin of LTC695CSW-3.3#TRPBF supports up to 50mA continuous output current from VCC via its internal charge-pumped NMOS switch (M1), with short-circuit protection limiting peak current to ~200mA. Thermal shutdown activates at ~155°C junction temperature with 10°C hysteresis to prevent oscillation. In battery backup mode, VOUT draws ≤1μA from VBATT while supplying standby current to RAM. These limits and protections are specified in the LTC695CSW-3.3#TRPBF Absolute Maximum Ratings and Electrical Characteristics tables.
Does LTC695CSW-3.3#TRPBF support adjustable reset timeout, and how is it configured?
Yes - the LTC695CSW-3.3#TRPBF supports adjustable reset timeout (140–280ms) via the OSC IN pin when OSC SEL is grounded. Connecting a capacitor from OSC IN to GND sets the timeout period per the formula in the datasheet; typical values range from 10nF to 100nF. With OSC SEL high or floating, the internal oscillator fixes reset time at 200ms typical. This configurability is unique to the LTC695-3.3 variant and is confirmed in the LTC695CSW-3.3#TRPBF Pin Functions and Applications Information sections.
LTC695CSW-3.3#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 2.9V
- Output:
- Open Drain or Open Collector
- Reset:
- Active High/Active Low
- Reset Timeout:
- 140ms Minimum
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SO
LTC695CSW-3.3#TRPBF FAQ
1.How can I place an order for LTC695CSW-3.3#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC695CSW-3.3#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC695CSW-3.3#TRPBF reliable?
The price and inventory of LTC695CSW-3.3#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC695CSW-3.3#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC695CSW-3.3#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC695CSW-3.3#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC695CSW-3.3#TRPBF?
LTC695CSW-3.3#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC695CSW-3.3#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC695CSW-3.3#TRPBF?
For technical support, including LTC695CSW-3.3#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC695CSW-3.3#TRPBF requirements.
6.How does Aetrix verify that LTC695CSW-3.3#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC695CSW-3.3#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC695CSW-3.3#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC695CSW-3.3#TRPBF?
All LTC695CSW-3.3#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC695CSW-3.3#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC695CSW-3.3#TRPBF part is unused and in its original packaging.
Return procedure for LTC695CSW-3.3#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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