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Analog Devices Inc. LTC695IN-3.3#PBF
- Part No.:
- LTC695IN-3.3#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 16-DIP (0.300", 7.62mm)
- Datasheet:
-
LTC695IN-3.3#PBF.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 16DIP
- Quantity:
- Payment:
- Shipping:
Inventory:1,636
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Product details
Overview
LTC695IN-3.3#PBF from Analog Devices (formerly Linear Technology) is a 3.3V microprocessor supervisory circuit with integrated battery backup, RAM write protection, power-fail warning, and watchdog timing. It features a 2.90V precision reset threshold, 140–280ms adjustable reset active time, <1μA battery-backup supply current, and guaranteed RESET assertion down to VCC = 1V. It is used in critical embedded systems requiring reliable power monitoring and nonvolatile memory retention during brownout.
For engineers reviewing the LTC695IN-3.3#PBF datasheet, LTC695IN-3.3#PBF pinout, LTC695IN-3.3#PBF application, or LTC695IN-3.3#PBF equivalent, key selection criteria include its 16-pin PDIP package, –40°C to +85°C industrial temperature rating, dual RESET/RESET outputs, CE IN/CE OUT memory gating, and compatibility with 3.3V microprocessor power domains requiring fail-safe shutdown and battery-backed RAM integrity.
Technical Context
The LTC695IN-3.3#PBF integrates five core subsystems: a precision 2.90V reset comparator with 40mV hysteresis and 10ms response; a charge-pumped NMOS VOUT switch (5Ω typical RDS(on), 50mA max) for low-dropout primary power delivery; a PMOS battery switchover switch (125Ω, 250μA max load) enabling seamless transition to VBATT; an internal 1.3V reference-based PFI/PFO power-fail detector; and a dual-mode watchdog timer with selectable 100ms/1.6s timeout periods via OSC SEL.
Its architecture supports conditional battery backup: when VCC drops below VBATT −50mV, the device switches VOUT to VBATT while forcing CE OUT high and RESET low to halt memory writes and hold μP in reset. The BATT ON output drives external PNP transistors for >50mA VOUT loads, and WDI accepts three-level logic (high/low/floating) to enable/disable watchdog supervision without external components.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reset Threshold | 2.90V ±0.1V - ensures reliable μP reset before 3.3V rail collapse; guaranteed operation down to VCC = 1V. |
| Reset Active Time | 140–280ms - adjustable via external capacitor on OSC IN; provides stable reset hold during power-up/down transients. |
| VOUT Dropout Voltage | VCC − 0.1V @ 1mA - enables low-loss power delivery to backed-up RAM; <0.8V drop at 50mA. |
| Battery Backup Current | ≤1μA max - minimizes auxiliary battery drain during extended standby; supports multi-year CMOS RAM retention. |
| Power-Fail Detection | PFI threshold = 1.30V ±0.05V - allows early warning of supply decay via resistor divider; PFO asserts before reset threshold breach. |
| Watchdog Timeout | 100ms (short) / 1.6s (long) - configurable via OSC SEL; resets μP if WDI is not toggled, preventing firmware lockup. |
| Operating Temp Range | –40°C to +85°C - qualified for industrial environments; full electrical specs guaranteed across range. |
Pinout & Package
Package: 16-lead plastic DIP (N package), 0.300" wide, JEDEC MS-001, θJA = 130°C/W, TJMAX = 110°C.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC | 3.3V Main Supply Input | Primary power source; bypassed with 0.1μF capacitor; monitored for reset assertion and switchover control. |
| VOUT | Backed-Up Memory Output | Delivers regulated power to CMOS RAM; sourced from VCC (NMOS switch) or VBATT (PMOS switch) based on voltage comparison. |
| VBATT | Battery Backup Input | Accepts 1.5–2.75V auxiliary supply; enables seamless switchover when VCC falls below VBATT −50mV. |
| GND | Ground Reference | Common return path for all analog and digital functions; required for comparator reference stability. |
| BATT ON | Battery-On Logic Output | Open-drain signal indicating VOUT is sourced from VBATT; sinks 25mA to drive external PNP base for high-current VOUT extension. |
| OSC IN | Oscillator Input | Accepts external clock or RC timing network; sets reset active time and watchdog timeout when OSC SEL = LOW. |
| LOW LINE | Supply Undervoltage Indicator | Active-low output mirroring RESET threshold crossing; returns HIGH immediately upon VCC recovery (no delay). |
| OSC SEL | Oscillator Mode Select | HIGH or floating → internal oscillator enabled (fixed 200ms reset); LOW → OSC IN controls timing. |
| WDO | Watchdog Output | Active-low watchdog fault flag; goes LOW if WDI remains static beyond timeout; resets HIGH on WDI transition or LOW LINE assertion. |
| CE IN | Chip Enable Input | Logic input from μP address decoder; gated through CE OUT to prevent RAM writes during invalid VCC. |
| RESET | Active-Low μP Reset | Drives μP /RESET pin LOW during brownout, power-up, or watchdog timeout; guaranteed LOW down to VCC = 1V. |
| RESET | Active-High μP Reset | Inverted copy of RESET; used where active-high reset logic is required; open-circuit voltage = VOUT in backup mode. |
| PFI | Power-Fail Input | Non-inverting input to 1.3V comparator; senses supply decay via external resistor divider for early warning interrupt. |
| PFO | Power-Fail Output | Active-low comparator output; asserts before RESET to allow controlled system shutdown; forced LOW when VCC < VBATT. |
| WDI | Watchdog Input | Three-state input (HIGH/LOW/FLOAT); each transition resets watchdog timer; floating disables watchdog function. |
Key Features
| Feature | Design Value |
|---|---|
| Dual RESET outputs | Provides both active-low RESET and active-high RESET for direct interface with diverse μP reset architectures without level-shifting. |
| Adjustable reset timing | Reset active time set via external capacitor on OSC IN (100pF–10nF), enabling precise tailoring to system power-up requirements. |
| Fast CE IN-to-CE OUT propagation | 30ns typical delay ensures immediate RAM write disable upon VCC droop, preventing data corruption during brownout. |
| Guaranteed low-VCC reset | RESET remains valid and asserted even as VCC decays to 1V, ensuring μP stays in safe reset state until complete power loss. |
| Thermal-limited VOUT switching | Internal short-circuit protection and thermal shutdown (~155°C) prevent damage during overload or sustained VOUT fault conditions. |
Applications
| Industrial Programmable Logic Controllers (PLCs) | Automotive Body Control Modules (BCMs) |
|---|---|
Use Scenario: Maintaining real-time I/O state and configuration memory during engine cranking-induced 3.3V rail sag. IC Role / Device Role / Timing Role: Supervisory IC providing brownout detection, battery-backed RAM power, and watchdog reset to preserve firmware execution context. Use Value: Prevents PLC program corruption and I/O misconfiguration by asserting RESET before VCC drops below 2.90V and sustaining it down to 1V. |
Use Scenario: Securing door-lock actuator calibration data and user preferences during vehicle battery disconnect or alternator failure. IC Role / Device Role / Timing Role: Power monitor and memory protector delivering uninterrupted VOUT to EEPROM/NOVRAM via VBATT switchover. Use Value: Enables >10-year data retention using <1μA backup current while guaranteeing write-protection via CE OUT gating during voltage transients. |
| Medical Infusion Pump Controllers | Smart Energy Meter Data Loggers |
Use Scenario: Ensuring drug delivery history and alarm logs survive AC power interruption or internal battery depletion. IC Role / Device Role / Timing Role: Dual-function supervisor generating early PFO interrupt for graceful shutdown and hard RESET for safety-critical reboot. Use Value: Provides 15ms+ PFO warning margin before RESET assertion, allowing time to flush volatile buffers to nonvolatile storage. |
Use Scenario: Preserving 30-day energy consumption records during grid outage or meter tampering events. IC Role / Device Role / Timing Role: Battery-backed RAM controller with watchdog supervision to detect and recover from firmware hangs during long-term logging. Use Value: Combines 100ms/1.6s watchdog timeout modes to catch both transient glitches and persistent lockups without false resets. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microprocessor supervisory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX691ACPE+ | Fixed 200ms reset timeout; no adjustable timing; 4.65V reset threshold; no CE IN/CE OUT memory gating. | Suitable only for 5V systems; lacks RAM write protection and battery switchover; requires external components for PFI hysteresis. | Select when cost-sensitive 5V designs need basic reset + watchdog, but avoid for 3.3V battery-backed RAM systems. |
| TPS3808G33DBVR | Single-output (RESET only); no battery backup or memory gating; 3.08V reset threshold; 200ms fixed delay; no PFI/PFO. | Designed for simple power monitoring only; cannot replace LTC695IN-3.3#PBF in applications requiring VOUT switching or CE OUT write protection. | Choose only for minimal 3.3V reset supervision where battery backup, RAM protection, and power-fail warning are unnecessary. |
Compared with MAX691ACPE+ and TPS3808G33DBVR, the LTC695IN-3.3#PBF uniquely integrates adjustable reset timing, dual RESET outputs, CE IN/CE OUT memory gating, and seamless VBATT switchover-making it irreplaceable in industrial and automotive 3.3V systems demanding full power-supervision functionality in one IC.
Availability
LTC695IN-3.3#PBF is available at Aetrix Electronics and suitable for industrial PLCs, automotive BCMs, medical infusion pumps, and smart energy meters requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LTC695IN-3.3#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.
The LTC695IN-3.3#PBF belongs to Linear's legacy supervisory IC product line, engineered specifically for robust 3.3V microprocessor power monitoring in harsh environments where reliability, low-power backup, and memory data integrity are mission-critical.
FAQ
What is the operating temperature range for the LTC695IN-3.3#PBF?
The LTC695IN-3.3#PBF is rated for –40°C to +85°C operation, meeting industrial temperature requirements. All electrical specifications-including reset threshold (2.90V), reset active time (140–280ms), and battery backup current (≤1μA)-are guaranteed across this full range, making it suitable for under-hood automotive and factory-floor applications where ambient temperatures fluctuate widely.
How does the LTC695IN-3.3#PBF handle battery switchover during power loss?
The LTC695IN-3.3#PBF uses two comparators to manage battery switchover: when VCC falls to 50mV below VBATT, it disconnects VOUT from VCC and connects it to VBATT via a low-leakage PMOS switch. This transition occurs within ~20μs and sustains VOUT at VBATT − 0.1V (typical) for loads up to 250μA, preserving CMOS RAM data without interruption. The BATT ON output signals the switchover event for system-level diagnostics.
Can the LTC695IN-3.3#PBF be used with 5V microprocessors?
No-the LTC695IN-3.3#PBF is optimized exclusively for 3.3V systems. Its reset threshold is fixed at 2.90V, and absolute maximum ratings limit VCC to 6V with recommended operation at 3.3V ±10%. For 5V applications, Analog Devices offers the pin-compatible LTC695-4.65 family (e.g., LTC695CN-4.65#PBF), which features a 4.65V reset threshold and identical feature set.
What is the purpose of the CE IN and CE OUT pins on the LTC695IN-3.3#PBF?
The CE IN and CE OUT pins implement hardware-enforced RAM write protection: CE IN accepts a chip-enable signal from the μP's address decoder, and CE OUT delivers a buffered, glitch-free replica-unless VCC drops below 2.90V, in which case CE OUT is forced HIGH to disable RAM writes. With 30ns propagation delay, this prevents data corruption during brownout, making it essential for systems storing critical calibration or configuration data in battery-backed RAM.
Does the LTC695IN-3.3#PBF support external watchdog clock sources?
Yes-the LTC695IN-3.3#PBF supports both internal and external watchdog timing. When OSC SEL is pulled LOW, the OSC IN pin accepts an external clock signal (or RC network) to define the watchdog timeout period. The internal oscillator provides fixed 100ms (short) or 1.6s (long) timeouts when OSC SEL is HIGH or floating. External clocking allows precise synchronization with system clocks or custom timeout profiles not achievable with the internal oscillator alone.
LTC695IN-3.3#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 2.9V
- Output:
- Open Drain or Open Collector
- Reset:
- Active High/Active Low
- Reset Timeout:
- 140ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 16-PDIP
LTC695IN-3.3#PBF FAQ
1.How can I place an order for LTC695IN-3.3#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC695IN-3.3#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC695IN-3.3#PBF reliable?
The price and inventory of LTC695IN-3.3#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC695IN-3.3#PBF is usually 5 days.
3.What payment methods are accepted for LTC695IN-3.3#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC695IN-3.3#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC695IN-3.3#PBF?
LTC695IN-3.3#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC695IN-3.3#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC695IN-3.3#PBF?
For technical support, including LTC695IN-3.3#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC695IN-3.3#PBF requirements.
6.How does Aetrix verify that LTC695IN-3.3#PBF is sourced from the original manufacturer or authorized distributors?
All LTC695IN-3.3#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC695IN-3.3#PBF meets industry standards.
7.What is the process for return or replacement of LTC695IN-3.3#PBF?
All LTC695IN-3.3#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC695IN-3.3#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC695IN-3.3#PBF part is unused and in its original packaging.
Return procedure for LTC695IN-3.3#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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