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Analog Devices Inc. LTC695ISW-3.3#TRPBF
- Part No.:
- LTC695ISW-3.3#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
LTC695ISW-3.3#TRPBF.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 16SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:3,180
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Product details
Overview
LTC695ISW-3.3#TRPBF from Analog Devices (formerly Linear Technology) is a 3.3V microprocessor supervisory IC with integrated battery backup, RAM write protection, power-fail warning, and watchdog timing. It features a 2.90V precision reset threshold, 200ms typical reset active time (adjustable), 1μA max standby current in battery mode, and operates over –40°C to +85°C. It powers CMOS RAM during main supply loss using an internal PMOS/NMOS switchover architecture.
For engineers reviewing the LTC695ISW-3.3#TRPBF datasheet, LTC695ISW-3.3#TRPBF pinout, LTC695ISW-3.3#TRPBF application, or LTC695ISW-3.3#TRPBF equivalent, key selection criteria include guaranteed reset assertion down to VCC = 1V, fast 30ns CE gating for RAM protection, thermal limiting, and compatibility with 3.3V industrial and automotive systems requiring robust power monitoring.
Technical Context
The LTC695ISW-3.3#TRPBF implements dual comparator-based supervision: C1 monitors VCC against a 2.90V bandgap reference with 40mV hysteresis for glitch immunity; C3 compares PFI to a 1.3V internal reference for programmable power-fail detection. Its charge-pumped NMOS switch delivers up to 50mA from VCC to VOUT with ~5Ω on-resistance, while a 125Ω PMOS switch enables low-dropout battery backup.
It integrates a dual-mode watchdog timer-internally clocked (100ms/1.6s timeout) or externally triggered via WDI-with transition detection logic. The OSC SEL pin selects between internal oscillator and external clock input, and CE IN/CE OUT provide sub-50ns propagation-delay chip-enable gating synchronized to reset state.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reset Threshold | 2.90V ±0.1V; ensures reliable μP reset before supply collapse below 3.0V nominal. |
| Reset Active Time | 140–280ms (typ 200ms); adjustable via external capacitor; holds μP in reset during power stabilization. |
| Battery Standby Current | ≤1μA max; minimizes drain on backup battery during extended VCC loss. |
| VOUT Dropout Voltage | VCC – 0.8V @ 50mA; enables stable RAM supply even under heavy load at low input headroom. |
| Power-Fail Threshold | 1.30V ±0.05V; allows early warning of supply decay via user-configurable resistor divider on PFI. |
| Watchdog Timeout | 100ms (short) / 1.6s (long); configurable via OSC SEL; prevents system lockup without software intervention. |
| CE Gating Delay | 30ns typ; blocks RAM writes within one clock cycle when VCC drops below safe operating level. |
Pinout & Package
Package: 16-lead plastic wide SO (SW), RoHS-compliant, θJA = 130°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VBATT | Battery input | Accepts 1.5–2.75V auxiliary supply; triggers automatic switchover when VCC falls 50mV below VBATT. |
| VOUT | Backed-up memory output | Delivers regulated power to RAM via internal NMOS (VCC) or PMOS (VBATT) switch; bypass ≥0.1μF. |
| VCC | Main 3.3V supply input | Monitored by precision comparator C1; must be decoupled with 0.1μF capacitor near pin. |
| GND | Ground reference | Common return for all analog and digital functions; critical for accurate voltage thresholding. |
| BATT ON | Battery-on logic output | Sinks 25mA; drives external PNP transistor for >50mA VOUT loads or high-current backup. |
| LOW_LINE | VCC undervoltage indicator | Active-low open-drain output mirroring C1 status; returns high immediately when VCC recovers. |
| OSC IN | Oscillator input | Accepts external clock or capacitor (with OSC SEL low); sets watchdog/reset timing when not using internal oscillator. |
| OSC SEL | Oscillator mode select | High/floating = internal oscillator; low = external clock/capacitor mode; determines timeout configuration. |
| RESET | Active-low μP reset | Guaranteed low down to VCC = 1V; forces stable shutdown even during deep brownout. |
| RESET | Active-high reset inverse | Complementary to RESET; used where active-high reset logic is required. |
| WDO | Watchdog output | Active-low signal asserting watchdog timeout; resets on every WDI transition or LOW_LINE assertion. |
| CE IN | Chip-enable input | Accepts address decoder or bus signal; gated through CE OUT only when VCC is valid. |
| CE OUT | Gated chip-enable output | Buffered CE IN replica during normal operation; forced high during reset to block RAM writes. |
| PFI | Power-fail input | Non-inverting input to C3 comparator; threshold fixed at 1.3V; enables early-warning shutdown sequencing. |
| PFO | Power-fail output | Open-drain output of C3; goes low when PFI < 1.3V; used to interrupt μP before RESET asserts. |
| WDI | Watchdog input | Three-level input (high/low/floating); floating disables watchdog; transitions reset timeout counter. |
Key Features
| Feature | Design Value |
|---|---|
| Guaranteed reset at VCC = 1V | Ensures deterministic μP shutdown during severe brownout, preventing undefined states or latch-up. |
| 2.90V precision voltage monitor | Matches 3.3V system tolerance (±10%); eliminates need for external reference or trimming resistors. |
| Fast 30ns CE gating | Prevents corrupted RAM writes within one processor clock cycle when supply dips below safe margin. |
| Thermal limiting with 155°C shutdown | Protects device and downstream circuitry during sustained overload or short-circuit conditions. |
| 1μA max battery standby current | Extends lithium or coin-cell backup life to years in always-on embedded applications. |
Applications
| Industrial Control PLCs | Automotive Infotainment Systems |
|---|---|
Use Scenario: Maintaining volatile SRAM contents during engine cranking-induced 3.3V rail sag. IC Role / Device Role / Timing Role: Supervisory IC providing battery-backed VOUT, RAM write protection via CE OUT, and early PFO-triggered firmware save. Use Value: Prevents data corruption and eliminates need for external backup capacitors or discrete supervisors. | Use Scenario: Ensuring safe shutdown of navigation MCU during vehicle ignition-off sequence. IC Role / Device Role / Timing Role: Generates timed RESET pulse, monitors 3.3V supply decay via PFI, and asserts WDO if firmware fails to service watchdog. Use Value: Guarantees clean state preservation and avoids EEPROM wear from uncontrolled power loss. |
| Medical Portable Monitors | Smart Meter Data Loggers |
Use Scenario: Preserving real-time patient parameter buffers during brief AC mains interruption. IC Role / Device Role / Timing Role: Provides 200ms reset hold time, battery-switchover to VOUT, and RAM write disable via CE OUT gating. Use Value: Meets IEC 60601-1 immunity requirements for uninterrupted data capture and storage. | Use Scenario: Securing metering registers during utility grid outage with long-term coin-cell backup. IC Role / Device Role / Timing Role: Delivers 1μA max battery current, thermal-limited VOUT switching, and PFO-initiated flash commit. Use Value: Enables >10-year backup lifetime while ensuring tamper-proof data integrity across power cycles. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microprocessor supervisory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX6361KA33+T | Fixed 200ms reset timeout; no adjustable timing; lacks CE IN/CE OUT gating; 2.93V reset threshold. | No RAM write protection; requires external logic for memory safeguarding; simpler integration for basic reset-only use cases. | Select when only reset generation is needed and CE gating is handled elsewhere in design. |
| TPS3808G33DBVR | 2.93V reset threshold; 200ms fixed delay; no battery backup or PFI/PFO; supports manual reset input. | Not suitable for battery-backed RAM systems; lacks power-fail warning or watchdog; optimized for cost-sensitive non-backup applications. | Choose for 3.3V systems without backup requirements but needing high-accuracy reset and manual reset capability. |
Compared with MAX6361KA33+T and TPS3808G33DBVR, the LTC695ISW-3.3#TRPBF uniquely integrates battery switchover, RAM write protection, and programmable power-fail warning in a single 16-pin SO package-enabling compact, high-reliability designs where data retention and graceful shutdown are mandatory.
Availability
LTC695ISW-3.3#TRPBF is available at Aetrix Electronics and suitable for industrial control, automotive infotainment, and medical portable devices requiring stable component supply across extended temperature ranges.
Supply support for LTC695ISW-3.3#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.
The LTC695ISW-3.3#TRPBF belongs to ADI's legacy Linear Technology supervisory IC family, engineered specifically for robust 3.3V microprocessor power monitoring, battery-backed memory retention, and fail-safe system recovery in harsh environments.
FAQ
What is the guaranteed minimum VCC voltage at which LTC695ISW-3.3#TRPBF maintains valid RESET assertion?
The LTC695ISW-3.3#TRPBF guarantees RESET remains logic low down to VCC = 1V, with ISINK = 10μA. This ensures the microprocessor stays held in reset during deep brownout conditions where other supervisors may release prematurely, preventing undefined behavior or memory corruption in the LTC695ISW-3.3#TRPBF-based system.
How does LTC695ISW-3.3#TRPBF handle RAM write protection when VCC drops below the reset threshold?
When VCC falls below 2.90V, the LTC695ISW-3.3#TRPBF forces CE OUT high regardless of CE IN state, blocking write access to battery-backed RAM. This action occurs with 30ns typical propagation delay and continues until VCC recovers above threshold plus hysteresis, ensuring data integrity in the LTC695ISW-3.3#TRPBF-powered memory subsystem.
Can LTC695ISW-3.3#TRPBF operate with a lithium coin cell as the VBATT source?
Yes - the LTC695ISW-3.3#TRPBF supports VBATT input from 1.5V to 2.75V, making it compatible with standard CR2032 (3V) or BR2032 (2.8V) coin cells when used with appropriate series resistance. Its 1μA max standby current ensures multi-year backup life, and its PMOS switchover architecture avoids unwanted battery charging currents that could damage lithium chemistry in the LTC695ISW-3.3#TRPBF application.
What is the function of the BATT ON pin on LTC695ISW-3.3#TRPBF, and how is it used?
The BATT ON pin on LTC695ISW-3.3#TRPBF is an open-drain logic output indicating when VOUT is sourced from VBATT. It sinks up to 25mA and is commonly used to drive the base of an external PNP transistor, enabling higher-current battery backup beyond the internal 50mA VOUT limit. This extends the usable load capacity of the LTC695ISW-3.3#TRPBF in high-power RAM or peripheral backup scenarios.
Does LTC695ISW-3.3#TRPBF support adjustable reset timeout, and how is it configured?
Yes - the LTC695ISW-3.3#TRPBF supports adjustable reset active time via an external capacitor on the OSC IN pin when OSC SEL is low. With a 47pF capacitor, the typical timeout is 125kHz × 64 ≈ 200ms; varying capacitance changes the period linearly. This configurability allows precise alignment with processor startup requirements in the LTC695ISW-3.3#TRPBF-based design.
LTC695ISW-3.3#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 2.9V
- Output:
- Open Drain or Open Collector
- Reset:
- Active High/Active Low
- Reset Timeout:
- 140ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SO
LTC695ISW-3.3#TRPBF FAQ
1.How can I place an order for LTC695ISW-3.3#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC695ISW-3.3#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC695ISW-3.3#TRPBF reliable?
The price and inventory of LTC695ISW-3.3#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC695ISW-3.3#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC695ISW-3.3#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC695ISW-3.3#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC695ISW-3.3#TRPBF?
LTC695ISW-3.3#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC695ISW-3.3#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC695ISW-3.3#TRPBF?
For technical support, including LTC695ISW-3.3#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC695ISW-3.3#TRPBF requirements.
6.How does Aetrix verify that LTC695ISW-3.3#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC695ISW-3.3#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC695ISW-3.3#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC695ISW-3.3#TRPBF?
All LTC695ISW-3.3#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC695ISW-3.3#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC695ISW-3.3#TRPBF part is unused and in its original packaging.
Return procedure for LTC695ISW-3.3#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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