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Analog Devices Inc. LTC695ISW#PBF
- Part No.:
- LTC695ISW#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
LTC695ISW#PBF.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 16SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:3,854
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Product details
Overview
LTC695ISW#PBF from Analog Devices (formerly Linear Technology) is a 16-pin wide SOIC microprocessor supervisory circuit with integrated watchdog timer, battery backup switchover, power-fail warning, and RAM write protection. It features a 4.65V precision reset threshold, 200ms typical reset active time, guaranteed RESET assertion down to VCC = 1V, and operates across –40°C to +85°C. It is used in industrial controllers and automotive ECUs requiring robust power monitoring and nonvolatile memory retention during brownout.
For engineers reviewing the LTC695ISW#PBF datasheet, LTC695ISW#PBF pinout, LTC695ISW#PBF application, or LTC695ISW#PBF equivalent, key selection criteria include reset timeout adjustability via OSC SEL/OSC IN, dual-reset outputs (RESET and RESET), BATT ON drive capability for external PNP transistors, and compatibility with CMOS RAM CE gating under low-VCC conditions.
Technical Context
The LTC695ISW#PBF implements a bandgap-referenced voltage comparator (C1) for precise 4.65V ±50mV reset threshold detection with 40mV hysteresis, ensuring immunity to supply transients. Its internal oscillator sets fixed 200ms typical reset active time when OSC SEL is high, or enables external clock/capacitor configuration for adjustable timing.
A dual-path battery switchover circuit uses a charge-pumped NMOS switch (M1, 5Ω typical RDS(on)) for VCC-to-VOUT delivery up to 50mA, and a PMOS switch (M2, 125Ω typical RDS(on)) for VBATT-to-VOUT backup at ≤1µA standby current. The PFI/PFO comparator references an internal 1.3V bandgap and responds in <8µs (rising) / 2µs (falling) with no built-in hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reset Threshold | 4.65V typical; ensures reliable µP reset before 5V rail drops below 4.75V specification limit |
| Reset Active Time | 140ms min / 200ms typ; provides sufficient stabilization time for microprocessors after power-up |
| VCC Operating Range | 4.75V to 5.50V; compatible with standard 5V logic and LDO-regulated systems |
| Battery Backup Current | ≤1µA max; enables multi-year operation on coin-cell batteries for CMOS RAM retention |
| Watchdog Timeout | 100ms / 1.6s selectable; supports both fast fault recovery and long-duration system supervision |
| Supply Current (Active) | 1.5mA max; minimizes load on primary 5V supply without compromising functionality |
| VBATT Input Range | 2.0V to 4.25V; supports Li-MnO₂, alkaline, and supercapacitor backup sources |
Pinout & Package
Package: 16-lead wide plastic SO (SW package), 7.5mm × 10.3mm body, 1.27mm pitch, RoHS-compliant lead-free finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 VBATT | Battery input | Connects auxiliary power source; triggers switchover when VCC falls 50mV below VBATT |
| 2 VOUT | Backed-up memory supply | Delivers regulated 5V-equivalent output to CMOS RAM; sourced from VCC or VBATT automatically |
| 3 VCC | Main 5V supply input | Primary power rail; monitored for reset assertion and used as reference for all comparators |
| 4 GND | Analog/digital ground | Common return for all internal circuits; requires low-inductance 0.1µF bypass to VCC |
| 5 BATT ON | Battery status indicator | Open-drain logic output that sinks ≥35mA; drives base of external PNP for high-current VOUT boost |
| 6 LOWLINE | VCC undervoltage flag | Active-low output mirroring C1 comparator state; asserts immediately when VCC < 4.65V |
| 7 OSC IN | Oscillator input | Accepts external clock or capacitor (e.g., 47pF) to configure reset/watchdog timing when OSC SEL = 0V |
| 8 OSC SEL | Oscillator mode control | High/floating = internal oscillator (fixed timing); low = external clock/capacitor mode (adjustable timing) |
| 9 RESET | Active-low µP reset | Guaranteed logic low down to VCC = 1V; holds µP in reset during brownout and power-down |
| 10 RESET | Active-high µP reset | Inverted replica of RESET; simplifies interface to processors requiring active-high reset assertion |
| 11 WDO | Watchdog timeout flag | Asserts low if WDI remains static > timeout period; resets high on WDI transition or LOWLINE assertion |
| 12 CE IN | Chip enable input | Accepts µP address/decoder signal; gated through CE OUT to protect RAM writes during low-VCC |
| 13 CE OUT | Gated chip enable output | Buffered CE IN during normal operation; forced high during reset to disable RAM writes unconditionally |
| 14 WDI | Watchdog input | Three-level input (high/low/floating); transitions reset watchdog timer; floating disables watchdog |
| 15 PFO | Power-fail output | Open-drain output asserting low when PFI < 1.3V; used for early shutdown interrupt before RESET activates |
| 16 PFI | Power-fail input | Noninverting comparator input referenced to 1.3V; monitors external voltage divider for pre-failure warning |
Key Features
| Feature | Design Value |
|---|---|
| Dual reset outputs | Simultaneous active-low (RESET) and active-high (RESET) signals eliminate need for external inverters in mixed-logic systems |
| Adjustable reset timing | OSC SEL/OSC IN interface allows user-defined reset duration (via external capacitor or clock), unlike fixed-timing alternatives |
| Guaranteed low-VCC reset | RESET remains valid down to VCC = 1V, enabling safe processor shutdown even during deep brownout conditions |
| Integrated RAM write protection | CE IN/CE OUT gating circuit forces CE OUT high during reset, preventing data corruption in battery-backed CMOS RAM |
| Low-quiescent battery backup | 1µA max standby current in battery mode extends coin-cell life beyond 10 years for typical 250µA RAM loads |
| Thermal shutdown protection | Internal thermal limiter disables VOUT power switch above ~155°C, preventing damage during sustained overload |
Applications
| Industrial PLC Controller | Automotive Engine Control Unit |
|---|---|
Use Scenario: Maintains real-time control logic integrity during engine cranking-induced 5V rail sag. IC Role / Device Role / Timing Role: Monitors VCC for sub-4.65V dips; asserts RESET for 200ms to hold ECU in safe state; enables BATT ON to sustain sensor biasing via external PNP. Use Value: Prevents spurious ECU reboots and preserves calibration data in EEPROM during repeated cranking cycles. |
Use Scenario: Provides fail-safe memory retention during vehicle battery disconnect or alternator failure. IC Role / Device Role / Timing Role: Switches VOUT from VCC to VBATT within 20µs when VCC drops; delivers ≤1µA standby current to SRAM; asserts PFO 8ms before RESET to trigger graceful firmware save. Use Value: Ensures zero data loss in critical engine maps stored in battery-backed RAM during extended power loss. |
| Medical Infusion Pump | Ruggedized Handheld Terminal |
Use Scenario: Guarantees deterministic shutdown and RAM preservation when AC adapter is unplugged mid-dose. IC Role / Device Role / Timing Role: Uses PFI/PFO to detect falling 5V rail; initiates controlled drug delivery halt via µP interrupt; maintains VOUT from VBATT to retain therapy parameters. Use Value: Meets IEC 62304 Class C safety requirements by eliminating uncontrolled state transitions during power transition. |
Use Scenario: Sustains operation during hot-swap battery replacement in field-deployed units. IC Role / Device Role / Timing Role: Detects VBATT removal via switchover hysteresis; holds RESET active while BATT ON drives external transistor to maintain VOUT; prevents spurious resets using 4.3MΩ bleed resistor. Use Value: Enables uninterrupted data logging and GPS tracking during battery maintenance without service interruption. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microprocessor supervisory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX695CSA+ | 8-pin SOIC, fixed 200ms reset, no CE IN/CE OUT, no BATT ON output, 2.5µA supply current | Lacks RAM write protection and high-current battery drive; suitable only for basic reset-only use cases | Select when board space is constrained and memory protection is handled externally |
| TPS3823MPW | 8-pin TSSOP, 3.08V reset threshold, 200ms reset, no watchdog, no battery switchover, 12µA supply current | Designed for 3.3V systems; incompatible with 5V VCC monitoring or VBATT backup requirements | Select only for 3.3V µP systems where battery backup is unnecessary |
Compared with MAX695CSA+ and TPS3823MPW, the LTC695ISW#PBF uniquely integrates RAM write protection gating, high-drive BATT ON, and dual-supply switchover-making it the sole option among these three for 5V industrial systems requiring guaranteed data integrity during power transitions.
Availability
LTC695ISW#PBF is available at Aetrix Electronics and suitable for industrial PLC controllers, automotive ECUs, medical infusion pumps, and ruggedized handheld terminals requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for LTC695ISW#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors for precision instrumentation, industrial automation, and automotive systems.
The LTC695ISW#PBF belongs to the LTC690 family of microprocessor supervisory ICs, designed specifically for mission-critical 5V systems needing coordinated reset, watchdog, battery backup, and memory protection in a single chip.
FAQ
What is the minimum VCC voltage at which LTC695ISW#PBF guarantees RESET assertion?
The LTC695ISW#PBF guarantees RESET remains logic low down to VCC = 1V, ensuring the microprocessor stays held in reset during deep brownout conditions where other supervisors may release prematurely. This behavior is explicitly specified in the Absolute Maximum Ratings and Electrical Characteristics tables, and is enabled by its internal level-shifting circuitry independent of VCC regulation.
How does LTC695ISW#PBF handle battery switchover between VCC and VBATT?
The LTC695ISW#PBF uses two comparators with 20mV hysteresis to switch VOUT between VCC and VBATT: it connects to VCC when VCC exceeds VBATT by 70mV, and switches to VBATT when VCC falls within 50mV of VBATT. This prevents oscillation near the switchover point and ensures seamless transition with ≤20µs response time, as confirmed in the Applications Information section and Typical Performance Characteristics.
Can LTC695ISW#PBF be used to protect EEPROM write operations?
Yes - the CE OUT pin of LTC695ISW#PBF is explicitly designed to drive the Chip Enable (CE), Write (WR), or Store inputs of EEPROM, EAROM, or NOVRAM devices. When VCC drops below the reset threshold, CE OUT is forced high regardless of CE IN state, preventing inadvertent writes during power instability, as documented in Figure 5 and the "Memory Protection" subsection of Applications Information.
What is the purpose of the BATT ON pin on LTC695ISW#PBF?
The BATT ON pin on LTC695ISW#PBF is an open-drain logic output that sinks ≥35mA and indicates whether VOUT is sourced from VCC (BATT ON low) or VBATT (BATT ON high). Its primary design value is to drive the base of an external PNP transistor, enabling high-current VOUT delivery beyond the internal 50mA NMOS switch limit - a capability not found in most competing supervisors.
Does LTC695ISW#PBF support adjustable watchdog timeout periods?
Yes - the LTC695ISW#PBF supports two selectable watchdog timeout periods (100ms and 1.6s typical) via the OSC IN pin when OSC SEL is high. When OSC SEL is pulled low, an external clock or capacitor on OSC IN allows further customization of both watchdog and reset timing, as detailed in Note 6 and the Oscillator section of Electrical Characteristics.
LTC695ISW#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 4.65V
- Output:
- Open Drain or Open Collector
- Reset:
- Active High/Active Low
- Reset Timeout:
- 140ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SO
LTC695ISW#PBF FAQ
1.How can I place an order for LTC695ISW#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC695ISW#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC695ISW#PBF reliable?
The price and inventory of LTC695ISW#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC695ISW#PBF is usually 5 days.
3.What payment methods are accepted for LTC695ISW#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC695ISW#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC695ISW#PBF?
LTC695ISW#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC695ISW#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC695ISW#PBF?
For technical support, including LTC695ISW#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC695ISW#PBF requirements.
6.How does Aetrix verify that LTC695ISW#PBF is sourced from the original manufacturer or authorized distributors?
All LTC695ISW#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC695ISW#PBF meets industry standards.
7.What is the process for return or replacement of LTC695ISW#PBF?
All LTC695ISW#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC695ISW#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC695ISW#PBF part is unused and in its original packaging.
Return procedure for LTC695ISW#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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