Analog Devices Inc. LTC6994MPS6-2#TRMPBF

Overview

LTC6994MPS6-2#TRMPBF from Analog Devices is a TimerBlox® programmable delay block IC designed for edge-controlled timing in noise-prone environments. It delays both rising and falling input transitions with user-selectable inversion, supports 1µs–33.6s delay range via RSET resistor and DIV pin voltage, operates from 2.25V to 5.5V, and features ±2.3% max delay error (for delays >512µs) across –55°C to 125°C.

For engineers reviewing the LTC6994MPS6-2#TRMPBF datasheet, LTC6994MPS6-2#TRMPBF pinout, LTC6994MPS6-2#TRMPBF application, or LTC6994MPS6-2#TRMPBF equivalent, key selection criteria include dual-edge delay capability, automotive-grade temperature range (–55°C to 125°C), TSOT-23 package footprint, low 70µA supply current at 10µs delay, and AEC-Q100 qualification for high-reliability embedded timing.

Technical Context

The LTC6994MPS6-2#TRMPBF implements a master oscillator with 1µs/50kΩ scaling, programmable via ISET current sourced from the SET pin, and a 4-bit A/D converter on the DIV pin that selects NDIV values (1, 8, 64, 512, 4096, 2¹⁵, 2¹⁸, 2²¹) and POL bit for output polarity control. Its edge-controlled delay logic ensures only valid transitions trigger timing, enabling pulse qualification.

Unlike fixed-delay lines, it incorporates digital filtering and hysteresis on the IN pin (VIN(RISING) ≈ 0.55•V+ + 185mV; VIN(FALLING) ≈ 0.48•V+ – 155mV), and halts oscillator operation when ISET drops below ~500nA-enabling ultra-low-power idle states while maintaining precise delay reproducibility upon wake-up.

Key Specifications

Pinout & Package

Package: 6-Lead Plastic TSOT-23 (ThinSOT™), 1mm profile, lead-free (LTFCX marking), exposed pad optional for thermal relief.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar programmable delay applications.

Compared with LTC6994HS6-2#TRMPBF and MAX6816EUT+T, the LTC6994MPS6-2#TRMPBF uniquely delivers AEC-Q100 MP-grade qualification, –55°C startup capability, and full programmability of delay range, edge selectivity, and output polarity-making it the only option for automotive and extreme-environment timing requiring field-adjustable behavior.

Availability

LTC6994MPS6-2#TRMPBF is available at Aetrix Electronics and suitable for automotive control units, industrial sensor interfaces, and portable medical devices requiring stable component supply with guaranteed long-term availability and traceable sourcing.

Supply support for LTC6994MPS6-2#TRMPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.

The TimerBlox® family-including LTC6994MPS6-2#TRMPBF-is engineered for precision, low-power, and ease-of-use in timing-critical embedded systems where microcontroller-based solutions add complexity, latency, or power overhead.

FAQ

What is the minimum and maximum delay achievable with the LTC6994MPS6-2#TRMPBF?

The LTC6994MPS6-2#TRMPBF supports a delay range from 1µs to 33.6 seconds. Minimum delay occurs with RSET = 50kΩ and NDIV = 1 (tDELAY = 1µs); maximum delay uses RSET = 800kΩ and NDIV = 2²¹ (2,097,152), yielding 33.6 seconds. All intermediate values are programmable via resistor selection and DIV pin voltage.

How does the LTC6994MPS6-2#TRMPBF differ from the LTC6994MPS6-1#TRMPBF?

The LTC6994MPS6-2#TRMPBF delays both rising and falling edges of the IN signal and supports output inversion via the POL bit (DIV pin MSB = 1). In contrast, the LTC6994MPS6-1#TRMPBF delays only one edge-rising (POL = 0) or falling (POL = 1)-and lacks inversion capability. This makes LTC6994MPS6-2#TRMPBF essential for symmetric pulse shaping and noise rejection.

Is the LTC6994MPS6-2#TRMPBF AEC-Q100 qualified, and what grade does it meet?

Yes, the LTC6994MPS6-2#TRMPBF is AEC-Q100 qualified to Grade MP (–55°C to 125°C), verified per automotive reliability standards including HTOL, TCT, and ESD testing. This qualification confirms suitability for under-hood, transmission, and chassis control applications where extended temperature operation and long-term stability are mandatory.

Can the delay of the LTC6994MPS6-2#TRMPBF be adjusted dynamically during operation?

Yes-the DIV pin accepts an analog voltage (0V to V+) that continuously reprograms NDIV and POL. As long as VDIV remains stable within ±1.5% of the target ratio (VDIV/V+ = (DIVCODE + 0.5)/16), the LTC6994MPS6-2#TRMPBF will update its delay setting with a settling time of ~16 × (∆DIVCODE + 6) × tMASTER, enabling real-time adaptation without interrupting system operation.

What is the recommended bypass capacitor for the V+ pin of the LTC6994MPS6-2#TRMPBF?

A 0.1µF X7R ceramic capacitor must be placed directly between the V+ pin (Pin 5) and GND (Pin 2) with minimal trace length. This ensures stable internal regulation, minimizes supply-induced delay drift (<0.9% over 2.25V–5.5V), and prevents oscillation during fast output transitions-critical for achieving specified ±2.3% delay accuracy.