Analog Devices Inc. LTC7131RY-1#PBF

Overview

LTC7131RY-1#PBF from Analog Devices is a 25A monolithic synchronous step-down DC/DC converter with PMBus interface, phase-lockable controlled-on-time current-mode architecture, 4.5V–20V input range, 0.4V–3.5V programmable output voltage, and ±25% digital margining at 0.1% resolution-designed for high-density ASIC/FPGA core power delivery.

For engineers reviewing the LTC7131RY-1#PBF datasheet, LTC7131RY-1#PBF pinout, LTC7131RY-1#PBF application, or LTC7131RY-1#PBF equivalent, key selection criteria include its 25A continuous output capability, integrated power MOSFETs (7.3mΩ top / 2.1mΩ bottom), 250kHz–2MHz programmable switching frequency, differential remote sensing, and real-time telemetry (V_IN/V_OUT/I_IN/I_OUT/temperature) via PMBus at 25Hz refresh.

Technical Context

The LTC7131RY-1#PBF implements a valley-current-mode control architecture with a fixed on-time one-shot timer (OST) and internal 100µA REF current source for resistor-programmed V_OUT. Its error amplifier drives the ITH node to regulate inductor valley current against FB/REF, enabling sub-1ms startup and fast transient response at low duty cycles.

It integrates dual N-channel power MOSFETs, a 5V INTVCC LDO, PMBus-compliant SMBus interface (SCL/SDA/ALERT), programmable PGOOD thresholds (via PGLIM), and clock-out (CLKOUT) for 2-phase operation. Phase-lock synchronization, hiccup-mode overcurrent protection, and master shutdown (125µA IQ) are hardware-configurable via MODE/SYNC, RUN_MSTR, and PGFD pins.

Key Specifications

Pinout & Package

Package: 63-ball BGA, 7.5mm × 6.25mm × 2.22mm, thermally enhanced with bottom-side thermal pads (θ_JCbottom = 5.8°C/W). Ball finish: SAC305 (RoHS).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-current PMBus-enabled buck regulator applications.

Compared with LTC7131RY-1#PBF, the LTC7132Y-1#PBF offers +5A headroom in the same footprint, while the TPS546D24RQFT trades BGA scalability and advanced margining for superior thermal dissipation in QFN form-making each optimal for distinct system priorities: density+telemetry, raw current, or thermal-limited environments.

Availability

LTC7131RY-1#PBF is available at Aetrix Electronics and suitable for ASIC/FPGA power delivery, point-of-load conversion, and industrial CPU module designs requiring stable component supply, full PMBus telemetry, and extended temperature operation.

Supply support for LTC7131RY-1#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, communications, and power management markets.

The LTC7131-1 product line delivers monolithic, PMBus-enabled high-current DC/DC regulators targeting dense, telemetry-rich power systems for datacenter, networking, and embedded computing applications.

FAQ

What is the maximum supported switching frequency for the LTC7131RY-1#PBF?

The LTC7131RY-1#PBF supports a programmable switching frequency from 250kHz to 2MHz. This is set either by an external resistor on the RT pin or by synchronizing to an external clock applied to the MODE/SYNC pin. At RT = 25.5kΩ, the typical frequency is 500kHz; tying RT to INTVCC selects the internal 500kHz oscillator. The LTC7131RY-1#PBF maintains stable operation across this full range with appropriate external components.

How does the LTC7131RY-1#PBF implement output voltage margining?

The LTC7131RY-1#PBF provides ±25% output voltage margining at 0.1% resolution via the PMBus MFR_VOUT_COMMAND register. Margining is applied as an offset to the base V_OUT set by the REF pin. Fast margining is also supported: pulling the MARGIN pin high or low immediately ramps V_OUT to preloaded values in MFR_VOUT_MARGIN_HIGH or MFR_VOUT_MARGIN_LOW registers. The LTC7131RY-1#PBF retains all margin settings across power cycles.

Can the LTC7131RY-1#PBF operate in discontinuous conduction mode (DCM)?

Yes, the LTC7131RY-1#PBF supports discontinuous conduction mode (DCM) at light loads. DCM is enabled by tying the MODE/SYNC pin to INTVCC. In DCM, the bottom MOSFET turns off when inductor current reaches zero, improving light-load efficiency. Forced continuous conduction mode (CCM) is selected by grounding MODE/SYNC. The LTC7131RY-1#PBF automatically transitions between modes based on load and MODE/SYNC state.

What thermal performance can be expected from the LTC7131RY-1#PBF in a typical layout?

In the recommended demo board layout (DC2824A), the LTC7131RY-1#PBF achieves θ_JA = 18.5°C/W and θ_JCbottom = 5.8°C/W. At 25A output with 12V input and 1V output, junction temperature rise is ~45°C above ambient in still air with no heatsink. The 63-ball BGA package requires proper thermal vias under the exposed pad and adequate copper area on inner layers to maintain ≤150°C junction temperature under full load.

Does the LTC7131RY-1#PBF support 2-phase operation, and how is it configured?

Yes, the LTC7131RY-1#PBF supports 2-phase operation via its CLKOUT pin, which outputs a 180° phase-shifted clock signal. To configure two-phase operation, one LTC7131RY-1#PBF operates as master (CLKOUT driven), while the second is configured as slave by tying its VSENSE− pin to INTVCC and synchronizing its MODE/SYNC pin to the master's CLKOUT. This enables 50A total output with interleaved ripple cancellation and reduced input/output capacitor requirements.