Analog Devices Inc. LTC7840EUFD#PBF
- Part No.:
- LTC7840EUFD#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 28-WFQFN Exposed Pad
- Datasheet:
-
LTC7840EUFD#PBF.pdf
- Description:
- DUAL PHASE/OUTPUT NON-SYNCH BOOS
- Quantity:
- Payment:

- Shipping:

Inventory:3,389
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC7840EUFD#PBF from Analog Devices is a dual-phase, dual-output nonsynchronous boost controller driving external N-channel MOSFETs in high-voltage DC/DC conversion. It operates from 5.5V to 60V input, delivers programmable 50kHz–425kHz switching frequency, features ±1% 1.2V internal reference, hiccup-mode overcurrent protection, and supports boost, SEPIC, and flyback topologies - used in telecom power supplies delivering 240V output at 0.7A.
For engineers reviewing the LTC7840EUFD#PBF datasheet, LTC7840EUFD#PBF pinout, LTC7840EUFD#PBF application, or LTC7840EUFD#PBF equivalent, key selection criteria include dual-phase current-mode control with dynamic slope recovery, independent RUN/PGOOD per channel, adjustable DMAX/BLANK timing, and thermal performance of the 4mm × 5mm QFN package under high-VIN surge conditions.
Technical Context
The LTC7840EUFD#PBF implements constant-frequency peak current mode control with smooth quadratic slope compensation and dynamic slope recovery to stabilize operation across wide duty cycles. Its two independent control loops operate 180° out-of-phase, each with dedicated ITH error amplifier output, VFB feedback input, RUN enable, and PGOOD indicator.
Power sequencing is managed via cascaded LDOs: a 10V DRVCC regulator (supplied from VIN) powers gate drivers with 4.4V UVLO, and a 3.8V INTVCC regulator (supplied from DRVCC) powers analog/digital circuitry with 3.3V UVLO. Both LDOs require local ceramic bypassing and must not be externally biased.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 5.5V to 60V - accommodates automotive load dump and industrial surges without external clamping. |
| Switching Frequency | 50kHz to 425kHz - programmable via FREQ pin voltage or synchronized to external clock up to 450kHz. |
| Feedback Reference | 1.2V ±1% - enables precise output regulation with minimal resistor divider error sensitivity. |
| Max Duty Cycle | 75% to 96% - set by DMAX pin voltage (INTVCC/float/SGND) to limit minimum off-time in high-VOUT designs. |
| Min On-Time | 120ns to 200ns - configured via BLANK pin (SGND/float/INTVCC) for stable operation at high frequency and low duty cycle. |
| Current Sense Threshold | 75mV typical - adjustable down to ≤70mV using ILIM1/ILIM2 pins for accurate overcurrent protection scaling. |
| Gate Drive Voltage | 10V (DRVCC) - drives high-RDS(ON) N-MOSFETs optimized for VGS = 6V, supporting RDS(ON) < 20mΩ at 10V. |
| Thermal Resistance | θJA = 47°C/W - measured for 4mm × 5mm QFN package (UFD28), requiring PCB copper area and thermal vias for >125°C junction operation. |
Pinout & Package
The LTC7840EUFD#PBF is housed in a 28-lead, 4mm × 5mm plastic QFN package (UFD28) with exposed thermal pad soldered to SGND. Pin pitch is 0.5mm; package height is 0.75mm. Thermal performance requires ≥4 thermal vias under exposed pad connected to inner SGND plane.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| BLANK (Pin 26) | Minimum on-time configuration | Setting SGND/float/INTVCC selects 120ns/160ns/200ns min on-time - critical for stability at high fSW and low duty cycle. |
| DMAX (Pin 1) | Maximum duty cycle programming | Connecting to SGND/float/INTVCC sets max duty cycle to 96%/84%/75% - prevents shoot-through and ensures sufficient off-time for diode recovery. |
| GATE1/GATE2 (Pins 18/16) | N-MOSFET gate drive outputs | 10V push-pull drivers referenced to PGND - capable of driving Qg > 50nC MOSFETs with 2Ω pull-up / 1Ω pull-down RDS(ON). |
| SENSE1+/SENSE2+ (Pins 25/11) | Current sense positive inputs | Differential inputs to current comparators - connect to high-side of sense resistors for accurate peak current detection. |
| ILIM1/ILIM2 (Pins 23/13) | Current limit threshold adjustment | 10µA sink pins - resistor-to-SGND sets max VSENSE from 0mV to 75mV, enabling scalable OCP without changing sense resistor. |
| RUN1/RUN2 (Pins 6/7) | Independent channel enable inputs | 1.22V turn-on threshold with 80mV hysteresis - allows staggered startup, fault isolation, and power sequencing control per channel. |
| PGOOD1/PGOOD2 (Pins 15/14) | Open-drain power-good indicators | Assert low after 135µs mask time when VFB deviates >±10% - provides system-level rail monitoring with built-in delay. |
| DRVCC (Pin 19) | 10V gate driver supply output | Internally regulated LDO output - requires ≥4.7µF X5R ceramic capacitor to PGND; cannot be externally biased. |
| INTVCC (Pin 22) | 3.8V control circuit supply output | Second-stage LDO powered from DRVCC - requires 1nF ceramic capacitor to SGND; not for external loads. |
| VIN (Pin 20) | Main input supply input | Accepts 5.5V–60V - bypass with 0.1µF–1µF ceramic capacitor to PGND; feeds both LDOs and internal bias circuits. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-phase interleaved operation | 180° phase shift reduces input/output ripple current by ~70%, enabling smaller input capacitors and lower EMI filtering cost. |
| Hiccup-mode overcurrent protection | Auto-retry shutdown with SS1/SS2 capacitor-controlled timing - limits average power dissipation during sustained overload without latch-off. |
| Programmable soft-start ramp | 10µA internal current charges SS1/SS2 pins - adjustable ramp rate via capacitor value prevents inrush current and output overshoot. |
| Flexible topology support | Configurable as dual-output boost, single-output dual-phase boost, SEPIC, or flyback - reuses same IC across multiple isolated/non-isolated architectures. |
| Independent channel monitoring | Separate RUN, PGOOD, VFB, ITH, and ILIM per channel - enables asymmetric output voltages, independent enable/disable, and fault containment. |
| Integrated slope compensation | Smooth quadratic + dynamic recovery - eliminates subharmonic oscillation without external components, even at >50% duty cycle. |
Applications
| Telecom Power Supply | Industrial High-Voltage Bias |
|---|---|
Use Scenario: Generating 240V DC from 12V battery backup in central office line cards with strict efficiency and reliability requirements. IC Role / Device Role / Timing Role: Dual-phase nonsynchronous boost controller managing two 120V stages in interleaved mode to reduce input ripple and improve thermal distribution. Use Value: Achieves >92% efficiency at 0.7A output with 12V input, leveraging 10V gate drive and 75mV current sense threshold for low-loss MOSFET control. | Use Scenario: Providing isolated 48V/36V bias rails for RF power amplifiers in 5G base station transceivers operating from 24V–48V backplane. IC Role / Device Role / Timing Role: Dual-output boost controller delivering independent regulated outputs with separate RUN/PGOOD for staged power-up and fault reporting. Use Value: Enables precise ±1% output tracking via matched 1.2V reference and independent VFB/ITH loops, reducing need for post-regulation LDOs. |
| Automotive ADAS Camera Power | Test Equipment HV Source |
Use Scenario: Powering 70V image sensor bias in automotive surround-view cameras subjected to 60V load-dump transients. IC Role / Device Role / Timing Role: High-input-voltage boost controller with 60V absolute max VIN rating and hiccup-mode protection against short-circuit faults. Use Value: Survives ISO 7637-2 pulse 5a (60V/100ms) without external TVS, using internal 65V absolute max rating and robust gate drive UVLO. | Use Scenario: Programmable HV source in automated test equipment requiring stable 100–300V outputs with remote sensing and fast transient response. IC Role / Device Role / Timing Role: Configurable SEPIC controller supporting wide output range and precise voltage setting via external resistor dividers on VFB1/VFB2. Use Value: Delivers <1% load regulation and <0.01%/V line regulation using internal reference and servo-loop architecture, minimizing calibration drift. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-phase boost controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC7841EUFD#PBF | Synchronous rectification support; integrated high-side MOSFET drivers; no external diode required. | Better efficiency at medium-to-high loads (>1A); higher BOM cost due to synchronous MOSFETs. | Select LTC7841EUFD#PBF when efficiency >94% at full load is mandatory and layout space permits dual MOSFETs per phase. |
| LM5122MH/NOPB | Single-channel, wide-VIN (3V–65V), programmable frequency; no dual-phase or hiccup mode. | Requires two ICs for dual output; lacks channel-to-channel phase control and independent PGOOD. | Select LM5122MH/NOPB only for cost-sensitive single-output systems where interleaving and hiccup protection are not required. |
Compared with LTC7841EUFD#PBF, the LTC7840EUFD#PBF trades synchronous efficiency for simpler diode-based BOM and lower gate drive complexity; compared with LM5122MH/NOPB, it delivers true dual-phase control with coordinated timing and fault isolation - essential for high-reliability 240V telecom supplies.
Availability
LTC7840EUFD#PBF is available at Aetrix Electronics and suitable for telecom power supplies, industrial high-voltage bias rails, automotive ADAS camera modules, and test equipment HV sources requiring stable component supply, long-term lifecycle support, and guaranteed RoHS-compliant packaging.
Supply support for LTC7840EUFD#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, communications, and industrial markets since 1965.
The LTC7840EUFD#PBF belongs to ADI's Power by Linear™ controller family, designed specifically for high-input-voltage, multi-phase DC/DC conversion in space-constrained, thermally demanding environments such as telecom infrastructure and automotive electronics.
FAQ
What is the maximum input voltage rating for the LTC7840EUFD#PBF?
The LTC7840EUFD#PBF has an absolute maximum input voltage rating of 65V on the VIN pin, with recommended continuous operation up to 60V. This enables robust handling of automotive load-dump transients and industrial surge events without external clamping components. The device maintains full functionality across its specified 5.5V to 60V operating range, and internal protection circuits remain active throughout this span.
Does the LTC7840EUFD#PBF support synchronization to an external clock?
Yes, the LTC7840EUFD#PBF supports external clock synchronization via the SYNC pin (Pin 28), accepting input frequencies from 50kHz to 450kHz. The internal PLL locks to the external clock with integrated compensation, eliminating need for external loop filters. This capability enables precise phase alignment across multiple LTC7840EUFD#PBF controllers in multi-phase systems or noise-sensitive environments requiring deterministic switching.
How is overcurrent protection implemented in the LTC7840EUFD#PBF?
The LTC7840EUFD#PBF implements hiccup-mode overcurrent protection triggered when sensed current exceeds the threshold set by ILIM1/ILIM2 pins (typically 75mV). Upon fault detection, the controller disables switching, waits for a timeout determined by the SS1/SS2 capacitor value, then attempts automatic restart. This cycle repeats until fault clears - limiting average power dissipation and preventing thermal runaway without requiring external latching circuitry.
Can the LTC7840EUFD#PBF be used in SEPIC or flyback topologies?
Yes, the LTC7840EUFD#PBF is explicitly designed for flexible topology implementation including SEPIC and flyback, in addition to standard boost. Its nonsynchronous architecture, independent current sense inputs (SENSE1+/SENSE1−, SENSE2+/SENSE2−), and configurable gate drive outputs allow direct adaptation to these configurations. Application schematics in the datasheet confirm validated SEPIC and flyback implementations with appropriate transformer/coupled-inductor selection.
What is the thermal resistance of the LTC7840EUFD#PBF package?
The LTC7840EUFD#PBF uses a 28-lead 4mm × 5mm QFN package (UFD28) with a specified junction-to-ambient thermal resistance (θJA) of 47°C/W under JEDEC-standard PCB conditions. Actual thermal performance depends on PCB copper area, number of thermal vias under the exposed pad, and airflow. For continuous 125°C junction operation at 70°C ambient, design must limit power dissipation to ≤1.15W using the formula TJ = TA + PDISS × θJA.
LTC7840EUFD#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Output Type:
- PWM
- Function:
- Step-Up
- Output Configuration:
- Positive
- Topology:
- Boost
- Number of Outputs:
- 2
- Output Phases:
- 2
- Voltage - Supply (Vcc/Vdd):
- 5.5V ~ 60V
- Frequency - Switching:
- 50kHz ~ 425kHz
- Duty Cycle (Max):
- 96%
- Synchronous Rectifier:
- No
- Clock Sync:
- Yes
- Serial Interfaces:
- -
- Control Features:
- Current Limit, Enable, Frequency Control, Power Good
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-QFN (4x5)
LTC7840EUFD#PBF FAQ
1.How can I place an order for LTC7840EUFD#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC7840EUFD#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC7840EUFD#PBF reliable?
The price and inventory of LTC7840EUFD#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC7840EUFD#PBF is usually 5 days.
3.What payment methods are accepted for LTC7840EUFD#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC7840EUFD#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC7840EUFD#PBF?
LTC7840EUFD#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC7840EUFD#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC7840EUFD#PBF?
For technical support, including LTC7840EUFD#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC7840EUFD#PBF requirements.
6.How does Aetrix verify that LTC7840EUFD#PBF is sourced from the original manufacturer or authorized distributors?
All LTC7840EUFD#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC7840EUFD#PBF meets industry standards.
7.What is the process for return or replacement of LTC7840EUFD#PBF?
All LTC7840EUFD#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC7840EUFD#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC7840EUFD#PBF part is unused and in its original packaging.
Return procedure for LTC7840EUFD#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC7840EUFD#PBF Tags

-
UCC28C45DR
Texas Instruments

-
UCC28C40DR
Texas Instruments

-
UCC28C43DR
Texas Instruments

-
ZXSC410E6TA
Diodes Incorporated
-
LM3524DMX/NOPB
Texas Instruments
-
LM3489MMX/NOPB
Texas Instruments

-
MIC2102YML-TR
Microchip Technology

-
LM5148RGYR
Texas Instruments
-
TL598CDR
Texas Instruments

-
LM5155DSSR
Texas Instruments

-
LM25085MYX/NOPB
Texas Instruments

-
UCC2813DTR-0
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

