Analog Devices Inc. LTM4613EY#PBF
- Part No.:
- LTM4613EY#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Converters
- Package:
- 133-BBGA Module
- Datasheet:
-
LTM4613EY#PBF.pdf
- Description:
- DC DC CONVERTER 3.3-15V
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTM4613EY#PBF from Analog Devices (formerly Linear Technology) is an ultralow-noise, 8A, 36V-input DC/DC µModule® regulator in a RoHS-compliant BGA package. It delivers precisely regulated 12V output from 24–36V input with ±0.3% total DC error, EN55022B-compliant EMI performance, and integrated power FETs, inductor, and support circuitry - enabling compact, high-reliability power delivery for RF systems and telecom infrastructure.
For engineers reviewing the LTM4613EY#PBF datasheet, LTM4613EY#PBF pinout, LTM4613EY#PBF application, or LTM4613EY#PBF equivalent, key selection criteria include its 600kHz switching frequency, programmable soft-start via TRACK/SS, PLL synchronization capability, output voltage margining (MARG0/MARG1/MPGM), and thermal performance across –40°C to 125°C.
Technical Context
The LTM4613EY#PBF implements adaptive on-time current mode control with internal 0.6V reference, 100kΩ precision feedback resistor, and fast transient response enabled by constant on-time architecture. Its integrated noise cancellation circuitry and onboard π-filter reduce both input- and output-referred ripple - achieving 19mVP-P output ripple at 12V/0A and passing EN55022 Class B radiated emission limits.
It supports full-feature system integration: synchronous clocking via PLLIN (50kΩ internal termination), forced continuous/discontinuous mode selection via FCB, output tracking and soft-start via TRACK/SS, and precise ±5% voltage margining using MARG0/MARG1 logic states and MPGM-programmed current source (1.18V reference).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 5V to 36V DC - supports wide industrial and telecom supply rails including 24V and 36V nominal systems. |
| Output Current | 8A continuous - sufficient for FPGA core, ASIC, or multi-channel RF IC power domains without external current sharing. |
| Output Voltage Range | 3.3V to 15V - set by single external resistor (e.g., 5.23kΩ for 12V), with 2% max total DC error over line/load/temp. |
| Switching Frequency | 600kHz typical at 12VOUT - enables compact magnetics and low output ripple; adjustable via fSET pin. |
| Output Ripple | 19mVP-P at 12V/0A - achieved with 4×47µF ceramic COUT; meets stringent low-noise requirements for RF and analog circuits. |
| EMI Compliance | EN55022 Class B certified - verified radiated emission scan up to 1010MHz with 24VIN→12VOUT/8A operation. |
| Operating Temp | –40°C to 125°C junction - qualified for industrial and avionic environments; BGA package uses SAC305 solder finish. |
Pinout & Package
Package: 133-ball BGA, 15mm × 15mm × 4.92mm, RoHS-compliant SAC305 finish, MSL Level 3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN (Bank 1) | Power Input | Primary DC input connection (24–36V); requires local 3×10µF ceramic decoupling to PGND for RMS current handling. |
| VOUT (Bank 3) | Power Output | Regulated 12V output; connects directly to load and bulk COUT (e.g., 4×47µF ceramic) at PGND star point. |
| PGND (Bank 2) | Power Ground | Common return for VIN and VOUT paths; must be low-inductance plane tied to SGND at output capacitor. |
| TRACK/SS | Soft-Start & Tracking Control | Capacitor-to-ground sets ramp rate for standalone startup; resistor divider from master rail enables synchronized tracking. |
| MPGM, MARG0, MARG1 | Voltage Margining Interface | MPGM sets margin magnitude (1.18V/R); MARG0/MARG1 logic selects +5%, –5%, or no margin - critical for production test validation. |
| PLLIN | External Clock Sync Input | 50kΩ internally terminated; accepts 2–INTVCC V clock signal to synchronize switching and enable PolyPhase® interleaving. |
| FCB | Forced Continuous Mode | Ground = CCM (low-noise); INTVCC = DCM (higher light-load efficiency); eliminates audible switching artifacts. |
| PGOOD | Open-Drain Power Good | Asserts high after 25µs when VFB stays within ±10% of 0.6V reference - used for system power sequencing and fault detection. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated µModule® Architecture | Complete power solution - includes controller, dual MOSFETs, shielded inductor, and compensation - reduces design cycle time and PCB area by >50% vs discrete solutions. |
| Ultralow EMI Design | Onboard input filter + noise cancellation achieves EN55022B compliance without external ferrites or shielding cans - simplifies EMC certification. |
| Adaptive On-Time Current Mode Control | Enables <100µs load transient settling (250mV peak deviation, 100µs settle time) with inherent stability across ceramic-only output capacitors. |
| Programmable Voltage Margining | Hardware-based ±5% output adjustment via MARG0/MARG1 logic and MPGM resistor - supports automated production testing and margin analysis per JEDEC JESD22-A108. |
| Thermal Robustness | θJCbottom = 2.3°C/W and θJA = 10°C/W (on 4-layer 95mm×76mm PCB) - enables 8A operation at full load up to 85°C ambient without derating. |
Applications
| Telecom Line Cards | RF Transceiver Power |
|---|---|
Use Scenario: Powering 12V analog front-end and digital baseband sections on 3G/4G/5G macro base station line cards with strict conducted/radiated EMI limits. IC Role / Device Role / Timing Role: Primary non-isolated DC/DC regulator delivering clean, sequenced 12V to mixed-signal SoCs and DACs/ADCs. Use Value: EN55022B compliance eliminates need for external EMI filters; PGOOD enables safe power-up sequencing with FPGA configuration logic. |
Use Scenario: Supplying low-noise 12V bias to GaN power amplifiers and LNA stages in phased-array radar and mmWave test equipment. IC Role / Device Role / Timing Role: High-current, ultra-low-ripple power source with margining support for production calibration and lifetime drift verification. Use Value: 19mVP-P output ripple and <100µs transient response prevent AM-to-PM distortion in sensitive RF chains. |
| Industrial PLC CPU Modules | Avionics Data Acquisition Units |
Use Scenario: Providing 12V/8A to ARM Cortex-A series processors and DDR4 memory subsystems in ruggedized programmable logic controllers operating at –40°C to 85°C. IC Role / Device Role / Timing Role: Main system power regulator with thermal derating support and robust overvoltage/overcurrent protection. Use Value: –40°C to 125°C qualification ensures reliability in uncontrolled enclosures; current foldback prevents latch-up during short-circuit faults. |
Use Scenario: Powering high-precision ADCs, isolated CAN transceivers, and sensor interface ICs in airborne flight data recorders requiring DO-160G Section 20 compliance. IC Role / Device Role / Timing Role: Mission-critical power module with margining for pre-flight functional test and in-service health monitoring. Use Value: Hardware margining (±5%) validates voltage tolerance margins under vibration and temperature extremes without software intervention. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-current, low-noise DC/DC µModule applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTM4622IY#PBF | Dual 2.5A output, 36VIN, smaller 11.25mm × 9mm BGA, fixed 600kHz sync - lacks margining, PLLIN, and 8A single-rail capability. | Suitable for space-constrained dual-rail systems (e.g., 1.2V + 3.3V), not for 12V/8A monorail loads. | Select only if dual-output topology and reduced size outweigh need for margining and higher current. |
| LTM4650AIV#PBF | Single 50A output, 16VIN, 15mm × 15mm LGA, 3-phase interleaved - higher current, lower Vin range, no margining pins, larger footprint. | Targets high-power FPGA/ASIC cores requiring >20A; incompatible with 24–36V input or margining workflows. | Choose for >20A loads where input is ≤16V and margining is unnecessary; not drop-in for LTM4613EY#PBF designs. |
Compared with LTM4613EY#PBF, LTM4622IY#PBF trades single-rail 8A capability and margining for dual-output flexibility and smaller size, while LTM4650AIV#PBF scales current to 50A but abandons 24–36V input support and production test margining - making LTM4613EY#PBF uniquely balanced for 12V/8A telecom and RF applications requiring EMI compliance and hardware-level validation.
Availability
LTM4613EY#PBF is available at Aetrix Electronics and suitable for telecom line cards, RF transceiver power supplies, and industrial PLC CPU modules requiring stable component supply, long-term lifecycle support, and RoHS-compliant BGA packaging.
Supply support for LTM4613EY#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains the µModule® product line as a leader in integrated power system-in-package solutions for high-reliability applications.
The LTM4613EY#PBF belongs to the LTM46xx family of ultralow-noise, high-current DC/DC µModules designed specifically for EMI-sensitive RF, telecom, and avionic systems demanding compact, fully validated power delivery.
FAQ
What is the maximum input voltage rating for the LTM4613EY#PBF?
The LTM4613EY#PBF has an absolute maximum input voltage rating of 36V DC applied between VIN and PGND. Operation above this level risks permanent damage. The recommended operating range is 5V to 36V, with optimal performance observed at 24V to 36V inputs for 12V output configurations. Thermal derating may apply near the upper limit depending on ambient conditions and PCB layout.
Does the LTM4613EY#PBF support output voltage margining, and how is it implemented?
Yes, the LTM4613EY#PBF supports hardware-based voltage margining via three dedicated pins: MPGM, MARG0, and MARG1. A resistor from MPGM to SGND sets the margin magnitude (e.g., 1.18V/R = current × 10kΩ = mV offset from 0.6V reference). MARG0 and MARG1 logic states select +5%, –5%, or no margin per JEDEC-standard test modes - all implemented without firmware or external DACs.
How does the LTM4613EY#PBF achieve EN55022 Class B compliance?
The LTM4613EY#PBF achieves EN55022 Class B compliance through integrated noise cancellation circuitry, an onboard input π-filter (using VD and VIN pins), and optimized switching node layout within its hermetically sealed BGA package. Radiated emission testing confirms compliance up to 1010MHz at 24VIN→12VOUT/8A, eliminating need for external EMI filters or metal shielding in most applications.
Can multiple LTM4613EY#PBF units be paralleled for higher current, and what is required?
Yes, the LTM4613EY#PBF supports parallel operation via inherent current-mode control. Each unit requires its own MPGM resistor (not shared), and output voltages must be matched within 0.5% using identical RFB programming resistors. Phase interleaving is achieved by synchronizing all units to the same external clock via PLLIN, reducing effective output ripple current by up to 70% with two-phase operation.
What is the purpose of the FCB pin on the LTM4613EY#PBF, and how should it be configured?
FCB (Forced Continuous Mode) on the LTM4613EY#PBF selects light-load operating mode: grounding FCB forces continuous conduction mode (CCM) for lowest output ripple and noise, while connecting FCB to INTVCC enables discontinuous conduction mode (DCM) for improved light-load efficiency. This choice directly impacts EMI profile and thermal behavior below ~1A load - critical for battery-backed or always-on systems.
LTM4613EY#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- µModule®
- Package/Case:
- 133-BBGA Module
- Packaging:
- Tray
- Product Status:
- Active
- Type:
- Non-Isolated PoL Module
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 5V
- Voltage - Input (Max):
- 36V
- Voltage - Output 1:
- 3.3 ~ 15V
- Voltage - Output 2:
- -
- Voltage - Output 3:
- -
- Voltage - Output 4:
- -
- Current - Output (Max):
- 8A
- Power (Watts):
- -
- Voltage - Isolation:
- -
- Applications:
- ITE (Commercial)
- Features:
- OVP, SCP, UVLO
- Operating Temperature:
- -40°C ~ 125°C
- Efficiency:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 133-BGA (15x15)
- Control Features:
- -
- Approval Agency:
- -
- Standard Number:
- -
LTM4613EY#PBF FAQ
1.How can I place an order for LTM4613EY#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTM4613EY#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTM4613EY#PBF reliable?
The price and inventory of LTM4613EY#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTM4613EY#PBF is usually 5 days.
3.What payment methods are accepted for LTM4613EY#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTM4613EY#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTM4613EY#PBF?
LTM4613EY#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTM4613EY#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTM4613EY#PBF?
For technical support, including LTM4613EY#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTM4613EY#PBF requirements.
6.How does Aetrix verify that LTM4613EY#PBF is sourced from the original manufacturer or authorized distributors?
All LTM4613EY#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTM4613EY#PBF meets industry standards.
7.What is the process for return or replacement of LTM4613EY#PBF?
All LTM4613EY#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTM4613EY#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTM4613EY#PBF part is unused and in its original packaging.
Return procedure for LTM4613EY#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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