Texas Instruments LV14360PDDA

Overview

LV14360PDDA from Texas Instruments is a 60-V, 3-A synchronous step-down DC-DC converter with integrated high-side MOSFET (155-mΩ typical), 300-µA quiescent current in sleep mode, adjustable 200 kHz–2 MHz switching frequency, and internal loop compensation. It delivers regulated power in industrial power supplies and battery-backed communications modules where wide input range (4.3 V to 60 V) and low-light-load efficiency are critical.

For engineers reviewing the LV14360PDDA datasheet, LV14360PDDA pinout, LV14360PDDA application, or LV14360PDDA equivalent, this page provides verified functional context, validated pin roles, confirmed thermal and protection behavior, and real-world implementation constraints - including BOOT capacitor recharge timing, PGOOD flag thresholds, and RT/SYNC mode transition logic.

Technical Context

The LV14360PDDA implements fixed-frequency peak current mode control with slope compensation to prevent subharmonic oscillation above 50% duty cycle. Its internal error amplifier drives a COMP node clamped at 400 mV during sleep mode, enabling 300-µA no-load operation while maintaining regulation via periodic burst-mode recovery.

It supports dual-mode RT/SYNC pin operation: resistor-programmed frequency (200 kHz–2 MHz) or external clock synchronization (250 kHz–2 MHz), with automatic reversion to RT mode if clock edges cease. The device achieves up to ~90% effective duty cycle via BOOT capacitor refresh circuitry triggered when BOOT–SW drops below 3.2 V after sustained high-side conduction.

Key Specifications

Pinout & Package

LV14360PDDA is housed in an 8-pin HSOIC package (4.89 mm × 3.9 mm) with exposed thermal pad (Pin 9), optimized for low junction-to-board thermal resistance (RθJB = 25.5°C/W).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar step-down converter applications.

Compared with LM5164QPWPRQ1 and TPS54360BDDAR, LV14360PDDA provides integrated PGOOD, lower 300-µA sleep current, internal compensation, and unified RT/SYNC pin functionality - reducing component count, layout area, and firmware complexity in multi-rail embedded systems.

Availability

LV14360PDDA is available at Aetrix Electronics and suitable for industrial PLC power rails, telecom datacom modules, and battery-powered test equipment requiring stable component supply, long-term lifecycle support, and guaranteed traceability.

Supply support for LV14360PDDA includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in power management IC design and automotive-grade reliability validation.

The LV14360PDDA belongs to TI's wide-input-voltage buck converter product line, engineered for robustness in harsh environments - targeting industrial automation, communications infrastructure, and automotive body electronics where input transients and thermal constraints dominate design decisions.

FAQ

What is the maximum duty cycle supported by the LV14360PDDA?

The LV14360PDDA supports up to approximately 90% effective duty cycle through its integrated BOOT capacitor refresh circuit. When the high-side MOSFET remains on for five to six consecutive cycles (or 10–11 at >1 MHz), the device detects BOOT–SW voltage dropping below 3.2 V and briefly turns off the high-side switch to recharge the BOOT capacitor via the low-side path. This mechanism enables regulation down to VIN – VOUT ≈ 0.5 V, making LV14360PDDA suitable for near-dropout applications such as 5.5-V input to 5-V output.

Does the LV14360PDDA include power-good signaling, and how is it implemented?

Yes, the LV14360PDDA includes an open-drain PGOOD output on Pin 6 (SS/PGOOD). It asserts low when the output voltage deviates more than ±3% from the target (i.e., below 94% or above 107% of VFB = 0.75 V), with 2% hysteresis for clean release. A 10–100-kΩ pullup resistor to a logic rail ≤7 V is required. This signal enables safe power sequencing in multi-rail systems and fault detection without external comparators - a key differentiator from non-PGOOD variants like LV14360S.

How does the LV14360PDDA manage light-load efficiency?

The LV14360PDDA enters sleep mode at light loads (<100 mA), reducing quiescent current to 300 µA (typical) by clamping the internal COMP voltage at 400 mV and halting switching. Output voltage decay triggers periodic burst-mode recovery pulses until regulation is restored. This architecture achieves >85% efficiency at 1 mA output (VIN = 12 V, VOUT = 5 V), outperforming fixed-frequency-only converters and extending battery life in always-on sensor nodes powered by LV14360PDDA.

Can the LV14360PDDA be synchronized to an external clock, and what are the timing requirements?

Yes, the LV14360PDDA supports external clock synchronization via the RT/SYNC pin (Pin 4). It accepts square-wave inputs from 250 kHz to 2 MHz, with high-level threshold ≥1.7 V, low-level threshold ≤0.5 V, and minimum pulse width ≥30 ns. Synchronization occurs on falling edges; if clock edges stop, the device automatically reverts to RT-resistor mode. This capability enables EMI reduction in dense PCB layouts and deterministic timing alignment in multi-converter systems using LV14360PDDA.

What thermal design considerations apply to the LV14360PDDA in the HSOIC-8 PowerPAD™ package?

The LV14360PDDA in the DDA (HSOIC-8) package relies on its exposed thermal pad (Pin 9) for heat dissipation. To achieve the specified RθJA = 42.5°C/W, the pad must be soldered to a solid internal or bottom-layer GND plane using ≥4 thermal vias (0.3-mm diameter, filled or capped). Layout must avoid thermal isolation; adjacent copper pours should connect directly to the pad. Derating is required above 85°C ambient - at 100°C, maximum continuous output current drops to ~2.2 A per thermal simulation data in the LV14360PDDA datasheet.